diff options
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r-- | arch/arm/mm/cache-l2x0.c | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index ec85dda1e733..cb8fc6573b1b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -150,18 +150,25 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | |||
150 | 150 | ||
151 | l2x0_base = base; | 151 | l2x0_base = base; |
152 | 152 | ||
153 | /* disable L2X0 */ | 153 | /* |
154 | writel(0, l2x0_base + L2X0_CTRL); | 154 | * Check if l2x0 controller is already enabled. |
155 | * If you are booting from non-secure mode | ||
156 | * accessing the below registers will fault. | ||
157 | */ | ||
158 | if (!(readl(l2x0_base + L2X0_CTRL) & 1)) { | ||
155 | 159 | ||
156 | aux = readl(l2x0_base + L2X0_AUX_CTRL); | 160 | /* l2x0 controller is disabled */ |
157 | aux &= aux_mask; | ||
158 | aux |= aux_val; | ||
159 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | ||
160 | 161 | ||
161 | l2x0_inv_all(); | 162 | aux = readl(l2x0_base + L2X0_AUX_CTRL); |
163 | aux &= aux_mask; | ||
164 | aux |= aux_val; | ||
165 | writel(aux, l2x0_base + L2X0_AUX_CTRL); | ||
162 | 166 | ||
163 | /* enable L2X0 */ | 167 | l2x0_inv_all(); |
164 | writel(1, l2x0_base + L2X0_CTRL); | 168 | |
169 | /* enable L2X0 */ | ||
170 | writel(1, l2x0_base + L2X0_CTRL); | ||
171 | } | ||
165 | 172 | ||
166 | outer_cache.inv_range = l2x0_inv_range; | 173 | outer_cache.inv_range = l2x0_inv_range; |
167 | outer_cache.clean_range = l2x0_clean_range; | 174 | outer_cache.clean_range = l2x0_clean_range; |