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-rw-r--r--arch/arm/mm/cache-l2x0.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 44c086710d2b..9ecfdb511951 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -277,6 +277,25 @@ static void l2x0_disable(void)
277 spin_unlock_irqrestore(&l2x0_lock, flags); 277 spin_unlock_irqrestore(&l2x0_lock, flags);
278} 278}
279 279
280static void __init l2x0_unlock(__u32 cache_id)
281{
282 int lockregs;
283 int i;
284
285 if (cache_id == L2X0_CACHE_ID_PART_L310)
286 lockregs = 8;
287 else
288 /* L210 and unknown types */
289 lockregs = 1;
290
291 for (i = 0; i < lockregs; i++) {
292 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_D_BASE +
293 i * L2X0_LOCKDOWN_STRIDE);
294 writel_relaxed(0x0, l2x0_base + L2X0_LOCKDOWN_WAY_I_BASE +
295 i * L2X0_LOCKDOWN_STRIDE);
296 }
297}
298
280void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) 299void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
281{ 300{
282 __u32 aux; 301 __u32 aux;
@@ -328,6 +347,8 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
328 * accessing the below registers will fault. 347 * accessing the below registers will fault.
329 */ 348 */
330 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) { 349 if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & 1)) {
350 /* Make sure that I&D is not locked down when starting */
351 l2x0_unlock(cache_id);
331 352
332 /* l2x0 controller is disabled */ 353 /* l2x0 controller is disabled */
333 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL); 354 writel_relaxed(aux, l2x0_base + L2X0_AUX_CTRL);