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-rw-r--r--arch/arm/mach-vexpress/v2m.c349
1 files changed, 89 insertions, 260 deletions
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 359f782c747d..011661a6c5cb 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -16,11 +16,10 @@
16#include <linux/smsc911x.h> 16#include <linux/smsc911x.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <linux/usb/isp1760.h> 18#include <linux/usb/isp1760.h>
19#include <linux/clkdev.h>
20#include <linux/clk-provider.h>
21#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
22#include <linux/regulator/fixed.h> 20#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h> 21#include <linux/regulator/machine.h>
22#include <linux/vexpress.h>
24 23
25#include <asm/arch_timer.h> 24#include <asm/arch_timer.h>
26#include <asm/mach-types.h> 25#include <asm/mach-types.h>
@@ -33,7 +32,6 @@
33#include <asm/hardware/cache-l2x0.h> 32#include <asm/hardware/cache-l2x0.h>
34#include <asm/hardware/gic.h> 33#include <asm/hardware/gic.h>
35#include <asm/hardware/timer-sp.h> 34#include <asm/hardware/timer-sp.h>
36#include <asm/hardware/sp810.h>
37 35
38#include <mach/ct-ca9x4.h> 36#include <mach/ct-ca9x4.h>
39#include <mach/motherboard.h> 37#include <mach/motherboard.h>
@@ -58,22 +56,6 @@ static struct map_desc v2m_io_desc[] __initdata = {
58 }, 56 },
59}; 57};
60 58
61static void __iomem *v2m_sysreg_base;
62
63static void __init v2m_sysctl_init(void __iomem *base)
64{
65 u32 scctrl;
66
67 if (WARN_ON(!base))
68 return;
69
70 /* Select 1MHz TIMCLK as the reference clock for SP804 timers */
71 scctrl = readl(base + SCCTRL);
72 scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
73 scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
74 writel(scctrl, base + SCCTRL);
75}
76
77static void __init v2m_sp804_init(void __iomem *base, unsigned int irq) 59static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
78{ 60{
79 if (WARN_ON(!base || irq == NO_IRQ)) 61 if (WARN_ON(!base || irq == NO_IRQ))
@@ -87,69 +69,6 @@ static void __init v2m_sp804_init(void __iomem *base, unsigned int irq)
87} 69}
88 70
89 71
90static DEFINE_SPINLOCK(v2m_cfg_lock);
91
92int v2m_cfg_write(u32 devfn, u32 data)
93{
94 /* Configuration interface broken? */
95 u32 val;
96
97 printk("%s: writing %08x to %08x\n", __func__, data, devfn);
98
99 devfn |= SYS_CFG_START | SYS_CFG_WRITE;
100
101 spin_lock(&v2m_cfg_lock);
102 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
103 writel(val & ~SYS_CFG_COMPLETE, v2m_sysreg_base + V2M_SYS_CFGSTAT);
104
105 writel(data, v2m_sysreg_base + V2M_SYS_CFGDATA);
106 writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
107
108 do {
109 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
110 } while (val == 0);
111 spin_unlock(&v2m_cfg_lock);
112
113 return !!(val & SYS_CFG_ERR);
114}
115
116int v2m_cfg_read(u32 devfn, u32 *data)
117{
118 u32 val;
119
120 devfn |= SYS_CFG_START;
121
122 spin_lock(&v2m_cfg_lock);
123 writel(0, v2m_sysreg_base + V2M_SYS_CFGSTAT);
124 writel(devfn, v2m_sysreg_base + V2M_SYS_CFGCTRL);
125
126 mb();
127
128 do {
129 cpu_relax();
130 val = readl(v2m_sysreg_base + V2M_SYS_CFGSTAT);
131 } while (val == 0);
132
133 *data = readl(v2m_sysreg_base + V2M_SYS_CFGDATA);
134 spin_unlock(&v2m_cfg_lock);
135
136 return !!(val & SYS_CFG_ERR);
137}
138
139void __init v2m_flags_set(u32 data)
140{
141 writel(~0, v2m_sysreg_base + V2M_SYS_FLAGSCLR);
142 writel(data, v2m_sysreg_base + V2M_SYS_FLAGSSET);
143}
144
145int v2m_get_master_site(void)
146{
147 u32 misc = readl(v2m_sysreg_base + V2M_SYS_MISC);
148
149 return misc & SYS_MISC_MASTERSITE ? SYS_CFG_SITE_DB2 : SYS_CFG_SITE_DB1;
150}
151
152
153static struct resource v2m_pcie_i2c_resource = { 72static struct resource v2m_pcie_i2c_resource = {
154 .start = V2M_SERIAL_BUS_PCI, 73 .start = V2M_SERIAL_BUS_PCI,
155 .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1, 74 .end = V2M_SERIAL_BUS_PCI + SZ_4K - 1,
@@ -237,14 +156,8 @@ static struct platform_device v2m_usb_device = {
237 .dev.platform_data = &v2m_usb_config, 156 .dev.platform_data = &v2m_usb_config,
238}; 157};
239 158
240static void v2m_flash_set_vpp(struct platform_device *pdev, int on)
241{
242 writel(on != 0, v2m_sysreg_base + V2M_SYS_FLASH);
243}
244
245static struct physmap_flash_data v2m_flash_data = { 159static struct physmap_flash_data v2m_flash_data = {
246 .width = 4, 160 .width = 4,
247 .set_vpp = v2m_flash_set_vpp,
248}; 161};
249 162
250static struct resource v2m_flash_resources[] = { 163static struct resource v2m_flash_resources[] = {
@@ -291,14 +204,61 @@ static struct platform_device v2m_cf_device = {
291 .dev.platform_data = &v2m_pata_data, 204 .dev.platform_data = &v2m_pata_data,
292}; 205};
293 206
294static unsigned int v2m_mmci_status(struct device *dev)
295{
296 return readl(v2m_sysreg_base + V2M_SYS_MCI) & (1 << 0);
297}
298
299static struct mmci_platform_data v2m_mmci_data = { 207static struct mmci_platform_data v2m_mmci_data = {
300 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 208 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
301 .status = v2m_mmci_status, 209 .gpio_wp = VEXPRESS_GPIO_MMC_WPROT,
210 .gpio_cd = VEXPRESS_GPIO_MMC_CARDIN,
211};
212
213static struct resource v2m_sysreg_resources[] = {
214 {
215 .start = V2M_SYSREGS,
216 .end = V2M_SYSREGS + 0xfff,
217 .flags = IORESOURCE_MEM,
218 },
219};
220
221static struct platform_device v2m_sysreg_device = {
222 .name = "vexpress-sysreg",
223 .id = -1,
224 .resource = v2m_sysreg_resources,
225 .num_resources = ARRAY_SIZE(v2m_sysreg_resources),
226};
227
228static struct platform_device v2m_muxfpga_device = {
229 .name = "vexpress-muxfpga",
230 .id = 0,
231 .num_resources = 1,
232 .resource = (struct resource []) {
233 VEXPRESS_RES_FUNC(0, 7),
234 }
235};
236
237static struct platform_device v2m_shutdown_device = {
238 .name = "vexpress-shutdown",
239 .id = 0,
240 .num_resources = 1,
241 .resource = (struct resource []) {
242 VEXPRESS_RES_FUNC(0, 8),
243 }
244};
245
246static struct platform_device v2m_reboot_device = {
247 .name = "vexpress-reboot",
248 .id = 0,
249 .num_resources = 1,
250 .resource = (struct resource []) {
251 VEXPRESS_RES_FUNC(0, 9),
252 }
253};
254
255static struct platform_device v2m_dvimode_device = {
256 .name = "vexpress-dvimode",
257 .id = 0,
258 .num_resources = 1,
259 .resource = (struct resource []) {
260 VEXPRESS_RES_FUNC(0, 11),
261 }
302}; 262};
303 263
304static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); 264static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL);
@@ -325,123 +285,9 @@ static struct amba_device *v2m_amba_devs[] __initdata = {
325 &rtc_device, 285 &rtc_device,
326}; 286};
327 287
328
329static unsigned long v2m_osc_recalc_rate(struct clk_hw *hw,
330 unsigned long parent_rate)
331{
332 struct v2m_osc *osc = to_v2m_osc(hw);
333
334 return !parent_rate ? osc->rate_default : parent_rate;
335}
336
337static long v2m_osc_round_rate(struct clk_hw *hw, unsigned long rate,
338 unsigned long *parent_rate)
339{
340 struct v2m_osc *osc = to_v2m_osc(hw);
341
342 if (WARN_ON(rate < osc->rate_min))
343 rate = osc->rate_min;
344
345 if (WARN_ON(rate > osc->rate_max))
346 rate = osc->rate_max;
347
348 return rate;
349}
350
351static int v2m_osc_set_rate(struct clk_hw *hw, unsigned long rate,
352 unsigned long parent_rate)
353{
354 struct v2m_osc *osc = to_v2m_osc(hw);
355
356 v2m_cfg_write(SYS_CFG_OSC | SYS_CFG_SITE(osc->site) |
357 SYS_CFG_STACK(osc->stack) | osc->osc, rate);
358
359 return 0;
360}
361
362static struct clk_ops v2m_osc_ops = {
363 .recalc_rate = v2m_osc_recalc_rate,
364 .round_rate = v2m_osc_round_rate,
365 .set_rate = v2m_osc_set_rate,
366};
367
368struct clk * __init v2m_osc_register(const char *name, struct v2m_osc *osc)
369{
370 struct clk_init_data init;
371
372 WARN_ON(osc->site > 2);
373 WARN_ON(osc->stack > 15);
374 WARN_ON(osc->osc > 4095);
375
376 init.name = name;
377 init.ops = &v2m_osc_ops;
378 init.flags = CLK_IS_ROOT;
379 init.num_parents = 0;
380
381 osc->hw.init = &init;
382
383 return clk_register(NULL, &osc->hw);
384}
385
386static struct v2m_osc v2m_mb_osc1 = {
387 .site = SYS_CFG_SITE_MB,
388 .osc = 1,
389 .rate_min = 23750000,
390 .rate_max = 63500000,
391 .rate_default = 23750000,
392};
393
394static const char *v2m_ref_clk_periphs[] __initconst = {
395 "mb:wdt", "1000f000.wdt", "1c0f0000.wdt", /* SP805 WDT */
396};
397
398static const char *v2m_osc1_periphs[] __initconst = {
399 "mb:clcd", "1001f000.clcd", "1c1f0000.clcd", /* PL111 CLCD */
400};
401
402static const char *v2m_osc2_periphs[] __initconst = {
403 "mb:mmci", "10005000.mmci", "1c050000.mmci", /* PL180 MMCI */
404 "mb:kmi0", "10006000.kmi", "1c060000.kmi", /* PL050 KMI0 */
405 "mb:kmi1", "10007000.kmi", "1c070000.kmi", /* PL050 KMI1 */
406 "mb:uart0", "10009000.uart", "1c090000.uart", /* PL011 UART0 */
407 "mb:uart1", "1000a000.uart", "1c0a0000.uart", /* PL011 UART1 */
408 "mb:uart2", "1000b000.uart", "1c0b0000.uart", /* PL011 UART2 */
409 "mb:uart3", "1000c000.uart", "1c0c0000.uart", /* PL011 UART3 */
410};
411
412static void __init v2m_clk_init(void)
413{
414 struct clk *clk;
415 int i;
416
417 clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL,
418 CLK_IS_ROOT, 0);
419 WARN_ON(clk_register_clkdev(clk, "apb_pclk", NULL));
420
421 clk = clk_register_fixed_rate(NULL, "mb:ref_clk", NULL,
422 CLK_IS_ROOT, 32768);
423 for (i = 0; i < ARRAY_SIZE(v2m_ref_clk_periphs); i++)
424 WARN_ON(clk_register_clkdev(clk, NULL, v2m_ref_clk_periphs[i]));
425
426 clk = clk_register_fixed_rate(NULL, "mb:sp804_clk", NULL,
427 CLK_IS_ROOT, 1000000);
428 WARN_ON(clk_register_clkdev(clk, "v2m-timer0", "sp804"));
429 WARN_ON(clk_register_clkdev(clk, "v2m-timer1", "sp804"));
430
431 clk = v2m_osc_register("mb:osc1", &v2m_mb_osc1);
432 for (i = 0; i < ARRAY_SIZE(v2m_osc1_periphs); i++)
433 WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc1_periphs[i]));
434
435 clk = clk_register_fixed_rate(NULL, "mb:osc2", NULL,
436 CLK_IS_ROOT, 24000000);
437 for (i = 0; i < ARRAY_SIZE(v2m_osc2_periphs); i++)
438 WARN_ON(clk_register_clkdev(clk, NULL, v2m_osc2_periphs[i]));
439}
440
441static void __init v2m_timer_init(void) 288static void __init v2m_timer_init(void)
442{ 289{
443 v2m_sysctl_init(ioremap(V2M_SYSCTL, SZ_4K)); 290 vexpress_clk_init(ioremap(V2M_SYSCTL, SZ_4K));
444 v2m_clk_init();
445 v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0); 291 v2m_sp804_init(ioremap(V2M_TIMER01, SZ_4K), IRQ_V2M_TIMER0);
446} 292}
447 293
@@ -453,19 +299,7 @@ static void __init v2m_init_early(void)
453{ 299{
454 if (ct_desc->init_early) 300 if (ct_desc->init_early)
455 ct_desc->init_early(); 301 ct_desc->init_early();
456 versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); 302 versatile_sched_clock_init(vexpress_get_24mhz_clock_base(), 24000000);
457}
458
459static void v2m_power_off(void)
460{
461 if (v2m_cfg_write(SYS_CFG_SHUTDOWN | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0))
462 printk(KERN_EMERG "Unable to shutdown\n");
463}
464
465static void v2m_restart(char str, const char *cmd)
466{
467 if (v2m_cfg_write(SYS_CFG_REBOOT | SYS_CFG_SITE(SYS_CFG_SITE_MB), 0))
468 printk(KERN_EMERG "Unable to reboot\n");
469} 303}
470 304
471struct ct_desc *ct_desc; 305struct ct_desc *ct_desc;
@@ -482,7 +316,7 @@ static void __init v2m_populate_ct_desc(void)
482 u32 current_tile_id; 316 u32 current_tile_id;
483 317
484 ct_desc = NULL; 318 ct_desc = NULL;
485 current_tile_id = readl(v2m_sysreg_base + V2M_SYS_PROCID0) 319 current_tile_id = vexpress_get_procid(VEXPRESS_SITE_MASTER)
486 & V2M_CT_ID_MASK; 320 & V2M_CT_ID_MASK;
487 321
488 for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i) 322 for (i = 0; i < ARRAY_SIZE(ct_descs) && !ct_desc; ++i)
@@ -498,7 +332,7 @@ static void __init v2m_populate_ct_desc(void)
498static void __init v2m_map_io(void) 332static void __init v2m_map_io(void)
499{ 333{
500 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc)); 334 iotable_init(v2m_io_desc, ARRAY_SIZE(v2m_io_desc));
501 v2m_sysreg_base = ioremap(V2M_SYSREGS, SZ_4K); 335 vexpress_sysreg_early_init(ioremap(V2M_SYSREGS, SZ_4K));
502 v2m_populate_ct_desc(); 336 v2m_populate_ct_desc();
503 ct_desc->map_io(); 337 ct_desc->map_io();
504} 338}
@@ -515,6 +349,12 @@ static void __init v2m_init(void)
515 regulator_register_fixed(0, v2m_eth_supplies, 349 regulator_register_fixed(0, v2m_eth_supplies,
516 ARRAY_SIZE(v2m_eth_supplies)); 350 ARRAY_SIZE(v2m_eth_supplies));
517 351
352 platform_device_register(&v2m_muxfpga_device);
353 platform_device_register(&v2m_shutdown_device);
354 platform_device_register(&v2m_reboot_device);
355 platform_device_register(&v2m_dvimode_device);
356
357 platform_device_register(&v2m_sysreg_device);
518 platform_device_register(&v2m_pcie_i2c_device); 358 platform_device_register(&v2m_pcie_i2c_device);
519 platform_device_register(&v2m_ddc_i2c_device); 359 platform_device_register(&v2m_ddc_i2c_device);
520 platform_device_register(&v2m_flash_device); 360 platform_device_register(&v2m_flash_device);
@@ -525,7 +365,7 @@ static void __init v2m_init(void)
525 for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++) 365 for (i = 0; i < ARRAY_SIZE(v2m_amba_devs); i++)
526 amba_device_register(v2m_amba_devs[i], &iomem_resource); 366 amba_device_register(v2m_amba_devs[i], &iomem_resource);
527 367
528 pm_power_off = v2m_power_off; 368 pm_power_off = vexpress_power_off;
529 369
530 ct_desc->init_tile(); 370 ct_desc->init_tile();
531} 371}
@@ -539,7 +379,7 @@ MACHINE_START(VEXPRESS, "ARM-Versatile Express")
539 .timer = &v2m_timer, 379 .timer = &v2m_timer,
540 .handle_irq = gic_handle_irq, 380 .handle_irq = gic_handle_irq,
541 .init_machine = v2m_init, 381 .init_machine = v2m_init,
542 .restart = v2m_restart, 382 .restart = vexpress_restart,
543MACHINE_END 383MACHINE_END
544 384
545static struct map_desc v2m_rs1_io_desc __initdata = { 385static struct map_desc v2m_rs1_io_desc __initdata = {
@@ -580,20 +420,13 @@ void __init v2m_dt_map_io(void)
580 420
581void __init v2m_dt_init_early(void) 421void __init v2m_dt_init_early(void)
582{ 422{
583 struct device_node *node;
584 u32 dt_hbi; 423 u32 dt_hbi;
585 424
586 node = of_find_compatible_node(NULL, NULL, "arm,vexpress-sysreg"); 425 vexpress_sysreg_of_early_init();
587 v2m_sysreg_base = of_iomap(node, 0);
588 if (WARN_ON(!v2m_sysreg_base))
589 return;
590 426
591 /* Confirm board type against DT property, if available */ 427 /* Confirm board type against DT property, if available */
592 if (of_property_read_u32(of_allnodes, "arm,hbi", &dt_hbi) == 0) { 428 if (of_property_read_u32(of_allnodes, "arm,hbi", &dt_hbi) == 0) {
593 int site = v2m_get_master_site(); 429 u32 hbi = vexpress_get_hbi(VEXPRESS_SITE_MASTER);
594 u32 id = readl(v2m_sysreg_base + (site == SYS_CFG_SITE_DB2 ?
595 V2M_SYS_PROCID1 : V2M_SYS_PROCID0));
596 u32 hbi = id & SYS_PROCIDx_HBI_MASK;
597 430
598 if (WARN_ON(dt_hbi != hbi)) 431 if (WARN_ON(dt_hbi != hbi))
599 pr_warning("vexpress: DT HBI (%x) is not matching " 432 pr_warning("vexpress: DT HBI (%x) is not matching "
@@ -613,51 +446,47 @@ static void __init v2m_dt_init_irq(void)
613 446
614static void __init v2m_dt_timer_init(void) 447static void __init v2m_dt_timer_init(void)
615{ 448{
616 struct device_node *node; 449 struct device_node *node = NULL;
617 const char *path;
618 int err;
619 450
620 node = of_find_compatible_node(NULL, NULL, "arm,sp810"); 451 vexpress_clk_of_init();
621 v2m_sysctl_init(of_iomap(node, 0));
622 452
623 v2m_clk_init(); 453 do {
454 node = of_find_compatible_node(node, NULL, "arm,sp804");
455 } while (node && vexpress_get_site_by_node(node) != VEXPRESS_SITE_MB);
456 if (node) {
457 pr_info("Using SP804 '%s' as a clock & events source\n",
458 node->full_name);
459 v2m_sp804_init(of_iomap(node, 0),
460 irq_of_parse_and_map(node, 0));
461 }
624 462
625 err = of_property_read_string(of_aliases, "arm,v2m_timer", &path);
626 if (WARN_ON(err))
627 return;
628 node = of_find_node_by_path(path);
629 v2m_sp804_init(of_iomap(node, 0), irq_of_parse_and_map(node, 0));
630 if (arch_timer_of_register() != 0) 463 if (arch_timer_of_register() != 0)
631 twd_local_timer_of_register(); 464 twd_local_timer_of_register();
632 465
633 if (arch_timer_sched_clock_init() != 0) 466 if (arch_timer_sched_clock_init() != 0)
634 versatile_sched_clock_init(v2m_sysreg_base + V2M_SYS_24MHZ, 24000000); 467 versatile_sched_clock_init(vexpress_get_24mhz_clock_base(),
468 24000000);
635} 469}
636 470
637static struct sys_timer v2m_dt_timer = { 471static struct sys_timer v2m_dt_timer = {
638 .init = v2m_dt_timer_init, 472 .init = v2m_dt_timer_init,
639}; 473};
640 474
641static struct of_dev_auxdata v2m_dt_auxdata_lookup[] __initdata = { 475static const struct of_device_id v2m_dt_bus_match[] __initconst = {
642 OF_DEV_AUXDATA("arm,vexpress-flash", V2M_NOR0, "physmap-flash", 476 { .compatible = "simple-bus", },
643 &v2m_flash_data), 477 { .compatible = "arm,amba-bus", },
644 OF_DEV_AUXDATA("arm,primecell", V2M_MMCI, "mb:mmci", &v2m_mmci_data), 478 { .compatible = "arm,vexpress,config-bus", },
645 /* RS1 memory map */
646 OF_DEV_AUXDATA("arm,vexpress-flash", 0x08000000, "physmap-flash",
647 &v2m_flash_data),
648 OF_DEV_AUXDATA("arm,primecell", 0x1c050000, "mb:mmci", &v2m_mmci_data),
649 {} 479 {}
650}; 480};
651 481
652static void __init v2m_dt_init(void) 482static void __init v2m_dt_init(void)
653{ 483{
654 l2x0_of_init(0x00400000, 0xfe0fffff); 484 l2x0_of_init(0x00400000, 0xfe0fffff);
655 of_platform_populate(NULL, of_default_bus_match_table, 485 of_platform_populate(NULL, v2m_dt_bus_match, NULL, NULL);
656 v2m_dt_auxdata_lookup, NULL); 486 pm_power_off = vexpress_power_off;
657 pm_power_off = v2m_power_off;
658} 487}
659 488
660const static char *v2m_dt_match[] __initconst = { 489static const char * const v2m_dt_match[] __initconst = {
661 "arm,vexpress", 490 "arm,vexpress",
662 "xen,xenvm", 491 "xen,xenvm",
663 NULL, 492 NULL,
@@ -672,5 +501,5 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
672 .timer = &v2m_dt_timer, 501 .timer = &v2m_dt_timer,
673 .init_machine = v2m_dt_init, 502 .init_machine = v2m_dt_init,
674 .handle_irq = gic_handle_irq, 503 .handle_irq = gic_handle_irq,
675 .restart = v2m_restart, 504 .restart = vexpress_restart,
676MACHINE_END 505MACHINE_END