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-rw-r--r--arch/arm/mach-versatile/Kconfig2
-rw-r--r--arch/arm/mach-versatile/clock.c80
-rw-r--r--arch/arm/mach-versatile/clock.h7
-rw-r--r--arch/arm/mach-versatile/core.c56
-rw-r--r--arch/arm/mach-versatile/include/mach/clkdev.h7
-rw-r--r--arch/arm/mach-versatile/include/mach/dma.h20
-rw-r--r--arch/arm/mach-versatile/include/mach/io.h8
-rw-r--r--arch/arm/mach-versatile/include/mach/irqs.h86
-rw-r--r--arch/arm/mach-versatile/include/mach/memory.h10
-rw-r--r--arch/arm/mach-versatile/include/mach/platform.h58
10 files changed, 65 insertions, 269 deletions
diff --git a/arch/arm/mach-versatile/Kconfig b/arch/arm/mach-versatile/Kconfig
index 95096afd5271..c781f30c8368 100644
--- a/arch/arm/mach-versatile/Kconfig
+++ b/arch/arm/mach-versatile/Kconfig
@@ -3,12 +3,14 @@ menu "Versatile platform type"
3 3
4config ARCH_VERSATILE_PB 4config ARCH_VERSATILE_PB
5 bool "Support Versatile/PB platform" 5 bool "Support Versatile/PB platform"
6 select CPU_ARM926T
6 default y 7 default y
7 help 8 help
8 Include support for the ARM(R) Versatile/PB platform. 9 Include support for the ARM(R) Versatile/PB platform.
9 10
10config MACH_VERSATILE_AB 11config MACH_VERSATILE_AB
11 bool "Support Versatile/AB platform" 12 bool "Support Versatile/AB platform"
13 select CPU_ARM926T
12 help 14 help
13 Include support for the ARM(R) Versatile/AP platform. 15 Include support for the ARM(R) Versatile/AP platform.
14 16
diff --git a/arch/arm/mach-versatile/clock.c b/arch/arm/mach-versatile/clock.c
index 58937f1fb38c..c50a44ea7ee6 100644
--- a/arch/arm/mach-versatile/clock.c
+++ b/arch/arm/mach-versatile/clock.c
@@ -10,6 +10,7 @@
10 */ 10 */
11#include <linux/module.h> 11#include <linux/module.h>
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/device.h>
13#include <linux/list.h> 14#include <linux/list.h>
14#include <linux/errno.h> 15#include <linux/errno.h>
15#include <linux/err.h> 16#include <linux/err.h>
@@ -17,36 +18,11 @@
17#include <linux/clk.h> 18#include <linux/clk.h>
18#include <linux/mutex.h> 19#include <linux/mutex.h>
19 20
21#include <asm/clkdev.h>
20#include <asm/hardware/icst307.h> 22#include <asm/hardware/icst307.h>
21 23
22#include "clock.h" 24#include "clock.h"
23 25
24static LIST_HEAD(clocks);
25static DEFINE_MUTEX(clocks_mutex);
26
27struct clk *clk_get(struct device *dev, const char *id)
28{
29 struct clk *p, *clk = ERR_PTR(-ENOENT);
30
31 mutex_lock(&clocks_mutex);
32 list_for_each_entry(p, &clocks, node) {
33 if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
34 clk = p;
35 break;
36 }
37 }
38 mutex_unlock(&clocks_mutex);
39
40 return clk;
41}
42EXPORT_SYMBOL(clk_get);
43
44void clk_put(struct clk *clk)
45{
46 module_put(clk->owner);
47}
48EXPORT_SYMBOL(clk_put);
49
50int clk_enable(struct clk *clk) 26int clk_enable(struct clk *clk)
51{ 27{
52 return 0; 28 return 0;
@@ -66,7 +42,9 @@ EXPORT_SYMBOL(clk_get_rate);
66 42
67long clk_round_rate(struct clk *clk, unsigned long rate) 43long clk_round_rate(struct clk *clk, unsigned long rate)
68{ 44{
69 return rate; 45 struct icst307_vco vco;
46 vco = icst307_khz_to_vco(clk->params, rate / 1000);
47 return icst307_khz(clk->params, vco) * 1000;
70} 48}
71EXPORT_SYMBOL(clk_round_rate); 49EXPORT_SYMBOL(clk_round_rate);
72 50
@@ -79,57 +57,9 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
79 57
80 vco = icst307_khz_to_vco(clk->params, rate / 1000); 58 vco = icst307_khz_to_vco(clk->params, rate / 1000);
81 clk->rate = icst307_khz(clk->params, vco) * 1000; 59 clk->rate = icst307_khz(clk->params, vco) * 1000;
82
83 printk("Clock %s: setting VCO reg params: S=%d R=%d V=%d\n",
84 clk->name, vco.s, vco.r, vco.v);
85
86 clk->setvco(clk, vco); 60 clk->setvco(clk, vco);
87 ret = 0; 61 ret = 0;
88 } 62 }
89 return ret; 63 return ret;
90} 64}
91EXPORT_SYMBOL(clk_set_rate); 65EXPORT_SYMBOL(clk_set_rate);
92
93/*
94 * These are fixed clocks.
95 */
96static struct clk kmi_clk = {
97 .name = "KMIREFCLK",
98 .rate = 24000000,
99};
100
101static struct clk uart_clk = {
102 .name = "UARTCLK",
103 .rate = 24000000,
104};
105
106static struct clk mmci_clk = {
107 .name = "MCLK",
108 .rate = 24000000,
109};
110
111int clk_register(struct clk *clk)
112{
113 mutex_lock(&clocks_mutex);
114 list_add(&clk->node, &clocks);
115 mutex_unlock(&clocks_mutex);
116 return 0;
117}
118EXPORT_SYMBOL(clk_register);
119
120void clk_unregister(struct clk *clk)
121{
122 mutex_lock(&clocks_mutex);
123 list_del(&clk->node);
124 mutex_unlock(&clocks_mutex);
125}
126EXPORT_SYMBOL(clk_unregister);
127
128static int __init clk_init(void)
129{
130 clk_register(&kmi_clk);
131 clk_register(&uart_clk);
132 clk_register(&mmci_clk);
133 return 0;
134}
135arch_initcall(clk_init);
diff --git a/arch/arm/mach-versatile/clock.h b/arch/arm/mach-versatile/clock.h
index 8b0b61dd17e4..03468fdc3e58 100644
--- a/arch/arm/mach-versatile/clock.h
+++ b/arch/arm/mach-versatile/clock.h
@@ -12,14 +12,9 @@ struct module;
12struct icst307_params; 12struct icst307_params;
13 13
14struct clk { 14struct clk {
15 struct list_head node;
16 unsigned long rate; 15 unsigned long rate;
17 struct module *owner;
18 const char *name;
19 const struct icst307_params *params; 16 const struct icst307_params *params;
17 u32 oscoff;
20 void *data; 18 void *data;
21 void (*setvco)(struct clk *, struct icst307_vco vco); 19 void (*setvco)(struct clk *, struct icst307_vco vco);
22}; 20};
23
24int clk_register(struct clk *clk);
25void clk_unregister(struct clk *clk);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index a3f1933434e2..1c43494f5c42 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -31,6 +31,7 @@
31#include <linux/cnt32_to_63.h> 31#include <linux/cnt32_to_63.h>
32#include <linux/io.h> 32#include <linux/io.h>
33 33
34#include <asm/clkdev.h>
34#include <asm/system.h> 35#include <asm/system.h>
35#include <mach/hardware.h> 36#include <mach/hardware.h>
36#include <asm/irq.h> 37#include <asm/irq.h>
@@ -373,22 +374,60 @@ static const struct icst307_params versatile_oscvco_params = {
373 374
374static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco) 375static void versatile_oscvco_set(struct clk *clk, struct icst307_vco vco)
375{ 376{
376 void __iomem *sys_lock = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LOCK_OFFSET; 377 void __iomem *sys = __io_address(VERSATILE_SYS_BASE);
377 void __iomem *sys_osc = __io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_OSCCLCD_OFFSET; 378 void __iomem *sys_lock = sys + VERSATILE_SYS_LOCK_OFFSET;
378 u32 val; 379 u32 val;
379 380
380 val = readl(sys_osc) & ~0x7ffff; 381 val = readl(sys + clk->oscoff) & ~0x7ffff;
381 val |= vco.v | (vco.r << 9) | (vco.s << 16); 382 val |= vco.v | (vco.r << 9) | (vco.s << 16);
382 383
383 writel(0xa05f, sys_lock); 384 writel(0xa05f, sys_lock);
384 writel(val, sys_osc); 385 writel(val, sys + clk->oscoff);
385 writel(0, sys_lock); 386 writel(0, sys_lock);
386} 387}
387 388
388static struct clk versatile_clcd_clk = { 389static struct clk osc4_clk = {
389 .name = "CLCDCLK",
390 .params = &versatile_oscvco_params, 390 .params = &versatile_oscvco_params,
391 .setvco = versatile_oscvco_set, 391 .oscoff = VERSATILE_SYS_OSCCLCD_OFFSET,
392 .setvco = versatile_oscvco_set,
393};
394
395/*
396 * These are fixed clocks.
397 */
398static struct clk ref24_clk = {
399 .rate = 24000000,
400};
401
402static struct clk_lookup lookups[] __initdata = {
403 { /* UART0 */
404 .dev_id = "dev:f1",
405 .clk = &ref24_clk,
406 }, { /* UART1 */
407 .dev_id = "dev:f2",
408 .clk = &ref24_clk,
409 }, { /* UART2 */
410 .dev_id = "dev:f3",
411 .clk = &ref24_clk,
412 }, { /* UART3 */
413 .dev_id = "fpga:09",
414 .clk = &ref24_clk,
415 }, { /* KMI0 */
416 .dev_id = "fpga:06",
417 .clk = &ref24_clk,
418 }, { /* KMI1 */
419 .dev_id = "fpga:07",
420 .clk = &ref24_clk,
421 }, { /* MMC0 */
422 .dev_id = "fpga:05",
423 .clk = &ref24_clk,
424 }, { /* MMC1 */
425 .dev_id = "fpga:0b",
426 .clk = &ref24_clk,
427 }, { /* CLCD */
428 .dev_id = "dev:20",
429 .clk = &osc4_clk,
430 }
392}; 431};
393 432
394/* 433/*
@@ -786,7 +825,8 @@ void __init versatile_init(void)
786{ 825{
787 int i; 826 int i;
788 827
789 clk_register(&versatile_clcd_clk); 828 for (i = 0; i < ARRAY_SIZE(lookups); i++)
829 clkdev_add(&lookups[i]);
790 830
791 platform_device_register(&versatile_flash_device); 831 platform_device_register(&versatile_flash_device);
792 platform_device_register(&versatile_i2c_device); 832 platform_device_register(&versatile_i2c_device);
diff --git a/arch/arm/mach-versatile/include/mach/clkdev.h b/arch/arm/mach-versatile/include/mach/clkdev.h
new file mode 100644
index 000000000000..04b37a89801c
--- /dev/null
+++ b/arch/arm/mach-versatile/include/mach/clkdev.h
@@ -0,0 +1,7 @@
1#ifndef __ASM_MACH_CLKDEV_H
2#define __ASM_MACH_CLKDEV_H
3
4#define __clk_get(clk) ({ 1; })
5#define __clk_put(clk) do { } while (0)
6
7#endif
diff --git a/arch/arm/mach-versatile/include/mach/dma.h b/arch/arm/mach-versatile/include/mach/dma.h
deleted file mode 100644
index 0aabf12c8834..000000000000
--- a/arch/arm/mach-versatile/include/mach/dma.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * arch/arm/mach-versatile/include/mach/dma.h
3 *
4 * Copyright (C) 2003 ARM Limited.
5 * Copyright (C) 1997,1998 Russell King
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
index c0b9dd1d0257..f067c14c7182 100644
--- a/arch/arm/mach-versatile/include/mach/io.h
+++ b/arch/arm/mach-versatile/include/mach/io.h
@@ -22,11 +22,7 @@
22 22
23#define IO_SPACE_LIMIT 0xffffffff 23#define IO_SPACE_LIMIT 0xffffffff
24 24
25static inline void __iomem *__io(unsigned long addr) 25#define __io(a) __typesafe_io(a)
26{ 26#define __mem_pci(a) (a)
27 return (void __iomem *)addr;
28}
29#define __io(a) __io(a)
30#define __mem_pci(a) (a)
31 27
32#endif 28#endif
diff --git a/arch/arm/mach-versatile/include/mach/irqs.h b/arch/arm/mach-versatile/include/mach/irqs.h
index 216a1312e62e..9bfdb30e1f3f 100644
--- a/arch/arm/mach-versatile/include/mach/irqs.h
+++ b/arch/arm/mach-versatile/include/mach/irqs.h
@@ -60,39 +60,6 @@
60#define IRQ_VICSOURCE31 (IRQ_VIC_START + INT_VICSOURCE31) 60#define IRQ_VICSOURCE31 (IRQ_VIC_START + INT_VICSOURCE31)
61#define IRQ_VIC_END (IRQ_VIC_START + 31) 61#define IRQ_VIC_END (IRQ_VIC_START + 31)
62 62
63#define IRQMASK_WDOGINT INTMASK_WDOGINT
64#define IRQMASK_SOFTINT INTMASK_SOFTINT
65#define IRQMASK_COMMRx INTMASK_COMMRx
66#define IRQMASK_COMMTx INTMASK_COMMTx
67#define IRQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
68#define IRQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
69#define IRQMASK_GPIOINT0 INTMASK_GPIOINT0
70#define IRQMASK_GPIOINT1 INTMASK_GPIOINT1
71#define IRQMASK_GPIOINT2 INTMASK_GPIOINT2
72#define IRQMASK_GPIOINT3 INTMASK_GPIOINT3
73#define IRQMASK_RTCINT INTMASK_RTCINT
74#define IRQMASK_SSPINT INTMASK_SSPINT
75#define IRQMASK_UARTINT0 INTMASK_UARTINT0
76#define IRQMASK_UARTINT1 INTMASK_UARTINT1
77#define IRQMASK_UARTINT2 INTMASK_UARTINT2
78#define IRQMASK_SCIINT INTMASK_SCIINT
79#define IRQMASK_CLCDINT INTMASK_CLCDINT
80#define IRQMASK_DMAINT INTMASK_DMAINT
81#define IRQMASK_PWRFAILINT INTMASK_PWRFAILINT
82#define IRQMASK_MBXINT INTMASK_MBXINT
83#define IRQMASK_GNDINT INTMASK_GNDINT
84#define IRQMASK_VICSOURCE21 INTMASK_VICSOURCE21
85#define IRQMASK_VICSOURCE22 INTMASK_VICSOURCE22
86#define IRQMASK_VICSOURCE23 INTMASK_VICSOURCE23
87#define IRQMASK_VICSOURCE24 INTMASK_VICSOURCE24
88#define IRQMASK_VICSOURCE25 INTMASK_VICSOURCE25
89#define IRQMASK_VICSOURCE26 INTMASK_VICSOURCE26
90#define IRQMASK_VICSOURCE27 INTMASK_VICSOURCE27
91#define IRQMASK_VICSOURCE28 INTMASK_VICSOURCE28
92#define IRQMASK_VICSOURCE29 INTMASK_VICSOURCE29
93#define IRQMASK_VICSOURCE30 INTMASK_VICSOURCE30
94#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31
95
96/* 63/*
97 * FIQ interrupts definitions are the same as the INT definitions. 64 * FIQ interrupts definitions are the same as the INT definitions.
98 */ 65 */
@@ -130,39 +97,6 @@
130#define FIQ_VICSOURCE31 INT_VICSOURCE31 97#define FIQ_VICSOURCE31 INT_VICSOURCE31
131 98
132 99
133#define FIQMASK_WDOGINT INTMASK_WDOGINT
134#define FIQMASK_SOFTINT INTMASK_SOFTINT
135#define FIQMASK_COMMRx INTMASK_COMMRx
136#define FIQMASK_COMMTx INTMASK_COMMTx
137#define FIQMASK_TIMERINT0_1 INTMASK_TIMERINT0_1
138#define FIQMASK_TIMERINT2_3 INTMASK_TIMERINT2_3
139#define FIQMASK_GPIOINT0 INTMASK_GPIOINT0
140#define FIQMASK_GPIOINT1 INTMASK_GPIOINT1
141#define FIQMASK_GPIOINT2 INTMASK_GPIOINT2
142#define FIQMASK_GPIOINT3 INTMASK_GPIOINT3
143#define FIQMASK_RTCINT INTMASK_RTCINT
144#define FIQMASK_SSPINT INTMASK_SSPINT
145#define FIQMASK_UARTINT0 INTMASK_UARTINT0
146#define FIQMASK_UARTINT1 INTMASK_UARTINT1
147#define FIQMASK_UARTINT2 INTMASK_UARTINT2
148#define FIQMASK_SCIINT INTMASK_SCIINT
149#define FIQMASK_CLCDINT INTMASK_CLCDINT
150#define FIQMASK_DMAINT INTMASK_DMAINT
151#define FIQMASK_PWRFAILINT INTMASK_PWRFAILINT
152#define FIQMASK_MBXINT INTMASK_MBXINT
153#define FIQMASK_GNDINT INTMASK_GNDINT
154#define FIQMASK_VICSOURCE21 INTMASK_VICSOURCE21
155#define FIQMASK_VICSOURCE22 INTMASK_VICSOURCE22
156#define FIQMASK_VICSOURCE23 INTMASK_VICSOURCE23
157#define FIQMASK_VICSOURCE24 INTMASK_VICSOURCE24
158#define FIQMASK_VICSOURCE25 INTMASK_VICSOURCE25
159#define FIQMASK_VICSOURCE26 INTMASK_VICSOURCE26
160#define FIQMASK_VICSOURCE27 INTMASK_VICSOURCE27
161#define FIQMASK_VICSOURCE28 INTMASK_VICSOURCE28
162#define FIQMASK_VICSOURCE29 INTMASK_VICSOURCE29
163#define FIQMASK_VICSOURCE30 INTMASK_VICSOURCE30
164#define FIQMASK_VICSOURCE31 INTMASK_VICSOURCE31
165
166/* 100/*
167 * Secondary interrupt controller 101 * Secondary interrupt controller
168 */ 102 */
@@ -188,24 +122,4 @@
188#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3) 122#define IRQ_SIC_PCI3 (IRQ_SIC_START + SIC_INT_PCI3)
189#define IRQ_SIC_END 63 123#define IRQ_SIC_END 63
190 124
191#define SIC_IRQMASK_MMCI0B SIC_INTMASK_MMCI0B
192#define SIC_IRQMASK_MMCI1B SIC_INTMASK_MMCI1B
193#define SIC_IRQMASK_KMI0 SIC_INTMASK_KMI0
194#define SIC_IRQMASK_KMI1 SIC_INTMASK_KMI1
195#define SIC_IRQMASK_SCI3 SIC_INTMASK_SCI3
196#define SIC_IRQMASK_UART3 SIC_INTMASK_UART3
197#define SIC_IRQMASK_CLCD SIC_INTMASK_CLCD
198#define SIC_IRQMASK_TOUCH SIC_INTMASK_TOUCH
199#define SIC_IRQMASK_KEYPAD SIC_INTMASK_KEYPAD
200#define SIC_IRQMASK_DoC SIC_INTMASK_DoC
201#define SIC_IRQMASK_MMCI0A SIC_INTMASK_MMCI0A
202#define SIC_IRQMASK_MMCI1A SIC_INTMASK_MMCI1A
203#define SIC_IRQMASK_AACI SIC_INTMASK_AACI
204#define SIC_IRQMASK_ETH SIC_INTMASK_ETH
205#define SIC_IRQMASK_USB SIC_INTMASK_USB
206#define SIC_IRQMASK_PCI0 SIC_INTMASK_PCI0
207#define SIC_IRQMASK_PCI1 SIC_INTMASK_PCI1
208#define SIC_IRQMASK_PCI2 SIC_INTMASK_PCI2
209#define SIC_IRQMASK_PCI3 SIC_INTMASK_PCI3
210
211#define NR_IRQS 64 125#define NR_IRQS 64
diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h
index b6315c0602ac..79aeab86b903 100644
--- a/arch/arm/mach-versatile/include/mach/memory.h
+++ b/arch/arm/mach-versatile/include/mach/memory.h
@@ -25,14 +25,4 @@
25 */ 25 */
26#define PHYS_OFFSET UL(0x00000000) 26#define PHYS_OFFSET UL(0x00000000)
27 27
28/*
29 * Virtual view <-> DMA view memory address translations
30 * virt_to_bus: Used to translate the virtual address to an
31 * address suitable to be passed to set_dma_addr
32 * bus_to_virt: Used to convert an address for DMA operations
33 * to an address that the kernel can use.
34 */
35#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
36#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
37
38#endif 28#endif
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h
index f91ba930ca8a..83207395191a 100644
--- a/arch/arm/mach-versatile/include/mach/platform.h
+++ b/arch/arm/mach-versatile/include/mach/platform.h
@@ -347,44 +347,6 @@
347#define INT_VICSOURCE30 30 /* PCI 3 */ 347#define INT_VICSOURCE30 30 /* PCI 3 */
348#define INT_VICSOURCE31 31 /* SIC source */ 348#define INT_VICSOURCE31 31 /* SIC source */
349 349
350/*
351 * Interrupt bit positions
352 *
353 */
354#define INTMASK_WDOGINT (1 << INT_WDOGINT)
355#define INTMASK_SOFTINT (1 << INT_SOFTINT)
356#define INTMASK_COMMRx (1 << INT_COMMRx)
357#define INTMASK_COMMTx (1 << INT_COMMTx)
358#define INTMASK_TIMERINT0_1 (1 << INT_TIMERINT0_1)
359#define INTMASK_TIMERINT2_3 (1 << INT_TIMERINT2_3)
360#define INTMASK_GPIOINT0 (1 << INT_GPIOINT0)
361#define INTMASK_GPIOINT1 (1 << INT_GPIOINT1)
362#define INTMASK_GPIOINT2 (1 << INT_GPIOINT2)
363#define INTMASK_GPIOINT3 (1 << INT_GPIOINT3)
364#define INTMASK_RTCINT (1 << INT_RTCINT)
365#define INTMASK_SSPINT (1 << INT_SSPINT)
366#define INTMASK_UARTINT0 (1 << INT_UARTINT0)
367#define INTMASK_UARTINT1 (1 << INT_UARTINT1)
368#define INTMASK_UARTINT2 (1 << INT_UARTINT2)
369#define INTMASK_SCIINT (1 << INT_SCIINT)
370#define INTMASK_CLCDINT (1 << INT_CLCDINT)
371#define INTMASK_DMAINT (1 << INT_DMAINT)
372#define INTMASK_PWRFAILINT (1 << INT_PWRFAILINT)
373#define INTMASK_MBXINT (1 << INT_MBXINT)
374#define INTMASK_GNDINT (1 << INT_GNDINT)
375#define INTMASK_VICSOURCE21 (1 << INT_VICSOURCE21)
376#define INTMASK_VICSOURCE22 (1 << INT_VICSOURCE22)
377#define INTMASK_VICSOURCE23 (1 << INT_VICSOURCE23)
378#define INTMASK_VICSOURCE24 (1 << INT_VICSOURCE24)
379#define INTMASK_VICSOURCE25 (1 << INT_VICSOURCE25)
380#define INTMASK_VICSOURCE26 (1 << INT_VICSOURCE26)
381#define INTMASK_VICSOURCE27 (1 << INT_VICSOURCE27)
382#define INTMASK_VICSOURCE28 (1 << INT_VICSOURCE28)
383#define INTMASK_VICSOURCE29 (1 << INT_VICSOURCE29)
384#define INTMASK_VICSOURCE30 (1 << INT_VICSOURCE30)
385#define INTMASK_VICSOURCE31 (1 << INT_VICSOURCE31)
386
387
388#define VERSATILE_SC_VALID_INT 0x003FFFFF 350#define VERSATILE_SC_VALID_INT 0x003FFFFF
389 351
390#define MAXIRQNUM 31 352#define MAXIRQNUM 31
@@ -417,26 +379,6 @@
417#define SIC_INT_PCI3 30 379#define SIC_INT_PCI3 30
418 380
419 381
420#define SIC_INTMASK_MMCI0B (1 << SIC_INT_MMCI0B)
421#define SIC_INTMASK_MMCI1B (1 << SIC_INT_MMCI1B)
422#define SIC_INTMASK_KMI0 (1 << SIC_INT_KMI0)
423#define SIC_INTMASK_KMI1 (1 << SIC_INT_KMI1)
424#define SIC_INTMASK_SCI3 (1 << SIC_INT_SCI3)
425#define SIC_INTMASK_UART3 (1 << SIC_INT_UART3)
426#define SIC_INTMASK_CLCD (1 << SIC_INT_CLCD)
427#define SIC_INTMASK_TOUCH (1 << SIC_INT_TOUCH)
428#define SIC_INTMASK_KEYPAD (1 << SIC_INT_KEYPAD)
429#define SIC_INTMASK_DoC (1 << SIC_INT_DoC)
430#define SIC_INTMASK_MMCI0A (1 << SIC_INT_MMCI0A)
431#define SIC_INTMASK_MMCI1A (1 << SIC_INT_MMCI1A)
432#define SIC_INTMASK_AACI (1 << SIC_INT_AACI)
433#define SIC_INTMASK_ETH (1 << SIC_INT_ETH)
434#define SIC_INTMASK_USB (1 << SIC_INT_USB)
435#define SIC_INTMASK_PCI0 (1 << SIC_INT_PCI0)
436#define SIC_INTMASK_PCI1 (1 << SIC_INT_PCI1)
437#define SIC_INTMASK_PCI2 (1 << SIC_INT_PCI2)
438#define SIC_INTMASK_PCI3 (1 << SIC_INT_PCI3)
439
440/* 382/*
441 * Clean base - dummy 383 * Clean base - dummy
442 * 384 *
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