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-rw-r--r--arch/arm/mach-versatile/versatile_pb.c109
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1/*
2 * linux/arch/arm/mach-versatile/versatile_pb.c
3 *
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/config.h>
23#include <linux/init.h>
24#include <linux/device.h>
25#include <linux/sysdev.h>
26
27#include <asm/hardware.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/mach-types.h>
31#include <asm/hardware/amba.h>
32
33#include <asm/mach/arch.h>
34#include <asm/mach/mmc.h>
35
36#include "core.h"
37
38#if 1
39#define IRQ_MMCI1A IRQ_VICSOURCE23
40#else
41#define IRQ_MMCI1A IRQ_SIC_MMCI1A
42#endif
43
44static struct mmc_platform_data mmc1_plat_data = {
45 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
46 .status = mmc_status,
47};
48
49#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ }
50#define UART3_DMA { 0x86, 0x87 }
51#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ }
52#define SCI1_DMA { 0x88, 0x89 }
53#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B }
54#define MMCI1_DMA { 0x85, 0 }
55
56/*
57 * These devices are connected via the core APB bridge
58 */
59#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ }
60#define GPIO2_DMA { 0, 0 }
61#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ }
62#define GPIO3_DMA { 0, 0 }
63
64/*
65 * These devices are connected via the DMA APB bridge
66 */
67
68/* FPGA Primecells */
69AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
70AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL);
71AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data);
72
73/* DevChip Primecells */
74AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
75AMBA_DEVICE(gpio3, "dev:e7", GPIO3, NULL);
76
77static struct amba_device *amba_devs[] __initdata = {
78 &uart3_device,
79 &gpio2_device,
80 &gpio3_device,
81 &sci1_device,
82 &mmc1_device,
83};
84
85static int __init versatile_pb_init(void)
86{
87 int i;
88
89 if (machine_is_versatile_pb()) {
90 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
91 struct amba_device *d = amba_devs[i];
92 amba_device_register(d, &iomem_resource);
93 }
94 }
95
96 return 0;
97}
98
99arch_initcall(versatile_pb_init);
100
101MACHINE_START(VERSATILE_PB, "ARM-Versatile PB")
102 MAINTAINER("ARM Ltd/Deep Blue Solutions Ltd")
103 BOOT_MEM(0x00000000, 0x101f1000, 0xf11f1000)
104 BOOT_PARAMS(0x00000100)
105 MAPIO(versatile_map_io)
106 INITIRQ(versatile_init_irq)
107 .timer = &versatile_timer,
108 INIT_MACHINE(versatile_init)
109MACHINE_END