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-rw-r--r--arch/arm/mach-ux500/board-mop500-pins.c34
1 files changed, 24 insertions, 10 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c
index 0009ca2d5040..05102ad6e0a0 100644
--- a/arch/arm/mach-ux500/board-mop500-pins.c
+++ b/arch/arm/mach-ux500/board-mop500-pins.c
@@ -71,6 +71,10 @@ BIAS(in_wkup_pdis_en, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
71 PIN_SLPM_PDIS_ENABLED); 71 PIN_SLPM_PDIS_ENABLED);
72BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE| 72BIAS(in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|
73 PIN_SLPM_PDIS_DISABLED); 73 PIN_SLPM_PDIS_DISABLED);
74BIAS(out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|
75 PIN_SLPM_PDIS_DISABLED);
76BIAS(out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|
77 PIN_SLPM_PDIS_DISABLED);
74 78
75/* We use these to define hog settings that are always done on boot */ 79/* We use these to define hog settings that are always done on boot */
76#define DB8500_MUX_HOG(group,func) \ 80#define DB8500_MUX_HOG(group,func) \
@@ -128,7 +132,7 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
128 * UART0, we do not mux in u0 here. 132 * UART0, we do not mux in u0 here.
129 * uart-0 pins gpio configuration should be kept intact to prevent 133 * uart-0 pins gpio configuration should be kept intact to prevent
130 * a glitch in tx line when the tty dev is opened. Later these pins 134 * a glitch in tx line when the tty dev is opened. Later these pins
131 * are configured to uart mop500_pins_uart0 135 * are configured by uart driver
132 */ 136 */
133 DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */ 137 DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
134 DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */ 138 DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
@@ -139,12 +143,18 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
139 * TODO: is this used on U8500 variants and Snowball really? 143 * TODO: is this used on U8500 variants and Snowball really?
140 * The setting on GPIO31 conflicts with magnetometer use on hrefv60 144 * The setting on GPIO31 conflicts with magnetometer use on hrefv60
141 */ 145 */
142 DB8500_MUX_HOG("u2rxtx_c_1", "u2"), 146 /* default state for UART2 */
143 DB8500_MUX_HOG("u2ctsrts_c_1", "u2"), 147 DB8500_MUX("u2ctsrts_c_1", "u2", "uart2"),
144 DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */ 148 DB8500_PIN("GPIO31_V3", in_pu, "uart2"), /* CTS */
145 DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */ 149 DB8500_PIN("GPIO32_V2", out_hi, "uart2"), /* RTS */
146 DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */ 150 DB8500_MUX("u2rxtx_c_1", "u2", "uart2"),
147 DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */ 151 DB8500_PIN("GPIO29_W2", in_pu, "uart2"), /* RXD */
152 DB8500_PIN("GPIO30_W3", out_hi, "uart2"), /* TXD */
153 /* Sleep state for UART2 */
154 DB8500_PIN_SLEEP("GPIO31_V3", in_wkup_pdis, "uart2"),
155 DB8500_PIN_SLEEP("GPIO32_V2", out_hi_wkup_pdis, "uart2"),
156 DB8500_PIN_SLEEP("GPIO29_W2", in_wkup_pdis, "uart2"),
157 DB8500_PIN_SLEEP("GPIO30_W3", out_wkup_pdis, "uart2"),
148 /* 158 /*
149 * The following pin sets were known as "runtime pins" before being 159 * The following pin sets were known as "runtime pins" before being
150 * converted to the pinctrl model. Here we model them as "default" 160 * converted to the pinctrl model. Here we model them as "default"
@@ -161,6 +171,13 @@ static struct pinctrl_map __initdata mop500_family_pinmap[] = {
161 DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"), 171 DB8500_PIN_SLEEP("GPIO1_AJ3", slpm_out_hi_wkup_pdis, "uart0"),
162 DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"), 172 DB8500_PIN_SLEEP("GPIO2_AH4", slpm_in_wkup_pdis, "uart0"),
163 DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"), 173 DB8500_PIN_SLEEP("GPIO3_AH3", slpm_out_wkup_pdis, "uart0"),
174 /* Mux in UART1 after initialization */
175 DB8500_MUX("u1rxtx_a_1", "u1", "uart1"),
176 DB8500_PIN("GPIO4_AH6", in_pu, "uart1"), /* RXD */
177 DB8500_PIN("GPIO5_AG6", out_hi, "uart1"), /* TXD */
178 /* Sleep state for UART1 */
179 DB8500_PIN_SLEEP("GPIO4_AH6", slpm_in_wkup_pdis, "uart1"),
180 DB8500_PIN_SLEEP("GPIO5_AG6", slpm_out_wkup_pdis, "uart1"),
164 /* MSP1 for ALSA codec */ 181 /* MSP1 for ALSA codec */
165 DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"), 182 DB8500_MUX("msp1txrx_a_1", "msp1", "ux500-msp-i2s.1"),
166 DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"), 183 DB8500_MUX("msp1_a_1", "msp1", "ux500-msp-i2s.1"),
@@ -374,11 +391,8 @@ static struct pinctrl_map __initdata mop500_pinmap[] = {
374 DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu), 391 DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
375 /* Mux in UART1 and set the pull-ups */ 392 /* Mux in UART1 and set the pull-ups */
376 DB8500_MUX_HOG("u1rxtx_a_1", "u1"), 393 DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
377 DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
378 DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */ 394 DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
379 DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */ 395 DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
380 DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
381 DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
382 /* 396 /*
383 * Runtime stuff: make it possible to mux in the SKE keypad 397 * Runtime stuff: make it possible to mux in the SKE keypad
384 * and bias the pins 398 * and bias the pins