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-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.c788
-rw-r--r--arch/arm/mach-ux500/board-mop500-regulators.h8
-rw-r--r--arch/arm/mach-ux500/board-mop500-sdi.c52
-rw-r--r--arch/arm/mach-ux500/board-mop500.c62
-rw-r--r--arch/arm/mach-ux500/board-mop500.h1
-rw-r--r--arch/arm/mach-ux500/cache-l2x0.c4
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c6
-rw-r--r--arch/arm/mach-ux500/cpuidle.c58
-rw-r--r--arch/arm/mach-ux500/platsmp.c8
9 files changed, 801 insertions, 186 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.c b/arch/arm/mach-ux500/board-mop500-regulators.c
index 2a17bc506cff..33c353bc1c4a 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.c
+++ b/arch/arm/mach-ux500/board-mop500-regulators.c
@@ -5,6 +5,7 @@
5 * 5 *
6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com> 6 * Authors: Sundar Iyer <sundar.iyer@stericsson.com>
7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com> 7 * Bengt Jonsson <bengt.g.jonsson@stericsson.com>
8 * Daniel Willerud <daniel.willerud@stericsson.com>
8 * 9 *
9 * MOP500 board specific initialization for regulators 10 * MOP500 board specific initialization for regulators
10 */ 11 */
@@ -12,6 +13,7 @@
12#include <linux/regulator/machine.h> 13#include <linux/regulator/machine.h>
13#include <linux/regulator/ab8500.h> 14#include <linux/regulator/ab8500.h>
14#include "board-mop500-regulators.h" 15#include "board-mop500-regulators.h"
16#include "id.h"
15 17
16static struct regulator_consumer_supply gpio_en_3v3_consumers[] = { 18static struct regulator_consumer_supply gpio_en_3v3_consumers[] = {
17 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"), 19 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
@@ -28,6 +30,20 @@ struct regulator_init_data gpio_en_3v3_regulator = {
28 .consumer_supplies = gpio_en_3v3_consumers, 30 .consumer_supplies = gpio_en_3v3_consumers,
29}; 31};
30 32
33static struct regulator_consumer_supply sdi0_reg_consumers[] = {
34 REGULATOR_SUPPLY("vqmmc", "sdi0"),
35};
36
37struct regulator_init_data sdi0_reg_init_data = {
38 .constraints = {
39 .min_uV = 1800000,
40 .max_uV = 2900000,
41 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE|REGULATOR_CHANGE_STATUS,
42 },
43 .num_consumer_supplies = ARRAY_SIZE(sdi0_reg_consumers),
44 .consumer_supplies = sdi0_reg_consumers,
45};
46
31/* 47/*
32 * TPS61052 regulator 48 * TPS61052 regulator
33 */ 49 */
@@ -53,21 +69,37 @@ struct regulator_init_data tps61052_regulator = {
53}; 69};
54 70
55static struct regulator_consumer_supply ab8500_vaux1_consumers[] = { 71static struct regulator_consumer_supply ab8500_vaux1_consumers[] = {
56 /* External displays, connector on board 2v5 power supply */ 72 /* Main display, u8500 R3 uib */
57 REGULATOR_SUPPLY("vaux12v5", "mcde.0"), 73 REGULATOR_SUPPLY("vddi", "mcde_disp_sony_acx424akp.0"),
74 /* Main display, u8500 uib and ST uib */
75 REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.0"),
76 /* Secondary display, ST uib */
77 REGULATOR_SUPPLY("vdd1", "samsung_s6d16d0.1"),
58 /* SFH7741 proximity sensor */ 78 /* SFH7741 proximity sensor */
59 REGULATOR_SUPPLY("vcc", "gpio-keys.0"), 79 REGULATOR_SUPPLY("vcc", "gpio-keys.0"),
60 /* BH1780GLS ambient light sensor */ 80 /* BH1780GLS ambient light sensor */
61 REGULATOR_SUPPLY("vcc", "2-0029"), 81 REGULATOR_SUPPLY("vcc", "2-0029"),
62 /* lsm303dlh accelerometer */ 82 /* lsm303dlh accelerometer */
63 REGULATOR_SUPPLY("vdd", "3-0018"), 83 REGULATOR_SUPPLY("vdd", "2-0018"),
84 /* lsm303dlhc accelerometer */
85 REGULATOR_SUPPLY("vdd", "2-0019"),
64 /* lsm303dlh magnetometer */ 86 /* lsm303dlh magnetometer */
65 REGULATOR_SUPPLY("vdd", "3-001e"), 87 REGULATOR_SUPPLY("vdd", "2-001e"),
66 /* Rohm BU21013 Touchscreen devices */ 88 /* Rohm BU21013 Touchscreen devices */
67 REGULATOR_SUPPLY("avdd", "3-005c"), 89 REGULATOR_SUPPLY("avdd", "3-005c"),
68 REGULATOR_SUPPLY("avdd", "3-005d"), 90 REGULATOR_SUPPLY("avdd", "3-005d"),
69 /* Synaptics RMI4 Touchscreen device */ 91 /* Synaptics RMI4 Touchscreen device */
70 REGULATOR_SUPPLY("vdd", "3-004b"), 92 REGULATOR_SUPPLY("vdd", "3-004b"),
93 /* L3G4200D Gyroscope device */
94 REGULATOR_SUPPLY("vdd", "2-0068"),
95 /* Ambient light sensor device */
96 REGULATOR_SUPPLY("vdd", "3-0029"),
97 /* Pressure sensor device */
98 REGULATOR_SUPPLY("vdd", "2-005c"),
99 /* Cypress TrueTouch Touchscreen device */
100 REGULATOR_SUPPLY("vcpin", "spi8.0"),
101 /* Camera device */
102 REGULATOR_SUPPLY("vaux12v5", "mmio_camera"),
71}; 103};
72 104
73static struct regulator_consumer_supply ab8500_vaux2_consumers[] = { 105static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
@@ -75,18 +107,50 @@ static struct regulator_consumer_supply ab8500_vaux2_consumers[] = {
75 REGULATOR_SUPPLY("vmmc", "sdi4"), 107 REGULATOR_SUPPLY("vmmc", "sdi4"),
76 /* AB8500 audio codec */ 108 /* AB8500 audio codec */
77 REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"), 109 REGULATOR_SUPPLY("vcc-N2158", "ab8500-codec.0"),
110 /* AB8500 accessory detect 1 */
111 REGULATOR_SUPPLY("vcc-N2158", "ab8500-acc-det.0"),
112 /* AB8500 Tv-out device */
113 REGULATOR_SUPPLY("vcc-N2158", "mcde_tv_ab8500.4"),
114 /* AV8100 HDMI device */
115 REGULATOR_SUPPLY("vcc-N2158", "av8100_hdmi.3"),
78}; 116};
79 117
80static struct regulator_consumer_supply ab8500_vaux3_consumers[] = { 118static struct regulator_consumer_supply ab8500_vaux3_consumers[] = {
119 REGULATOR_SUPPLY("v-SD-STM", "stm"),
81 /* External MMC slot power */ 120 /* External MMC slot power */
82 REGULATOR_SUPPLY("vmmc", "sdi0"), 121 REGULATOR_SUPPLY("vmmc", "sdi0"),
83}; 122};
84 123
124static struct regulator_consumer_supply ab8505_vaux4_consumers[] = {
125};
126
127static struct regulator_consumer_supply ab8505_vaux5_consumers[] = {
128};
129
130static struct regulator_consumer_supply ab8505_vaux6_consumers[] = {
131};
132
133static struct regulator_consumer_supply ab8505_vaux8_consumers[] = {
134 /* AB8500 audio codec device */
135 REGULATOR_SUPPLY("v-aux8", NULL),
136};
137
138static struct regulator_consumer_supply ab8505_vadc_consumers[] = {
139 /* Internal general-purpose ADC */
140 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
141 /* ADC for charger */
142 REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
143};
144
85static struct regulator_consumer_supply ab8500_vtvout_consumers[] = { 145static struct regulator_consumer_supply ab8500_vtvout_consumers[] = {
86 /* TV-out DENC supply */ 146 /* TV-out DENC supply */
87 REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"), 147 REGULATOR_SUPPLY("vtvout", "ab8500-denc.0"),
88 /* Internal general-purpose ADC */ 148 /* Internal general-purpose ADC */
89 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"), 149 REGULATOR_SUPPLY("vddadc", "ab8500-gpadc.0"),
150 /* ADC for charger */
151 REGULATOR_SUPPLY("vddadc", "ab8500-charger.0"),
152 /* AB8500 Tv-out device */
153 REGULATOR_SUPPLY("vtvout", "mcde_tv_ab8500.4"),
90}; 154};
91 155
92static struct regulator_consumer_supply ab8500_vaud_consumers[] = { 156static struct regulator_consumer_supply ab8500_vaud_consumers[] = {
@@ -114,77 +178,90 @@ static struct regulator_consumer_supply ab8500_vintcore_consumers[] = {
114 REGULATOR_SUPPLY("v-intcore", NULL), 178 REGULATOR_SUPPLY("v-intcore", NULL),
115 /* USB Transceiver */ 179 /* USB Transceiver */
116 REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"), 180 REGULATOR_SUPPLY("vddulpivio18", "ab8500-usb.0"),
181 /* Handled by abx500 clk driver */
182 REGULATOR_SUPPLY("v-intcore", "abx500-clk.0"),
183};
184
185static struct regulator_consumer_supply ab8505_usb_consumers[] = {
186 /* HS USB OTG physical interface */
187 REGULATOR_SUPPLY("v-ape", NULL),
117}; 188};
118 189
119static struct regulator_consumer_supply ab8500_vana_consumers[] = { 190static struct regulator_consumer_supply ab8500_vana_consumers[] = {
120 /* External displays, connector on board, 1v8 power supply */ 191 /* DB8500 DSI */
121 REGULATOR_SUPPLY("vsmps2", "mcde.0"), 192 REGULATOR_SUPPLY("vdddsi1v2", "mcde"),
193 REGULATOR_SUPPLY("vdddsi1v2", "b2r2_core"),
194 REGULATOR_SUPPLY("vdddsi1v2", "b2r2_1_core"),
195 REGULATOR_SUPPLY("vdddsi1v2", "dsilink.0"),
196 REGULATOR_SUPPLY("vdddsi1v2", "dsilink.1"),
197 REGULATOR_SUPPLY("vdddsi1v2", "dsilink.2"),
198 /* DB8500 CSI */
199 REGULATOR_SUPPLY("vddcsi1v2", "mmio_camera"),
122}; 200};
123 201
124/* ab8500 regulator register initialization */ 202/* ab8500 regulator register initialization */
125struct ab8500_regulator_reg_init 203static struct ab8500_regulator_reg_init ab8500_reg_init[] = {
126ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
127 /* 204 /*
128 * VanaRequestCtrl = HP/LP depending on VxRequest 205 * VanaRequestCtrl = HP/LP depending on VxRequest
129 * VextSupply1RequestCtrl = HP/LP depending on VxRequest 206 * VextSupply1RequestCtrl = HP/LP depending on VxRequest
130 */ 207 */
131 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0x00), 208 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL2, 0xf0, 0x00),
132 /* 209 /*
133 * VextSupply2RequestCtrl = HP/LP depending on VxRequest 210 * VextSupply2RequestCtrl = HP/LP depending on VxRequest
134 * VextSupply3RequestCtrl = HP/LP depending on VxRequest 211 * VextSupply3RequestCtrl = HP/LP depending on VxRequest
135 * Vaux1RequestCtrl = HP/LP depending on VxRequest 212 * Vaux1RequestCtrl = HP/LP depending on VxRequest
136 * Vaux2RequestCtrl = HP/LP depending on VxRequest 213 * Vaux2RequestCtrl = HP/LP depending on VxRequest
137 */ 214 */
138 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0x00), 215 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL3, 0xff, 0x00),
139 /* 216 /*
140 * Vaux3RequestCtrl = HP/LP depending on VxRequest 217 * Vaux3RequestCtrl = HP/LP depending on VxRequest
141 * SwHPReq = Control through SWValid disabled 218 * SwHPReq = Control through SWValid disabled
142 */ 219 */
143 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x00), 220 INIT_REGULATOR_REGISTER(AB8500_REGUREQUESTCTRL4, 0x07, 0x00),
144 /* 221 /*
145 * VanaSysClkReq1HPValid = disabled 222 * VanaSysClkReq1HPValid = disabled
146 * Vaux1SysClkReq1HPValid = disabled 223 * Vaux1SysClkReq1HPValid = disabled
147 * Vaux2SysClkReq1HPValid = disabled 224 * Vaux2SysClkReq1HPValid = disabled
148 * Vaux3SysClkReq1HPValid = disabled 225 * Vaux3SysClkReq1HPValid = disabled
149 */ 226 */
150 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0x00), 227 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
151 /* 228 /*
152 * VextSupply1SysClkReq1HPValid = disabled 229 * VextSupply1SysClkReq1HPValid = disabled
153 * VextSupply2SysClkReq1HPValid = disabled 230 * VextSupply2SysClkReq1HPValid = disabled
154 * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled 231 * VextSupply3SysClkReq1HPValid = SysClkReq1 controlled
155 */ 232 */
156 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x40), 233 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQ1HPVALID2, 0x70, 0x40),
157 /* 234 /*
158 * VanaHwHPReq1Valid = disabled 235 * VanaHwHPReq1Valid = disabled
159 * Vaux1HwHPreq1Valid = disabled 236 * Vaux1HwHPreq1Valid = disabled
160 * Vaux2HwHPReq1Valid = disabled 237 * Vaux2HwHPReq1Valid = disabled
161 * Vaux3HwHPReqValid = disabled 238 * Vaux3HwHPReqValid = disabled
162 */ 239 */
163 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0x00), 240 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID1, 0xe8, 0x00),
164 /* 241 /*
165 * VextSupply1HwHPReq1Valid = disabled 242 * VextSupply1HwHPReq1Valid = disabled
166 * VextSupply2HwHPReq1Valid = disabled 243 * VextSupply2HwHPReq1Valid = disabled
167 * VextSupply3HwHPReq1Valid = disabled 244 * VextSupply3HwHPReq1Valid = disabled
168 */ 245 */
169 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x00), 246 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ1VALID2, 0x07, 0x00),
170 /* 247 /*
171 * VanaHwHPReq2Valid = disabled 248 * VanaHwHPReq2Valid = disabled
172 * Vaux1HwHPReq2Valid = disabled 249 * Vaux1HwHPReq2Valid = disabled
173 * Vaux2HwHPReq2Valid = disabled 250 * Vaux2HwHPReq2Valid = disabled
174 * Vaux3HwHPReq2Valid = disabled 251 * Vaux3HwHPReq2Valid = disabled
175 */ 252 */
176 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0x00), 253 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID1, 0xe8, 0x00),
177 /* 254 /*
178 * VextSupply1HwHPReq2Valid = disabled 255 * VextSupply1HwHPReq2Valid = disabled
179 * VextSupply2HwHPReq2Valid = disabled 256 * VextSupply2HwHPReq2Valid = disabled
180 * VextSupply3HwHPReq2Valid = HWReq2 controlled 257 * VextSupply3HwHPReq2Valid = HWReq2 controlled
181 */ 258 */
182 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x04), 259 INIT_REGULATOR_REGISTER(AB8500_REGUHWHPREQ2VALID2, 0x07, 0x04),
183 /* 260 /*
184 * VanaSwHPReqValid = disabled 261 * VanaSwHPReqValid = disabled
185 * Vaux1SwHPReqValid = disabled 262 * Vaux1SwHPReqValid = disabled
186 */ 263 */
187 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0x00), 264 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID1, 0xa0, 0x00),
188 /* 265 /*
189 * Vaux2SwHPReqValid = disabled 266 * Vaux2SwHPReqValid = disabled
190 * Vaux3SwHPReqValid = disabled 267 * Vaux3SwHPReqValid = disabled
@@ -192,7 +269,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
192 * VextSupply2SwHPReqValid = disabled 269 * VextSupply2SwHPReqValid = disabled
193 * VextSupply3SwHPReqValid = disabled 270 * VextSupply3SwHPReqValid = disabled
194 */ 271 */
195 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x00), 272 INIT_REGULATOR_REGISTER(AB8500_REGUSWHPREQVALID2, 0x1f, 0x00),
196 /* 273 /*
197 * SysClkReq2Valid1 = SysClkReq2 controlled 274 * SysClkReq2Valid1 = SysClkReq2 controlled
198 * SysClkReq3Valid1 = disabled 275 * SysClkReq3Valid1 = disabled
@@ -202,7 +279,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
202 * SysClkReq7Valid1 = disabled 279 * SysClkReq7Valid1 = disabled
203 * SysClkReq8Valid1 = disabled 280 * SysClkReq8Valid1 = disabled
204 */ 281 */
205 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0x2a), 282 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID1, 0xfe, 0x2a),
206 /* 283 /*
207 * SysClkReq2Valid2 = disabled 284 * SysClkReq2Valid2 = disabled
208 * SysClkReq3Valid2 = disabled 285 * SysClkReq3Valid2 = disabled
@@ -212,7 +289,7 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
212 * SysClkReq7Valid2 = disabled 289 * SysClkReq7Valid2 = disabled
213 * SysClkReq8Valid2 = disabled 290 * SysClkReq8Valid2 = disabled
214 */ 291 */
215 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0x20), 292 INIT_REGULATOR_REGISTER(AB8500_REGUSYSCLKREQVALID2, 0xfe, 0x20),
216 /* 293 /*
217 * VTVoutEna = disabled 294 * VTVoutEna = disabled
218 * Vintcore12Ena = disabled 295 * Vintcore12Ena = disabled
@@ -220,66 +297,62 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
220 * Vintcore12LP = inactive (HP) 297 * Vintcore12LP = inactive (HP)
221 * VTVoutLP = inactive (HP) 298 * VTVoutLP = inactive (HP)
222 */ 299 */
223 INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0x10), 300 INIT_REGULATOR_REGISTER(AB8500_REGUMISC1, 0xfe, 0x10),
224 /* 301 /*
225 * VaudioEna = disabled 302 * VaudioEna = disabled
226 * VdmicEna = disabled 303 * VdmicEna = disabled
227 * Vamic1Ena = disabled 304 * Vamic1Ena = disabled
228 * Vamic2Ena = disabled 305 * Vamic2Ena = disabled
229 */ 306 */
230 INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x00), 307 INIT_REGULATOR_REGISTER(AB8500_VAUDIOSUPPLY, 0x1e, 0x00),
231 /* 308 /*
232 * Vamic1_dzout = high-Z when Vamic1 is disabled 309 * Vamic1_dzout = high-Z when Vamic1 is disabled
233 * Vamic2_dzout = high-Z when Vamic2 is disabled 310 * Vamic2_dzout = high-Z when Vamic2 is disabled
234 */ 311 */
235 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x00), 312 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL1VAMIC, 0x03, 0x00),
236 /* 313 /*
237 * VPll = Hw controlled 314 * VPll = Hw controlled (NOTE! PRCMU bits)
238 * VanaRegu = force off 315 * VanaRegu = force off
239 */ 316 */
240 INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x02), 317 INIT_REGULATOR_REGISTER(AB8500_VPLLVANAREGU, 0x0f, 0x02),
241 /* 318 /*
242 * VrefDDREna = disabled 319 * VrefDDREna = disabled
243 * VrefDDRSleepMode = inactive (no pulldown) 320 * VrefDDRSleepMode = inactive (no pulldown)
244 */ 321 */
245 INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x00), 322 INIT_REGULATOR_REGISTER(AB8500_VREFDDR, 0x03, 0x00),
246 /* 323 /*
247 * VextSupply1Regu = HW control 324 * VextSupply1Regu = force LP
248 * VextSupply2Regu = HW control 325 * VextSupply2Regu = force OFF
249 * VextSupply3Regu = HW control 326 * VextSupply3Regu = force HP (-> STBB2=LP and TPS=LP)
250 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0 327 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
251 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0 328 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
252 */ 329 */
253 INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0x2a), 330 INIT_REGULATOR_REGISTER(AB8500_EXTSUPPLYREGU, 0xff, 0x13),
254 /* 331 /*
255 * Vaux1Regu = force HP 332 * Vaux1Regu = force HP
256 * Vaux2Regu = force off 333 * Vaux2Regu = force off
257 */ 334 */
258 INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x01), 335 INIT_REGULATOR_REGISTER(AB8500_VAUX12REGU, 0x0f, 0x01),
259 /*
260 * Vaux3regu = force off
261 */
262 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x00),
263 /* 336 /*
264 * Vsmps1 = 1.15V 337 * Vaux3Regu = force off
265 */ 338 */
266 INIT_REGULATOR_REGISTER(AB8500_VSMPS1SEL1, 0x24), 339 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3REGU, 0x03, 0x00),
267 /* 340 /*
268 * Vaux1Sel = 2.5 V 341 * Vaux1Sel = 2.8 V
269 */ 342 */
270 INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x08), 343 INIT_REGULATOR_REGISTER(AB8500_VAUX1SEL, 0x0f, 0x0C),
271 /* 344 /*
272 * Vaux2Sel = 2.9 V 345 * Vaux2Sel = 2.9 V
273 */ 346 */
274 INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0d), 347 INIT_REGULATOR_REGISTER(AB8500_VAUX2SEL, 0x0f, 0x0d),
275 /* 348 /*
276 * Vaux3Sel = 2.91 V 349 * Vaux3Sel = 2.91 V
277 */ 350 */
278 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07), 351 INIT_REGULATOR_REGISTER(AB8500_VRF1VAUX3SEL, 0x07, 0x07),
279 /* 352 /*
280 * VextSupply12LP = disabled (no LP) 353 * VextSupply12LP = disabled (no LP)
281 */ 354 */
282 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x00), 355 INIT_REGULATOR_REGISTER(AB8500_REGUCTRL2SPARE, 0x01, 0x00),
283 /* 356 /*
284 * Vaux1Disch = short discharge time 357 * Vaux1Disch = short discharge time
285 * Vaux2Disch = short discharge time 358 * Vaux2Disch = short discharge time
@@ -288,33 +361,26 @@ ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS] = {
288 * VTVoutDisch = short discharge time 361 * VTVoutDisch = short discharge time
289 * VaudioDisch = short discharge time 362 * VaudioDisch = short discharge time
290 */ 363 */
291 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0x00), 364 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH, 0xfc, 0x00),
292 /* 365 /*
293 * VanaDisch = short discharge time 366 * VanaDisch = short discharge time
294 * VdmicPullDownEna = pulldown disabled when Vdmic is disabled 367 * VdmicPullDownEna = pulldown disabled when Vdmic is disabled
295 * VdmicDisch = short discharge time 368 * VdmicDisch = short discharge time
296 */ 369 */
297 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x00), 370 INIT_REGULATOR_REGISTER(AB8500_REGUCTRLDISCH2, 0x16, 0x00),
298}; 371};
299 372
300/* AB8500 regulators */ 373/* AB8500 regulators */
301struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = { 374static struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
302 /* supplies to the display/camera */ 375 /* supplies to the display/camera */
303 [AB8500_LDO_AUX1] = { 376 [AB8500_LDO_AUX1] = {
304 .constraints = { 377 .constraints = {
305 .name = "V-DISPLAY", 378 .name = "V-DISPLAY",
306 .min_uV = 2500000, 379 .min_uV = 2800000,
307 .max_uV = 2900000, 380 .max_uV = 3300000,
308 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | 381 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
309 REGULATOR_CHANGE_STATUS, 382 REGULATOR_CHANGE_STATUS,
310 .boot_on = 1, /* display is on at boot */ 383 .boot_on = 1, /* display is on at boot */
311 /*
312 * This voltage cannot be disabled right now because
313 * it is somehow affecting the external MMC
314 * functionality, though that typically will use
315 * AUX3.
316 */
317 .always_on = 1,
318 }, 384 },
319 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers), 385 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
320 .consumer_supplies = ab8500_vaux1_consumers, 386 .consumer_supplies = ab8500_vaux1_consumers,
@@ -326,7 +392,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
326 .min_uV = 1100000, 392 .min_uV = 1100000,
327 .max_uV = 3300000, 393 .max_uV = 3300000,
328 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | 394 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
329 REGULATOR_CHANGE_STATUS, 395 REGULATOR_CHANGE_STATUS |
396 REGULATOR_CHANGE_MODE,
397 .valid_modes_mask = REGULATOR_MODE_NORMAL |
398 REGULATOR_MODE_IDLE,
330 }, 399 },
331 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers), 400 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
332 .consumer_supplies = ab8500_vaux2_consumers, 401 .consumer_supplies = ab8500_vaux2_consumers,
@@ -338,7 +407,10 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
338 .min_uV = 1100000, 407 .min_uV = 1100000,
339 .max_uV = 3300000, 408 .max_uV = 3300000,
340 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | 409 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
341 REGULATOR_CHANGE_STATUS, 410 REGULATOR_CHANGE_STATUS |
411 REGULATOR_CHANGE_MODE,
412 .valid_modes_mask = REGULATOR_MODE_NORMAL |
413 REGULATOR_MODE_IDLE,
342 }, 414 },
343 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers), 415 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
344 .consumer_supplies = ab8500_vaux3_consumers, 416 .consumer_supplies = ab8500_vaux3_consumers,
@@ -392,18 +464,614 @@ struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS] = {
392 [AB8500_LDO_INTCORE] = { 464 [AB8500_LDO_INTCORE] = {
393 .constraints = { 465 .constraints = {
394 .name = "V-INTCORE", 466 .name = "V-INTCORE",
395 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 467 .min_uV = 1250000,
468 .max_uV = 1350000,
469 .input_uV = 1800000,
470 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
471 REGULATOR_CHANGE_STATUS |
472 REGULATOR_CHANGE_MODE |
473 REGULATOR_CHANGE_DRMS,
474 .valid_modes_mask = REGULATOR_MODE_NORMAL |
475 REGULATOR_MODE_IDLE,
396 }, 476 },
397 .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers), 477 .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
398 .consumer_supplies = ab8500_vintcore_consumers, 478 .consumer_supplies = ab8500_vintcore_consumers,
399 }, 479 },
400 /* supply for U8500 CSI/DSI, VANA LDO */ 480 /* supply for U8500 CSI-DSI, VANA LDO */
401 [AB8500_LDO_ANA] = { 481 [AB8500_LDO_ANA] = {
402 .constraints = { 482 .constraints = {
403 .name = "V-CSI/DSI", 483 .name = "V-CSI-DSI",
404 .valid_ops_mask = REGULATOR_CHANGE_STATUS, 484 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
405 }, 485 },
406 .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers), 486 .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
407 .consumer_supplies = ab8500_vana_consumers, 487 .consumer_supplies = ab8500_vana_consumers,
408 }, 488 },
409}; 489};
490
491/* supply for VextSupply3 */
492static struct regulator_consumer_supply ab8500_ext_supply3_consumers[] = {
493 /* SIM supply for 3 V SIM cards */
494 REGULATOR_SUPPLY("vinvsim", "sim-detect.0"),
495};
496
497/* extended configuration for VextSupply2, only used for HREFP_V20 boards */
498static struct ab8500_ext_regulator_cfg ab8500_ext_supply2 = {
499 .hwreq = true,
500};
501
502/*
503 * AB8500 external regulators
504 */
505static struct regulator_init_data ab8500_ext_regulators[] = {
506 /* fixed Vbat supplies VSMPS1_EXT_1V8 */
507 [AB8500_EXT_SUPPLY1] = {
508 .constraints = {
509 .name = "ab8500-ext-supply1",
510 .min_uV = 1800000,
511 .max_uV = 1800000,
512 .initial_mode = REGULATOR_MODE_IDLE,
513 .boot_on = 1,
514 .always_on = 1,
515 },
516 },
517 /* fixed Vbat supplies VSMPS2_EXT_1V36 and VSMPS5_EXT_1V15 */
518 [AB8500_EXT_SUPPLY2] = {
519 .constraints = {
520 .name = "ab8500-ext-supply2",
521 .min_uV = 1360000,
522 .max_uV = 1360000,
523 },
524 },
525 /* fixed Vbat supplies VSMPS3_EXT_3V4 and VSMPS4_EXT_3V4 */
526 [AB8500_EXT_SUPPLY3] = {
527 .constraints = {
528 .name = "ab8500-ext-supply3",
529 .min_uV = 3400000,
530 .max_uV = 3400000,
531 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
532 .boot_on = 1,
533 },
534 .num_consumer_supplies =
535 ARRAY_SIZE(ab8500_ext_supply3_consumers),
536 .consumer_supplies = ab8500_ext_supply3_consumers,
537 },
538};
539
540/* ab8505 regulator register initialization */
541static struct ab8500_regulator_reg_init ab8505_reg_init[] = {
542 /*
543 * VarmRequestCtrl
544 * VsmpsCRequestCtrl
545 * VsmpsARequestCtrl
546 * VsmpsBRequestCtrl
547 */
548 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL1, 0x00, 0x00),
549 /*
550 * VsafeRequestCtrl
551 * VpllRequestCtrl
552 * VanaRequestCtrl = HP/LP depending on VxRequest
553 */
554 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL2, 0x30, 0x00),
555 /*
556 * Vaux1RequestCtrl = HP/LP depending on VxRequest
557 * Vaux2RequestCtrl = HP/LP depending on VxRequest
558 */
559 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL3, 0xf0, 0x00),
560 /*
561 * Vaux3RequestCtrl = HP/LP depending on VxRequest
562 * SwHPReq = Control through SWValid disabled
563 */
564 INIT_REGULATOR_REGISTER(AB8505_REGUREQUESTCTRL4, 0x07, 0x00),
565 /*
566 * VsmpsASysClkReq1HPValid
567 * VsmpsBSysClkReq1HPValid
568 * VsafeSysClkReq1HPValid
569 * VanaSysClkReq1HPValid = disabled
570 * VpllSysClkReq1HPValid
571 * Vaux1SysClkReq1HPValid = disabled
572 * Vaux2SysClkReq1HPValid = disabled
573 * Vaux3SysClkReq1HPValid = disabled
574 */
575 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID1, 0xe8, 0x00),
576 /*
577 * VsmpsCSysClkReq1HPValid
578 * VarmSysClkReq1HPValid
579 * VbbSysClkReq1HPValid
580 * VsmpsMSysClkReq1HPValid
581 */
582 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQ1HPVALID2, 0x00, 0x00),
583 /*
584 * VsmpsAHwHPReq1Valid
585 * VsmpsBHwHPReq1Valid
586 * VsafeHwHPReq1Valid
587 * VanaHwHPReq1Valid = disabled
588 * VpllHwHPReq1Valid
589 * Vaux1HwHPreq1Valid = disabled
590 * Vaux2HwHPReq1Valid = disabled
591 * Vaux3HwHPReqValid = disabled
592 */
593 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID1, 0xe8, 0x00),
594 /*
595 * VsmpsMHwHPReq1Valid
596 */
597 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ1VALID2, 0x00, 0x00),
598 /*
599 * VsmpsAHwHPReq2Valid
600 * VsmpsBHwHPReq2Valid
601 * VsafeHwHPReq2Valid
602 * VanaHwHPReq2Valid = disabled
603 * VpllHwHPReq2Valid
604 * Vaux1HwHPReq2Valid = disabled
605 * Vaux2HwHPReq2Valid = disabled
606 * Vaux3HwHPReq2Valid = disabled
607 */
608 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID1, 0xe8, 0x00),
609 /*
610 * VsmpsMHwHPReq2Valid
611 */
612 INIT_REGULATOR_REGISTER(AB8505_REGUHWHPREQ2VALID2, 0x00, 0x00),
613 /**
614 * VsmpsCSwHPReqValid
615 * VarmSwHPReqValid
616 * VsmpsASwHPReqValid
617 * VsmpsBSwHPReqValid
618 * VsafeSwHPReqValid
619 * VanaSwHPReqValid
620 * VanaSwHPReqValid = disabled
621 * VpllSwHPReqValid
622 * Vaux1SwHPReqValid = disabled
623 */
624 INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID1, 0xa0, 0x00),
625 /*
626 * Vaux2SwHPReqValid = disabled
627 * Vaux3SwHPReqValid = disabled
628 * VsmpsMSwHPReqValid
629 */
630 INIT_REGULATOR_REGISTER(AB8505_REGUSWHPREQVALID2, 0x03, 0x00),
631 /*
632 * SysClkReq2Valid1 = SysClkReq2 controlled
633 * SysClkReq3Valid1 = disabled
634 * SysClkReq4Valid1 = SysClkReq4 controlled
635 */
636 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID1, 0x0e, 0x0a),
637 /*
638 * SysClkReq2Valid2 = disabled
639 * SysClkReq3Valid2 = disabled
640 * SysClkReq4Valid2 = disabled
641 */
642 INIT_REGULATOR_REGISTER(AB8505_REGUSYSCLKREQVALID2, 0x0e, 0x00),
643 /*
644 * Vaux4SwHPReqValid
645 * Vaux4HwHPReq2Valid
646 * Vaux4HwHPReq1Valid
647 * Vaux4SysClkReq1HPValid
648 */
649 INIT_REGULATOR_REGISTER(AB8505_REGUVAUX4REQVALID, 0x00, 0x00),
650 /*
651 * VadcEna = disabled
652 * VintCore12Ena = disabled
653 * VintCore12Sel = 1.25 V
654 * VintCore12LP = inactive (HP)
655 * VadcLP = inactive (HP)
656 */
657 INIT_REGULATOR_REGISTER(AB8505_REGUMISC1, 0xfe, 0x10),
658 /*
659 * VaudioEna = disabled
660 * Vaux8Ena = disabled
661 * Vamic1Ena = disabled
662 * Vamic2Ena = disabled
663 */
664 INIT_REGULATOR_REGISTER(AB8505_VAUDIOSUPPLY, 0x1e, 0x00),
665 /*
666 * Vamic1_dzout = high-Z when Vamic1 is disabled
667 * Vamic2_dzout = high-Z when Vamic2 is disabled
668 */
669 INIT_REGULATOR_REGISTER(AB8505_REGUCTRL1VAMIC, 0x03, 0x00),
670 /*
671 * VsmpsARegu
672 * VsmpsASelCtrl
673 * VsmpsAAutoMode
674 * VsmpsAPWMMode
675 */
676 INIT_REGULATOR_REGISTER(AB8505_VSMPSAREGU, 0x00, 0x00),
677 /*
678 * VsmpsBRegu
679 * VsmpsBSelCtrl
680 * VsmpsBAutoMode
681 * VsmpsBPWMMode
682 */
683 INIT_REGULATOR_REGISTER(AB8505_VSMPSBREGU, 0x00, 0x00),
684 /*
685 * VsafeRegu
686 * VsafeSelCtrl
687 * VsafeAutoMode
688 * VsafePWMMode
689 */
690 INIT_REGULATOR_REGISTER(AB8505_VSAFEREGU, 0x00, 0x00),
691 /*
692 * VPll = Hw controlled (NOTE! PRCMU bits)
693 * VanaRegu = force off
694 */
695 INIT_REGULATOR_REGISTER(AB8505_VPLLVANAREGU, 0x0f, 0x02),
696 /*
697 * VextSupply1Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
698 * VextSupply2Regu = force OFF (OTP_ExtSupply12LPnPolarity 1)
699 * VextSupply3Regu = force OFF (OTP_ExtSupply3LPnPolarity 0)
700 * ExtSupply2Bypass = ExtSupply12LPn ball is 0 when Ena is 0
701 * ExtSupply3Bypass = ExtSupply3LPn ball is 0 when Ena is 0
702 */
703 INIT_REGULATOR_REGISTER(AB8505_EXTSUPPLYREGU, 0xff, 0x30),
704 /*
705 * Vaux1Regu = force HP
706 * Vaux2Regu = force off
707 */
708 INIT_REGULATOR_REGISTER(AB8505_VAUX12REGU, 0x0f, 0x01),
709 /*
710 * Vaux3Regu = force off
711 */
712 INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3REGU, 0x03, 0x00),
713 /*
714 * VsmpsASel1
715 */
716 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL1, 0x00, 0x00),
717 /*
718 * VsmpsASel2
719 */
720 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL2, 0x00, 0x00),
721 /*
722 * VsmpsASel3
723 */
724 INIT_REGULATOR_REGISTER(AB8505_VSMPSASEL3, 0x00, 0x00),
725 /*
726 * VsmpsBSel1
727 */
728 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL1, 0x00, 0x00),
729 /*
730 * VsmpsBSel2
731 */
732 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL2, 0x00, 0x00),
733 /*
734 * VsmpsBSel3
735 */
736 INIT_REGULATOR_REGISTER(AB8505_VSMPSBSEL3, 0x00, 0x00),
737 /*
738 * VsafeSel1
739 */
740 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL1, 0x00, 0x00),
741 /*
742 * VsafeSel2
743 */
744 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL2, 0x00, 0x00),
745 /*
746 * VsafeSel3
747 */
748 INIT_REGULATOR_REGISTER(AB8505_VSAFESEL3, 0x00, 0x00),
749 /*
750 * Vaux1Sel = 2.8 V
751 */
752 INIT_REGULATOR_REGISTER(AB8505_VAUX1SEL, 0x0f, 0x0C),
753 /*
754 * Vaux2Sel = 2.9 V
755 */
756 INIT_REGULATOR_REGISTER(AB8505_VAUX2SEL, 0x0f, 0x0d),
757 /*
758 * Vaux3Sel = 2.91 V
759 */
760 INIT_REGULATOR_REGISTER(AB8505_VRF1VAUX3SEL, 0x07, 0x07),
761 /*
762 * Vaux4RequestCtrl
763 */
764 INIT_REGULATOR_REGISTER(AB8505_VAUX4REQCTRL, 0x00, 0x00),
765 /*
766 * Vaux4Regu
767 */
768 INIT_REGULATOR_REGISTER(AB8505_VAUX4REGU, 0x00, 0x00),
769 /*
770 * Vaux4Sel
771 */
772 INIT_REGULATOR_REGISTER(AB8505_VAUX4SEL, 0x00, 0x00),
773 /*
774 * Vaux1Disch = short discharge time
775 * Vaux2Disch = short discharge time
776 * Vaux3Disch = short discharge time
777 * Vintcore12Disch = short discharge time
778 * VTVoutDisch = short discharge time
779 * VaudioDisch = short discharge time
780 */
781 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH, 0xfc, 0x00),
782 /*
783 * VanaDisch = short discharge time
784 * Vaux8PullDownEna = pulldown disabled when Vaux8 is disabled
785 * Vaux8Disch = short discharge time
786 */
787 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH2, 0x16, 0x00),
788 /*
789 * Vaux4Disch = short discharge time
790 */
791 INIT_REGULATOR_REGISTER(AB8505_REGUCTRLDISCH3, 0x01, 0x00),
792 /*
793 * Vaux5Sel
794 * Vaux5LP
795 * Vaux5Ena
796 * Vaux5Disch
797 * Vaux5DisSfst
798 * Vaux5DisPulld
799 */
800 INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX5, 0x00, 0x00),
801 /*
802 * Vaux6Sel
803 * Vaux6LP
804 * Vaux6Ena
805 * Vaux6DisPulld
806 */
807 INIT_REGULATOR_REGISTER(AB8505_CTRLVAUX6, 0x00, 0x00),
808};
809
810struct regulator_init_data ab8505_regulators[AB8505_NUM_REGULATORS] = {
811 /* supplies to the display/camera */
812 [AB8505_LDO_AUX1] = {
813 .constraints = {
814 .name = "V-DISPLAY",
815 .min_uV = 2800000,
816 .max_uV = 3300000,
817 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
818 REGULATOR_CHANGE_STATUS,
819 .boot_on = 1, /* display is on at boot */
820 },
821 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux1_consumers),
822 .consumer_supplies = ab8500_vaux1_consumers,
823 },
824 /* supplies to the on-board eMMC */
825 [AB8505_LDO_AUX2] = {
826 .constraints = {
827 .name = "V-eMMC1",
828 .min_uV = 1100000,
829 .max_uV = 3300000,
830 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
831 REGULATOR_CHANGE_STATUS |
832 REGULATOR_CHANGE_MODE,
833 .valid_modes_mask = REGULATOR_MODE_NORMAL |
834 REGULATOR_MODE_IDLE,
835 },
836 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux2_consumers),
837 .consumer_supplies = ab8500_vaux2_consumers,
838 },
839 /* supply for VAUX3, supplies to SDcard slots */
840 [AB8505_LDO_AUX3] = {
841 .constraints = {
842 .name = "V-MMC-SD",
843 .min_uV = 1100000,
844 .max_uV = 3300000,
845 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
846 REGULATOR_CHANGE_STATUS |
847 REGULATOR_CHANGE_MODE,
848 .valid_modes_mask = REGULATOR_MODE_NORMAL |
849 REGULATOR_MODE_IDLE,
850 },
851 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaux3_consumers),
852 .consumer_supplies = ab8500_vaux3_consumers,
853 },
854 /* supply for VAUX4, supplies to NFC and standalone secure element */
855 [AB8505_LDO_AUX4] = {
856 .constraints = {
857 .name = "V-NFC-SE",
858 .min_uV = 1100000,
859 .max_uV = 3300000,
860 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
861 REGULATOR_CHANGE_STATUS |
862 REGULATOR_CHANGE_MODE,
863 .valid_modes_mask = REGULATOR_MODE_NORMAL |
864 REGULATOR_MODE_IDLE,
865 },
866 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux4_consumers),
867 .consumer_supplies = ab8505_vaux4_consumers,
868 },
869 /* supply for VAUX5, supplies to TBD */
870 [AB8505_LDO_AUX5] = {
871 .constraints = {
872 .name = "V-AUX5",
873 .min_uV = 1050000,
874 .max_uV = 2790000,
875 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
876 REGULATOR_CHANGE_STATUS |
877 REGULATOR_CHANGE_MODE,
878 .valid_modes_mask = REGULATOR_MODE_NORMAL |
879 REGULATOR_MODE_IDLE,
880 },
881 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux5_consumers),
882 .consumer_supplies = ab8505_vaux5_consumers,
883 },
884 /* supply for VAUX6, supplies to TBD */
885 [AB8505_LDO_AUX6] = {
886 .constraints = {
887 .name = "V-AUX6",
888 .min_uV = 1050000,
889 .max_uV = 2790000,
890 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
891 REGULATOR_CHANGE_STATUS |
892 REGULATOR_CHANGE_MODE,
893 .valid_modes_mask = REGULATOR_MODE_NORMAL |
894 REGULATOR_MODE_IDLE,
895 },
896 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux6_consumers),
897 .consumer_supplies = ab8505_vaux6_consumers,
898 },
899 /* supply for gpadc, ADC LDO */
900 [AB8505_LDO_ADC] = {
901 .constraints = {
902 .name = "V-ADC",
903 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
904 },
905 .num_consumer_supplies = ARRAY_SIZE(ab8505_vadc_consumers),
906 .consumer_supplies = ab8505_vadc_consumers,
907 },
908 /* supply for ab8500-vaudio, VAUDIO LDO */
909 [AB8505_LDO_AUDIO] = {
910 .constraints = {
911 .name = "V-AUD",
912 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
913 },
914 .num_consumer_supplies = ARRAY_SIZE(ab8500_vaud_consumers),
915 .consumer_supplies = ab8500_vaud_consumers,
916 },
917 /* supply for v-anamic1 VAMic1-LDO */
918 [AB8505_LDO_ANAMIC1] = {
919 .constraints = {
920 .name = "V-AMIC1",
921 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
922 REGULATOR_CHANGE_MODE,
923 .valid_modes_mask = REGULATOR_MODE_NORMAL |
924 REGULATOR_MODE_IDLE,
925 },
926 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic1_consumers),
927 .consumer_supplies = ab8500_vamic1_consumers,
928 },
929 /* supply for v-amic2, VAMIC2 LDO, reuse constants for AMIC1 */
930 [AB8505_LDO_ANAMIC2] = {
931 .constraints = {
932 .name = "V-AMIC2",
933 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
934 REGULATOR_CHANGE_MODE,
935 .valid_modes_mask = REGULATOR_MODE_NORMAL |
936 REGULATOR_MODE_IDLE,
937 },
938 .num_consumer_supplies = ARRAY_SIZE(ab8500_vamic2_consumers),
939 .consumer_supplies = ab8500_vamic2_consumers,
940 },
941 /* supply for v-aux8, VAUX8 LDO */
942 [AB8505_LDO_AUX8] = {
943 .constraints = {
944 .name = "V-AUX8",
945 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
946 },
947 .num_consumer_supplies = ARRAY_SIZE(ab8505_vaux8_consumers),
948 .consumer_supplies = ab8505_vaux8_consumers,
949 },
950 /* supply for v-intcore12, VINTCORE12 LDO */
951 [AB8505_LDO_INTCORE] = {
952 .constraints = {
953 .name = "V-INTCORE",
954 .min_uV = 1250000,
955 .max_uV = 1350000,
956 .input_uV = 1800000,
957 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
958 REGULATOR_CHANGE_STATUS |
959 REGULATOR_CHANGE_MODE |
960 REGULATOR_CHANGE_DRMS,
961 .valid_modes_mask = REGULATOR_MODE_NORMAL |
962 REGULATOR_MODE_IDLE,
963 },
964 .num_consumer_supplies = ARRAY_SIZE(ab8500_vintcore_consumers),
965 .consumer_supplies = ab8500_vintcore_consumers,
966 },
967 /* supply for LDO USB */
968 [AB8505_LDO_USB] = {
969 .constraints = {
970 .name = "V-USB",
971 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
972 REGULATOR_CHANGE_MODE,
973 .valid_modes_mask = REGULATOR_MODE_NORMAL |
974 REGULATOR_MODE_IDLE,
975 },
976 .num_consumer_supplies = ARRAY_SIZE(ab8505_usb_consumers),
977 .consumer_supplies = ab8505_usb_consumers,
978 },
979 /* supply for U8500 CSI-DSI, VANA LDO */
980 [AB8505_LDO_ANA] = {
981 .constraints = {
982 .name = "V-CSI-DSI",
983 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
984 },
985 .num_consumer_supplies = ARRAY_SIZE(ab8500_vana_consumers),
986 .consumer_supplies = ab8500_vana_consumers,
987 },
988};
989
990struct ab8500_regulator_platform_data ab8500_regulator_plat_data = {
991 .reg_init = ab8500_reg_init,
992 .num_reg_init = ARRAY_SIZE(ab8500_reg_init),
993 .regulator = ab8500_regulators,
994 .num_regulator = ARRAY_SIZE(ab8500_regulators),
995 .ext_regulator = ab8500_ext_regulators,
996 .num_ext_regulator = ARRAY_SIZE(ab8500_ext_regulators),
997};
998
999/* Use the AB8500 init settings for AB8505 as they are the same right now */
1000struct ab8500_regulator_platform_data ab8505_regulator_plat_data = {
1001 .reg_init = ab8505_reg_init,
1002 .num_reg_init = ARRAY_SIZE(ab8505_reg_init),
1003 .regulator = ab8505_regulators,
1004 .num_regulator = ARRAY_SIZE(ab8505_regulators),
1005};
1006
1007static void ab8500_modify_reg_init(int id, u8 mask, u8 value)
1008{
1009 int i;
1010
1011 if (cpu_is_u8520()) {
1012 for (i = ARRAY_SIZE(ab8505_reg_init) - 1; i >= 0; i--) {
1013 if (ab8505_reg_init[i].id == id) {
1014 u8 initval = ab8505_reg_init[i].value;
1015 initval = (initval & ~mask) | (value & mask);
1016 ab8505_reg_init[i].value = initval;
1017
1018 BUG_ON(mask & ~ab8505_reg_init[i].mask);
1019 return;
1020 }
1021 }
1022 } else {
1023 for (i = ARRAY_SIZE(ab8500_reg_init) - 1; i >= 0; i--) {
1024 if (ab8500_reg_init[i].id == id) {
1025 u8 initval = ab8500_reg_init[i].value;
1026 initval = (initval & ~mask) | (value & mask);
1027 ab8500_reg_init[i].value = initval;
1028
1029 BUG_ON(mask & ~ab8500_reg_init[i].mask);
1030 return;
1031 }
1032 }
1033 }
1034
1035 BUG_ON(1);
1036}
1037
1038void mop500_regulator_init(void)
1039{
1040 struct regulator_init_data *regulator;
1041
1042 /*
1043 * Temporarily turn on Vaux2 on 8520 machine
1044 */
1045 if (cpu_is_u8520()) {
1046 /* Vaux2 initialized to be on */
1047 ab8500_modify_reg_init(AB8505_VAUX12REGU, 0x0f, 0x05);
1048 }
1049
1050 /*
1051 * Handle AB8500_EXT_SUPPLY2 on HREFP_V20_V50 boards (do it for
1052 * all HREFP_V20 boards)
1053 */
1054 if (cpu_is_u8500v20()) {
1055 /* VextSupply2RequestCtrl = HP/OFF depending on VxRequest */
1056 ab8500_modify_reg_init(AB8500_REGUREQUESTCTRL3, 0x01, 0x01);
1057
1058 /* VextSupply2SysClkReq1HPValid = SysClkReq1 controlled */
1059 ab8500_modify_reg_init(AB8500_REGUSYSCLKREQ1HPVALID2,
1060 0x20, 0x20);
1061
1062 /* VextSupply2 = force HP at initialization */
1063 ab8500_modify_reg_init(AB8500_EXTSUPPLYREGU, 0x0c, 0x04);
1064
1065 /* enable VextSupply2 during platform active */
1066 regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
1067 regulator->constraints.always_on = 1;
1068
1069 /* disable VextSupply2 in suspend */
1070 regulator = &ab8500_ext_regulators[AB8500_EXT_SUPPLY2];
1071 regulator->constraints.state_mem.disabled = 1;
1072 regulator->constraints.state_standby.disabled = 1;
1073
1074 /* enable VextSupply2 HW control (used in suspend) */
1075 regulator->driver_data = (void *)&ab8500_ext_supply2;
1076 }
1077}
diff --git a/arch/arm/mach-ux500/board-mop500-regulators.h b/arch/arm/mach-ux500/board-mop500-regulators.h
index 78a0642a2206..039f5132c370 100644
--- a/arch/arm/mach-ux500/board-mop500-regulators.h
+++ b/arch/arm/mach-ux500/board-mop500-regulators.h
@@ -14,10 +14,12 @@
14#include <linux/regulator/machine.h> 14#include <linux/regulator/machine.h>
15#include <linux/regulator/ab8500.h> 15#include <linux/regulator/ab8500.h>
16 16
17extern struct ab8500_regulator_reg_init 17extern struct ab8500_regulator_platform_data ab8500_regulator_plat_data;
18ab8500_regulator_reg_init[AB8500_NUM_REGULATOR_REGISTERS]; 18extern struct ab8500_regulator_platform_data ab8505_regulator_plat_data;
19extern struct regulator_init_data ab8500_regulators[AB8500_NUM_REGULATORS];
20extern struct regulator_init_data tps61052_regulator; 19extern struct regulator_init_data tps61052_regulator;
21extern struct regulator_init_data gpio_en_3v3_regulator; 20extern struct regulator_init_data gpio_en_3v3_regulator;
21extern struct regulator_init_data sdi0_reg_init_data;
22
23void mop500_regulator_init(void);
22 24
23#endif 25#endif
diff --git a/arch/arm/mach-ux500/board-mop500-sdi.c b/arch/arm/mach-ux500/board-mop500-sdi.c
index f76be4ade7c2..0ef38775a0c1 100644
--- a/arch/arm/mach-ux500/board-mop500-sdi.c
+++ b/arch/arm/mach-ux500/board-mop500-sdi.c
@@ -31,35 +31,6 @@
31 * SDI 0 (MicroSD slot) 31 * SDI 0 (MicroSD slot)
32 */ 32 */
33 33
34/* GPIO pins used by the sdi0 level shifter */
35static int sdi0_en = -1;
36static int sdi0_vsel = -1;
37
38static int mop500_sdi0_ios_handler(struct device *dev, struct mmc_ios *ios)
39{
40 switch (ios->power_mode) {
41 case MMC_POWER_UP:
42 case MMC_POWER_ON:
43 /*
44 * Level shifter voltage should depend on vdd to when deciding
45 * on either 1.8V or 2.9V. Once the decision has been made the
46 * level shifter must be disabled and re-enabled with a changed
47 * select signal in order to switch the voltage. Since there is
48 * no framework support yet for indicating 1.8V in vdd, use the
49 * default 2.9V.
50 */
51 gpio_direction_output(sdi0_vsel, 0);
52 gpio_direction_output(sdi0_en, 1);
53 break;
54 case MMC_POWER_OFF:
55 gpio_direction_output(sdi0_vsel, 0);
56 gpio_direction_output(sdi0_en, 0);
57 break;
58 }
59
60 return 0;
61}
62
63#ifdef CONFIG_STE_DMA40 34#ifdef CONFIG_STE_DMA40
64struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = { 35struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
65 .mode = STEDMA40_MODE_LOGICAL, 36 .mode = STEDMA40_MODE_LOGICAL,
@@ -81,7 +52,6 @@ static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
81#endif 52#endif
82 53
83struct mmci_platform_data mop500_sdi0_data = { 54struct mmci_platform_data mop500_sdi0_data = {
84 .ios_handler = mop500_sdi0_ios_handler,
85 .ocr_mask = MMC_VDD_29_30, 55 .ocr_mask = MMC_VDD_29_30,
86 .f_max = 50000000, 56 .f_max = 50000000,
87 .capabilities = MMC_CAP_4_BIT_DATA | 57 .capabilities = MMC_CAP_4_BIT_DATA |
@@ -101,22 +71,6 @@ struct mmci_platform_data mop500_sdi0_data = {
101 71
102static void sdi0_configure(struct device *parent) 72static void sdi0_configure(struct device *parent)
103{ 73{
104 int ret;
105
106 ret = gpio_request(sdi0_en, "level shifter enable");
107 if (!ret)
108 ret = gpio_request(sdi0_vsel,
109 "level shifter 1v8-3v select");
110
111 if (ret) {
112 pr_warning("unable to config sdi0 gpios for level shifter.\n");
113 return;
114 }
115
116 /* Select the default 2.9V and enable level shifter */
117 gpio_direction_output(sdi0_vsel, 0);
118 gpio_direction_output(sdi0_en, 1);
119
120 /* Add the device, force v2 to subrevision 1 */ 74 /* Add the device, force v2 to subrevision 1 */
121 db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID); 75 db8500_add_sdi0(parent, &mop500_sdi0_data, U8500_SDI_V2_PERIPHID);
122} 76}
@@ -124,8 +78,6 @@ static void sdi0_configure(struct device *parent)
124void mop500_sdi_tc35892_init(struct device *parent) 78void mop500_sdi_tc35892_init(struct device *parent)
125{ 79{
126 mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD; 80 mop500_sdi0_data.gpio_cd = GPIO_SDMMC_CD;
127 sdi0_en = GPIO_SDMMC_EN;
128 sdi0_vsel = GPIO_SDMMC_1V8_3V_SEL;
129 sdi0_configure(parent); 81 sdi0_configure(parent);
130} 82}
131 83
@@ -264,8 +216,6 @@ void __init snowball_sdi_init(struct device *parent)
264 /* External Micro SD slot */ 216 /* External Micro SD slot */
265 mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO; 217 mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
266 mop500_sdi0_data.cd_invert = true; 218 mop500_sdi0_data.cd_invert = true;
267 sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
268 sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO;
269 sdi0_configure(parent); 219 sdi0_configure(parent);
270} 220}
271 221
@@ -277,8 +227,6 @@ void __init hrefv60_sdi_init(struct device *parent)
277 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID); 227 db8500_add_sdi4(parent, &mop500_sdi4_data, U8500_SDI_V2_PERIPHID);
278 /* External Micro SD slot */ 228 /* External Micro SD slot */
279 mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO; 229 mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
280 sdi0_en = HREFV60_SDMMC_EN_GPIO;
281 sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
282 sdi0_configure(parent); 230 sdi0_configure(parent);
283 /* WLAN SDIO channel */ 231 /* WLAN SDIO channel */
284 db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID); 232 db8500_add_sdi1(parent, &mop500_sdi1_data, U8500_SDI_V2_PERIPHID);
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 0d59e1ad810f..a15dd6b63a8f 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/interrupt.h> 13#include <linux/interrupt.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/clk.h>
15#include <linux/io.h> 16#include <linux/io.h>
16#include <linux/i2c.h> 17#include <linux/i2c.h>
17#include <linux/platform_data/i2c-nomadik.h> 18#include <linux/platform_data/i2c-nomadik.h>
@@ -24,6 +25,8 @@
24#include <linux/mfd/abx500/ab8500.h> 25#include <linux/mfd/abx500/ab8500.h>
25#include <linux/regulator/ab8500.h> 26#include <linux/regulator/ab8500.h>
26#include <linux/regulator/fixed.h> 27#include <linux/regulator/fixed.h>
28#include <linux/regulator/driver.h>
29#include <linux/regulator/gpio-regulator.h>
27#include <linux/mfd/tc3589x.h> 30#include <linux/mfd/tc3589x.h>
28#include <linux/mfd/tps6105x.h> 31#include <linux/mfd/tps6105x.h>
29#include <linux/mfd/abx500/ab8500-gpio.h> 32#include <linux/mfd/abx500/ab8500-gpio.h>
@@ -89,6 +92,37 @@ static struct platform_device snowball_gpio_en_3v3_regulator_dev = {
89 }, 92 },
90}; 93};
91 94
95/* Dynamically populated. */
96static struct gpio sdi0_reg_gpios[] = {
97 { 0, GPIOF_OUT_INIT_LOW, "mmci_vsel" },
98};
99
100static struct gpio_regulator_state sdi0_reg_states[] = {
101 { .value = 2900000, .gpios = (0 << 0) },
102 { .value = 1800000, .gpios = (1 << 0) },
103};
104
105static struct gpio_regulator_config sdi0_reg_info = {
106 .supply_name = "ext-mmc-level-shifter",
107 .gpios = sdi0_reg_gpios,
108 .nr_gpios = ARRAY_SIZE(sdi0_reg_gpios),
109 .states = sdi0_reg_states,
110 .nr_states = ARRAY_SIZE(sdi0_reg_states),
111 .type = REGULATOR_VOLTAGE,
112 .enable_high = 1,
113 .enabled_at_boot = 0,
114 .init_data = &sdi0_reg_init_data,
115 .startup_delay = 100,
116};
117
118static struct platform_device sdi0_regulator = {
119 .name = "gpio-regulator",
120 .id = -1,
121 .dev = {
122 .platform_data = &sdi0_reg_info,
123 },
124};
125
92static struct abx500_gpio_platform_data ab8500_gpio_pdata = { 126static struct abx500_gpio_platform_data ab8500_gpio_pdata = {
93 .gpio_base = MOP500_AB8500_PIN_GPIO(1), 127 .gpio_base = MOP500_AB8500_PIN_GPIO(1),
94}; 128};
@@ -198,10 +232,7 @@ static struct platform_device snowball_sbnet_dev = {
198 232
199struct ab8500_platform_data ab8500_platdata = { 233struct ab8500_platform_data ab8500_platdata = {
200 .irq_base = MOP500_AB8500_IRQ_BASE, 234 .irq_base = MOP500_AB8500_IRQ_BASE,
201 .regulator_reg_init = ab8500_regulator_reg_init, 235 .regulator = &ab8500_regulator_plat_data,
202 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
203 .regulator = ab8500_regulators,
204 .num_regulator = ARRAY_SIZE(ab8500_regulators),
205 .gpio = &ab8500_gpio_pdata, 236 .gpio = &ab8500_gpio_pdata,
206 .codec = &ab8500_codec_pdata, 237 .codec = &ab8500_codec_pdata,
207}; 238};
@@ -382,6 +413,15 @@ static void mop500_prox_deactivate(struct device *dev)
382 regulator_put(prox_regulator); 413 regulator_put(prox_regulator);
383} 414}
384 415
416void mop500_snowball_ethernet_clock_enable(void)
417{
418 struct clk *clk;
419
420 clk = clk_get_sys("fsmc", NULL);
421 if (!IS_ERR(clk))
422 clk_prepare_enable(clk);
423}
424
385static struct cryp_platform_data u8500_cryp1_platform_data = { 425static struct cryp_platform_data u8500_cryp1_platform_data = {
386 .mem_to_engine = { 426 .mem_to_engine = {
387 .dir = STEDMA40_MEM_TO_PERIPH, 427 .dir = STEDMA40_MEM_TO_PERIPH,
@@ -424,6 +464,7 @@ static struct hash_platform_data u8500_hash1_platform_data = {
424/* add any platform devices here - TODO */ 464/* add any platform devices here - TODO */
425static struct platform_device *mop500_platform_devs[] __initdata = { 465static struct platform_device *mop500_platform_devs[] __initdata = {
426 &mop500_gpio_keys_device, 466 &mop500_gpio_keys_device,
467 &sdi0_regulator,
427}; 468};
428 469
429#ifdef CONFIG_STE_DMA40 470#ifdef CONFIG_STE_DMA40
@@ -566,6 +607,7 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
566 &snowball_sbnet_dev, 607 &snowball_sbnet_dev,
567 &snowball_gpio_en_3v3_regulator_dev, 608 &snowball_gpio_en_3v3_regulator_dev,
568 &u8500_cpufreq_cooling_device, 609 &u8500_cpufreq_cooling_device,
610 &sdi0_regulator,
569}; 611};
570 612
571static void __init mop500_init_machine(void) 613static void __init mop500_init_machine(void)
@@ -577,6 +619,9 @@ static void __init mop500_init_machine(void)
577 platform_device_register(&db8500_prcmu_device); 619 platform_device_register(&db8500_prcmu_device);
578 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR; 620 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
579 621
622 sdi0_reg_info.enable_gpio = GPIO_SDMMC_EN;
623 sdi0_reg_info.gpios[0].gpio = GPIO_SDMMC_1V8_3V_SEL;
624
580 mop500_pinmaps_init(); 625 mop500_pinmaps_init();
581 parent = u8500_init_devices(&ab8500_platdata); 626 parent = u8500_init_devices(&ab8500_platdata);
582 627
@@ -610,6 +655,10 @@ static void __init snowball_init_machine(void)
610 int i; 655 int i;
611 656
612 platform_device_register(&db8500_prcmu_device); 657 platform_device_register(&db8500_prcmu_device);
658
659 sdi0_reg_info.enable_gpio = SNOWBALL_SDMMC_EN_GPIO;
660 sdi0_reg_info.gpios[0].gpio = SNOWBALL_SDMMC_1V8_3V_GPIO;
661
613 snowball_pinmaps_init(); 662 snowball_pinmaps_init();
614 parent = u8500_init_devices(&ab8500_platdata); 663 parent = u8500_init_devices(&ab8500_platdata);
615 664
@@ -625,6 +674,8 @@ static void __init snowball_init_machine(void)
625 mop500_audio_init(parent); 674 mop500_audio_init(parent);
626 mop500_uart_init(parent); 675 mop500_uart_init(parent);
627 676
677 mop500_snowball_ethernet_clock_enable();
678
628 /* This board has full regulator constraints */ 679 /* This board has full regulator constraints */
629 regulator_has_full_constraints(); 680 regulator_has_full_constraints();
630} 681}
@@ -643,6 +694,9 @@ static void __init hrefv60_init_machine(void)
643 */ 694 */
644 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO; 695 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
645 696
697 sdi0_reg_info.enable_gpio = HREFV60_SDMMC_EN_GPIO;
698 sdi0_reg_info.gpios[0].gpio = HREFV60_SDMMC_1V8_3V_GPIO;
699
646 hrefv60_pinmaps_init(); 700 hrefv60_pinmaps_init();
647 parent = u8500_init_devices(&ab8500_platdata); 701 parent = u8500_init_devices(&ab8500_platdata);
648 702
diff --git a/arch/arm/mach-ux500/board-mop500.h b/arch/arm/mach-ux500/board-mop500.h
index 16bf1ac020a8..49514b825034 100644
--- a/arch/arm/mach-ux500/board-mop500.h
+++ b/arch/arm/mach-ux500/board-mop500.h
@@ -104,6 +104,7 @@ void __init mop500_pinmaps_init(void);
104void __init snowball_pinmaps_init(void); 104void __init snowball_pinmaps_init(void);
105void __init hrefv60_pinmaps_init(void); 105void __init hrefv60_pinmaps_init(void);
106void mop500_audio_init(struct device *parent); 106void mop500_audio_init(struct device *parent);
107void mop500_snowball_ethernet_clock_enable(void);
107 108
108int __init mop500_uib_init(void); 109int __init mop500_uib_init(void);
109void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info, 110void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index e12cc92dfca5..f58615b5c601 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -47,8 +47,8 @@ static int __init ux500_l2x0_init(void)
47 /* Unlock before init */ 47 /* Unlock before init */
48 ux500_l2x0_unlock(); 48 ux500_l2x0_unlock();
49 49
50 /* DB9540's L2 has 128KB way size */ 50 /* DBx540's L2 has 128KB way size */
51 if (cpu_is_u9540()) 51 if (cpu_is_ux540_family())
52 /* 128KB way size */ 52 /* 128KB way size */
53 aux_val |= (0x4 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT); 53 aux_val |= (0x4 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT);
54 else 54 else
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 7a66a810274a..995928ba22fd 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -278,6 +278,7 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
278 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL), 278 OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
279 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu", 279 OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
280 &db8500_prcmu_pdata), 280 &db8500_prcmu_pdata),
281 OF_DEV_AUXDATA("smsc,lan9115", 0x50000000, "smsc911x", NULL),
281 /* Requires device name bindings. */ 282 /* Requires device name bindings. */
282 OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE, 283 OF_DEV_AUXDATA("stericsson,nmk-pinctrl", U8500_PRCMU_BASE,
283 "pinctrl-db8500", NULL), 284 "pinctrl-db8500", NULL),
@@ -308,9 +309,10 @@ static void __init u8500_init_machine(void)
308 /* Pinmaps must be in place before devices register */ 309 /* Pinmaps must be in place before devices register */
309 if (of_machine_is_compatible("st-ericsson,mop500")) 310 if (of_machine_is_compatible("st-ericsson,mop500"))
310 mop500_pinmaps_init(); 311 mop500_pinmaps_init();
311 else if (of_machine_is_compatible("calaosystems,snowball-a9500")) 312 else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
312 snowball_pinmaps_init(); 313 snowball_pinmaps_init();
313 else if (of_machine_is_compatible("st-ericsson,hrefv60+")) 314 mop500_snowball_ethernet_clock_enable();
315 } else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
314 hrefv60_pinmaps_init(); 316 hrefv60_pinmaps_init();
315 else if (of_machine_is_compatible("st-ericsson,ccu9540")) {} 317 else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
316 /* TODO: Add pinmaps for ccu9540 board. */ 318 /* TODO: Add pinmaps for ccu9540 board. */
diff --git a/arch/arm/mach-ux500/cpuidle.c b/arch/arm/mach-ux500/cpuidle.c
index 654115afb367..317a2be129fb 100644
--- a/arch/arm/mach-ux500/cpuidle.c
+++ b/arch/arm/mach-ux500/cpuidle.c
@@ -11,7 +11,6 @@
11 11
12#include <linux/module.h> 12#include <linux/module.h>
13#include <linux/cpuidle.h> 13#include <linux/cpuidle.h>
14#include <linux/clockchips.h>
15#include <linux/spinlock.h> 14#include <linux/spinlock.h>
16#include <linux/atomic.h> 15#include <linux/atomic.h>
17#include <linux/smp.h> 16#include <linux/smp.h>
@@ -25,7 +24,6 @@
25 24
26static atomic_t master = ATOMIC_INIT(0); 25static atomic_t master = ATOMIC_INIT(0);
27static DEFINE_SPINLOCK(master_lock); 26static DEFINE_SPINLOCK(master_lock);
28static DEFINE_PER_CPU(struct cpuidle_device, ux500_cpuidle_device);
29 27
30static inline int ux500_enter_idle(struct cpuidle_device *dev, 28static inline int ux500_enter_idle(struct cpuidle_device *dev,
31 struct cpuidle_driver *drv, int index) 29 struct cpuidle_driver *drv, int index)
@@ -33,8 +31,6 @@ static inline int ux500_enter_idle(struct cpuidle_device *dev,
33 int this_cpu = smp_processor_id(); 31 int this_cpu = smp_processor_id();
34 bool recouple = false; 32 bool recouple = false;
35 33
36 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &this_cpu);
37
38 if (atomic_inc_return(&master) == num_online_cpus()) { 34 if (atomic_inc_return(&master) == num_online_cpus()) {
39 35
40 /* With this lock, we prevent the other cpu to exit and enter 36 /* With this lock, we prevent the other cpu to exit and enter
@@ -94,22 +90,20 @@ out:
94 spin_unlock(&master_lock); 90 spin_unlock(&master_lock);
95 } 91 }
96 92
97 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &this_cpu);
98
99 return index; 93 return index;
100} 94}
101 95
102static struct cpuidle_driver ux500_idle_driver = { 96static struct cpuidle_driver ux500_idle_driver = {
103 .name = "ux500_idle", 97 .name = "ux500_idle",
104 .owner = THIS_MODULE, 98 .owner = THIS_MODULE,
105 .en_core_tk_irqen = 1,
106 .states = { 99 .states = {
107 ARM_CPUIDLE_WFI_STATE, 100 ARM_CPUIDLE_WFI_STATE,
108 { 101 {
109 .enter = ux500_enter_idle, 102 .enter = ux500_enter_idle,
110 .exit_latency = 70, 103 .exit_latency = 70,
111 .target_residency = 260, 104 .target_residency = 260,
112 .flags = CPUIDLE_FLAG_TIME_VALID, 105 .flags = CPUIDLE_FLAG_TIME_VALID |
106 CPUIDLE_FLAG_TIMER_STOP,
113 .name = "ApIdle", 107 .name = "ApIdle",
114 .desc = "ARM Retention", 108 .desc = "ARM Retention",
115 }, 109 },
@@ -118,59 +112,13 @@ static struct cpuidle_driver ux500_idle_driver = {
118 .state_count = 2, 112 .state_count = 2,
119}; 113};
120 114
121/*
122 * For each cpu, setup the broadcast timer because we will
123 * need to migrate the timers for the states >= ApIdle.
124 */
125static void ux500_setup_broadcast_timer(void *arg)
126{
127 int cpu = smp_processor_id();
128 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
129}
130
131int __init ux500_idle_init(void) 115int __init ux500_idle_init(void)
132{ 116{
133 int ret, cpu;
134 struct cpuidle_device *device;
135
136 /* Configure wake up reasons */ 117 /* Configure wake up reasons */
137 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) | 118 prcmu_enable_wakeups(PRCMU_WAKEUP(ARM) | PRCMU_WAKEUP(RTC) |
138 PRCMU_WAKEUP(ABB)); 119 PRCMU_WAKEUP(ABB));
139 120
140 /* 121 return cpuidle_register(&ux500_idle_driver, NULL);
141 * Configure the timer broadcast for each cpu, that must
142 * be done from the cpu context, so we use a smp cross
143 * call with 'on_each_cpu'.
144 */
145 on_each_cpu(ux500_setup_broadcast_timer, NULL, 1);
146
147 ret = cpuidle_register_driver(&ux500_idle_driver);
148 if (ret) {
149 printk(KERN_ERR "failed to register ux500 idle driver\n");
150 return ret;
151 }
152
153 for_each_online_cpu(cpu) {
154 device = &per_cpu(ux500_cpuidle_device, cpu);
155 device->cpu = cpu;
156 ret = cpuidle_register_device(device);
157 if (ret) {
158 printk(KERN_ERR "Failed to register cpuidle "
159 "device for cpu%d\n", cpu);
160 goto out_unregister;
161 }
162 }
163out:
164 return ret;
165
166out_unregister:
167 for_each_online_cpu(cpu) {
168 device = &per_cpu(ux500_cpuidle_device, cpu);
169 cpuidle_unregister_device(device);
170 }
171
172 cpuidle_unregister_driver(&ux500_idle_driver);
173 goto out;
174} 122}
175 123
176device_initcall(ux500_idle_init); 124device_initcall(ux500_idle_init);
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c
index 12ad8ad850aa..14d90469392f 100644
--- a/arch/arm/mach-ux500/platsmp.c
+++ b/arch/arm/mach-ux500/platsmp.c
@@ -16,7 +16,6 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/io.h> 18#include <linux/io.h>
19#include <linux/irqchip/arm-gic.h>
20 19
21#include <asm/cacheflush.h> 20#include <asm/cacheflush.h>
22#include <asm/smp_plat.h> 21#include <asm/smp_plat.h>
@@ -58,13 +57,6 @@ static DEFINE_SPINLOCK(boot_lock);
58static void __cpuinit ux500_secondary_init(unsigned int cpu) 57static void __cpuinit ux500_secondary_init(unsigned int cpu)
59{ 58{
60 /* 59 /*
61 * if any interrupts are already enabled for the primary
62 * core (e.g. timer irq), then they will not have been enabled
63 * for us: do so
64 */
65 gic_secondary_init(0);
66
67 /*
68 * let the primary processor know we're out of the 60 * let the primary processor know we're out of the
69 * pen, then head off into the C entry point 61 * pen, then head off into the C entry point
70 */ 62 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-25 13:32:33 -0500