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-rw-r--r--arch/arm/mach-ux500/clock.c2
-rw-r--r--arch/arm/mach-ux500/cpu-db5500.c1
-rw-r--r--arch/arm/mach-ux500/include/mach/uncompress.h10
3 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/mach-ux500/clock.c b/arch/arm/mach-ux500/clock.c
index fe84b9021c7a..0a1318fc8e2b 100644
--- a/arch/arm/mach-ux500/clock.c
+++ b/arch/arm/mach-ux500/clock.c
@@ -131,7 +131,7 @@ EXPORT_SYMBOL(clk_disable);
131 */ 131 */
132static unsigned long clk_mtu_get_rate(struct clk *clk) 132static unsigned long clk_mtu_get_rate(struct clk *clk)
133{ 133{
134 void __iomem *addr = __io_address(U8500_PRCMU_BASE) 134 void __iomem *addr = __io_address(UX500_PRCMU_BASE)
135 + PRCM_TCR; 135 + PRCM_TCR;
136 u32 tcr = readl(addr); 136 u32 tcr = readl(addr);
137 int mtu = (int) clk->data; 137 int mtu = (int) clk->data;
diff --git a/arch/arm/mach-ux500/cpu-db5500.c b/arch/arm/mach-ux500/cpu-db5500.c
index 6a3ac4539f16..e9278f6d67aa 100644
--- a/arch/arm/mach-ux500/cpu-db5500.c
+++ b/arch/arm/mach-ux500/cpu-db5500.c
@@ -21,6 +21,7 @@ static struct map_desc u5500_io_desc[] __initdata = {
21 __IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K), 21 __IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K),
22 __IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K), 22 __IO_DEV_DESC(U5500_GPIO3_BASE, SZ_4K),
23 __IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K), 23 __IO_DEV_DESC(U5500_GPIO4_BASE, SZ_4K),
24 __IO_DEV_DESC(U5500_PRCMU_BASE, SZ_4K),
24}; 25};
25 26
26static struct platform_device *u5500_platform_devs[] __initdata = { 27static struct platform_device *u5500_platform_devs[] __initdata = {
diff --git a/arch/arm/mach-ux500/include/mach/uncompress.h b/arch/arm/mach-ux500/include/mach/uncompress.h
index 8552eb188b50..0271ca0a83df 100644
--- a/arch/arm/mach-ux500/include/mach/uncompress.h
+++ b/arch/arm/mach-ux500/include/mach/uncompress.h
@@ -30,22 +30,22 @@
30static void putc(const char c) 30static void putc(const char c)
31{ 31{
32 /* Do nothing if the UART is not enabled. */ 32 /* Do nothing if the UART is not enabled. */
33 if (!(readb(U8500_UART_CR) & 0x1)) 33 if (!(__raw_readb(U8500_UART_CR) & 0x1))
34 return; 34 return;
35 35
36 if (c == '\n') 36 if (c == '\n')
37 putc('\r'); 37 putc('\r');
38 38
39 while (readb(U8500_UART_FR) & (1 << 5)) 39 while (__raw_readb(U8500_UART_FR) & (1 << 5))
40 barrier(); 40 barrier();
41 writeb(c, U8500_UART_DR); 41 __raw_writeb(c, U8500_UART_DR);
42} 42}
43 43
44static void flush(void) 44static void flush(void)
45{ 45{
46 if (!(readb(U8500_UART_CR) & 0x1)) 46 if (!(__raw_readb(U8500_UART_CR) & 0x1))
47 return; 47 return;
48 while (readb(U8500_UART_FR) & (1 << 3)) 48 while (__raw_readb(U8500_UART_FR) & (1 << 3))
49 barrier(); 49 barrier();
50} 50}
51 51