diff options
Diffstat (limited to 'arch/arm/mach-ux500')
-rw-r--r-- | arch/arm/mach-ux500/board-mop500-pins.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-ux500/board-mop500.c | 54 | ||||
-rw-r--r-- | arch/arm/mach-ux500/platsmp.c | 8 |
3 files changed, 66 insertions, 12 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index fd4cf1ca5efd..70cdbd60596a 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c | |||
@@ -110,10 +110,18 @@ static pin_cfg_t mop500_pins_common[] = { | |||
110 | GPIO168_KP_O0, | 110 | GPIO168_KP_O0, |
111 | 111 | ||
112 | /* UART */ | 112 | /* UART */ |
113 | GPIO0_U0_CTSn | PIN_INPUT_PULLUP, | 113 | /* uart-0 pins gpio configuration should be |
114 | GPIO1_U0_RTSn | PIN_OUTPUT_HIGH, | 114 | * kept intact to prevent glitch in tx line |
115 | GPIO2_U0_RXD | PIN_INPUT_PULLUP, | 115 | * when tty dev is opened. Later these pins |
116 | GPIO3_U0_TXD | PIN_OUTPUT_HIGH, | 116 | * are configured to uart mop500_pins_uart0 |
117 | * | ||
118 | * It will be replaced with uart configuration | ||
119 | * once the issue is solved. | ||
120 | */ | ||
121 | GPIO0_GPIO | PIN_INPUT_PULLUP, | ||
122 | GPIO1_GPIO | PIN_OUTPUT_HIGH, | ||
123 | GPIO2_GPIO | PIN_INPUT_PULLUP, | ||
124 | GPIO3_GPIO | PIN_OUTPUT_HIGH, | ||
117 | 125 | ||
118 | GPIO29_U2_RXD | PIN_INPUT_PULLUP, | 126 | GPIO29_U2_RXD | PIN_INPUT_PULLUP, |
119 | GPIO30_U2_TXD | PIN_OUTPUT_HIGH, | 127 | GPIO30_U2_TXD | PIN_OUTPUT_HIGH, |
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index bb26f40493e6..2a08c07dec6d 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -27,18 +27,21 @@ | |||
27 | #include <linux/leds-lp5521.h> | 27 | #include <linux/leds-lp5521.h> |
28 | #include <linux/input.h> | 28 | #include <linux/input.h> |
29 | #include <linux/gpio_keys.h> | 29 | #include <linux/gpio_keys.h> |
30 | #include <linux/delay.h> | ||
30 | 31 | ||
31 | #include <asm/mach-types.h> | 32 | #include <asm/mach-types.h> |
32 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
33 | 34 | ||
34 | #include <plat/i2c.h> | 35 | #include <plat/i2c.h> |
35 | #include <plat/ste_dma40.h> | 36 | #include <plat/ste_dma40.h> |
37 | #include <plat/pincfg.h> | ||
36 | 38 | ||
37 | #include <mach/hardware.h> | 39 | #include <mach/hardware.h> |
38 | #include <mach/setup.h> | 40 | #include <mach/setup.h> |
39 | #include <mach/devices.h> | 41 | #include <mach/devices.h> |
40 | #include <mach/irqs.h> | 42 | #include <mach/irqs.h> |
41 | 43 | ||
44 | #include "pins-db8500.h" | ||
42 | #include "ste-dma40-db8500.h" | 45 | #include "ste-dma40-db8500.h" |
43 | #include "devices-db8500.h" | 46 | #include "devices-db8500.h" |
44 | #include "board-mop500.h" | 47 | #include "board-mop500.h" |
@@ -393,12 +396,63 @@ static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | |||
393 | }; | 396 | }; |
394 | #endif | 397 | #endif |
395 | 398 | ||
399 | |||
400 | static pin_cfg_t mop500_pins_uart0[] = { | ||
401 | GPIO0_U0_CTSn | PIN_INPUT_PULLUP, | ||
402 | GPIO1_U0_RTSn | PIN_OUTPUT_HIGH, | ||
403 | GPIO2_U0_RXD | PIN_INPUT_PULLUP, | ||
404 | GPIO3_U0_TXD | PIN_OUTPUT_HIGH, | ||
405 | }; | ||
406 | |||
407 | #define PRCC_K_SOFTRST_SET 0x18 | ||
408 | #define PRCC_K_SOFTRST_CLEAR 0x1C | ||
409 | static void ux500_uart0_reset(void) | ||
410 | { | ||
411 | void __iomem *prcc_rst_set, *prcc_rst_clr; | ||
412 | |||
413 | prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | ||
414 | PRCC_K_SOFTRST_SET); | ||
415 | prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE + | ||
416 | PRCC_K_SOFTRST_CLEAR); | ||
417 | |||
418 | /* Activate soft reset PRCC_K_SOFTRST_CLEAR */ | ||
419 | writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr); | ||
420 | udelay(1); | ||
421 | |||
422 | /* Release soft reset PRCC_K_SOFTRST_SET */ | ||
423 | writel((readl(prcc_rst_set) | 0x1), prcc_rst_set); | ||
424 | udelay(1); | ||
425 | } | ||
426 | |||
427 | static void ux500_uart0_init(void) | ||
428 | { | ||
429 | int ret; | ||
430 | |||
431 | ret = nmk_config_pins(mop500_pins_uart0, | ||
432 | ARRAY_SIZE(mop500_pins_uart0)); | ||
433 | if (ret < 0) | ||
434 | pr_err("pl011: uart pins_enable failed\n"); | ||
435 | } | ||
436 | |||
437 | static void ux500_uart0_exit(void) | ||
438 | { | ||
439 | int ret; | ||
440 | |||
441 | ret = nmk_config_pins_sleep(mop500_pins_uart0, | ||
442 | ARRAY_SIZE(mop500_pins_uart0)); | ||
443 | if (ret < 0) | ||
444 | pr_err("pl011: uart pins_disable failed\n"); | ||
445 | } | ||
446 | |||
396 | static struct amba_pl011_data uart0_plat = { | 447 | static struct amba_pl011_data uart0_plat = { |
397 | #ifdef CONFIG_STE_DMA40 | 448 | #ifdef CONFIG_STE_DMA40 |
398 | .dma_filter = stedma40_filter, | 449 | .dma_filter = stedma40_filter, |
399 | .dma_rx_param = &uart0_dma_cfg_rx, | 450 | .dma_rx_param = &uart0_dma_cfg_rx, |
400 | .dma_tx_param = &uart0_dma_cfg_tx, | 451 | .dma_tx_param = &uart0_dma_cfg_tx, |
401 | #endif | 452 | #endif |
453 | .init = ux500_uart0_init, | ||
454 | .exit = ux500_uart0_exit, | ||
455 | .reset = ux500_uart0_reset, | ||
402 | }; | 456 | }; |
403 | 457 | ||
404 | static struct amba_pl011_data uart1_plat = { | 458 | static struct amba_pl011_data uart1_plat = { |
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index 0c527fe2cebb..a33df5f4c27a 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c | |||
@@ -172,14 +172,6 @@ void __init smp_init_cpus(void) | |||
172 | 172 | ||
173 | void __init platform_smp_prepare_cpus(unsigned int max_cpus) | 173 | void __init platform_smp_prepare_cpus(unsigned int max_cpus) |
174 | { | 174 | { |
175 | int i; | ||
176 | |||
177 | /* | ||
178 | * Initialise the present map, which describes the set of CPUs | ||
179 | * actually populated at the present time. | ||
180 | */ | ||
181 | for (i = 0; i < max_cpus; i++) | ||
182 | set_cpu_present(i, true); | ||
183 | 175 | ||
184 | scu_enable(scu_base_addr()); | 176 | scu_enable(scu_base_addr()); |
185 | wakeup_secondary(); | 177 | wakeup_secondary(); |