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Diffstat (limited to 'arch/arm/mach-ux500/clock.h')
-rw-r--r-- | arch/arm/mach-ux500/clock.h | 164 |
1 files changed, 0 insertions, 164 deletions
diff --git a/arch/arm/mach-ux500/clock.h b/arch/arm/mach-ux500/clock.h deleted file mode 100644 index 65d27a13f46d..000000000000 --- a/arch/arm/mach-ux500/clock.h +++ /dev/null | |||
@@ -1,164 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 ST-Ericsson | ||
3 | * Copyright (C) 2009 STMicroelectronics | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | /** | ||
11 | * struct clkops - ux500 clock operations | ||
12 | * @enable: function to enable the clock | ||
13 | * @disable: function to disable the clock | ||
14 | * @get_rate: function to get the current clock rate | ||
15 | * | ||
16 | * This structure contains function pointers to functions that will be used to | ||
17 | * control the clock. All of these functions are optional. If get_rate is | ||
18 | * NULL, the rate in the struct clk will be used. | ||
19 | */ | ||
20 | struct clkops { | ||
21 | void (*enable) (struct clk *); | ||
22 | void (*disable) (struct clk *); | ||
23 | unsigned long (*get_rate) (struct clk *); | ||
24 | int (*set_parent)(struct clk *, struct clk *); | ||
25 | }; | ||
26 | |||
27 | /** | ||
28 | * struct clk - ux500 clock structure | ||
29 | * @ops: pointer to clkops struct used to control this clock | ||
30 | * @name: name, for debugging | ||
31 | * @enabled: refcount. positive if enabled, zero if disabled | ||
32 | * @get_rate: custom callback for getting the clock rate | ||
33 | * @data: custom per-clock data for example for the get_rate | ||
34 | * callback | ||
35 | * @rate: fixed rate for clocks which don't implement | ||
36 | * ops->getrate | ||
37 | * @prcmu_cg_off: address offset of the combined enable/disable register | ||
38 | * (used on u8500v1) | ||
39 | * @prcmu_cg_bit: bit in the combined enable/disable register (used on | ||
40 | * u8500v1) | ||
41 | * @prcmu_cg_mgt: address of the enable/disable register (used on | ||
42 | * u8500ed) | ||
43 | * @cluster: peripheral cluster number | ||
44 | * @prcc_bus: bit for the bus clock in the peripheral's CLKRST | ||
45 | * @prcc_kernel: bit for the kernel clock in the peripheral's CLKRST. | ||
46 | * -1 if no kernel clock exists. | ||
47 | * @parent_cluster: pointer to parent's cluster clk struct | ||
48 | * @parent_periph: pointer to parent's peripheral clk struct | ||
49 | * | ||
50 | * Peripherals are organised into clusters, and each cluster has an associated | ||
51 | * bus clock. Some peripherals also have a parent peripheral clock. | ||
52 | * | ||
53 | * In order to enable a clock for a peripheral, we need to enable: | ||
54 | * (1) the parent cluster (bus) clock at the PRCMU level | ||
55 | * (2) the parent peripheral clock (if any) at the PRCMU level | ||
56 | * (3) the peripheral's bus & kernel clock at the PRCC level | ||
57 | * | ||
58 | * (1) and (2) are handled by defining clk structs (DEFINE_PRCMU_CLK) for each | ||
59 | * of the cluster and peripheral clocks, and hooking these as the parents of | ||
60 | * the individual peripheral clocks. | ||
61 | * | ||
62 | * (3) is handled by specifying the bits in the PRCC control registers required | ||
63 | * to enable these clocks and modifying them in the ->enable and | ||
64 | * ->disable callbacks of the peripheral clocks (DEFINE_PRCC_CLK). | ||
65 | * | ||
66 | * This structure describes both the PRCMU-level clocks and PRCC-level clocks. | ||
67 | * The prcmu_* fields are only used for the PRCMU clocks, and the cluster, | ||
68 | * prcc, and parent pointers are only used for the PRCC-level clocks. | ||
69 | */ | ||
70 | struct clk { | ||
71 | const struct clkops *ops; | ||
72 | const char *name; | ||
73 | unsigned int enabled; | ||
74 | unsigned long (*get_rate)(struct clk *); | ||
75 | void *data; | ||
76 | |||
77 | unsigned long rate; | ||
78 | struct list_head list; | ||
79 | |||
80 | /* These three are only for PRCMU clks */ | ||
81 | |||
82 | unsigned int prcmu_cg_off; | ||
83 | unsigned int prcmu_cg_bit; | ||
84 | unsigned int prcmu_cg_mgt; | ||
85 | |||
86 | /* The rest are only for PRCC clks */ | ||
87 | |||
88 | int cluster; | ||
89 | unsigned int prcc_bus; | ||
90 | unsigned int prcc_kernel; | ||
91 | |||
92 | struct clk *parent_cluster; | ||
93 | struct clk *parent_periph; | ||
94 | #if defined(CONFIG_DEBUG_FS) | ||
95 | struct dentry *dent; /* For visible tree hierarchy */ | ||
96 | struct dentry *dent_bus; /* For visible tree hierarchy */ | ||
97 | #endif | ||
98 | }; | ||
99 | |||
100 | #define DEFINE_PRCMU_CLK(_name, _cg_off, _cg_bit, _reg) \ | ||
101 | struct clk clk_##_name = { \ | ||
102 | .name = #_name, \ | ||
103 | .ops = &clk_prcmu_ops, \ | ||
104 | .prcmu_cg_off = _cg_off, \ | ||
105 | .prcmu_cg_bit = _cg_bit, \ | ||
106 | .prcmu_cg_mgt = PRCM_##_reg##_MGT \ | ||
107 | } | ||
108 | |||
109 | #define DEFINE_PRCMU_CLK_RATE(_name, _cg_off, _cg_bit, _reg, _rate) \ | ||
110 | struct clk clk_##_name = { \ | ||
111 | .name = #_name, \ | ||
112 | .ops = &clk_prcmu_ops, \ | ||
113 | .prcmu_cg_off = _cg_off, \ | ||
114 | .prcmu_cg_bit = _cg_bit, \ | ||
115 | .rate = _rate, \ | ||
116 | .prcmu_cg_mgt = PRCM_##_reg##_MGT \ | ||
117 | } | ||
118 | |||
119 | #define DEFINE_PRCC_CLK(_pclust, _name, _bus_en, _kernel_en, _kernclk) \ | ||
120 | struct clk clk_##_name = { \ | ||
121 | .name = #_name, \ | ||
122 | .ops = &clk_prcc_ops, \ | ||
123 | .cluster = _pclust, \ | ||
124 | .prcc_bus = _bus_en, \ | ||
125 | .prcc_kernel = _kernel_en, \ | ||
126 | .parent_cluster = &clk_per##_pclust##clk, \ | ||
127 | .parent_periph = _kernclk \ | ||
128 | } | ||
129 | |||
130 | #define DEFINE_PRCC_CLK_CUSTOM(_pclust, _name, _bus_en, _kernel_en, _kernclk, _callback, _data) \ | ||
131 | struct clk clk_##_name = { \ | ||
132 | .name = #_name, \ | ||
133 | .ops = &clk_prcc_ops, \ | ||
134 | .cluster = _pclust, \ | ||
135 | .prcc_bus = _bus_en, \ | ||
136 | .prcc_kernel = _kernel_en, \ | ||
137 | .parent_cluster = &clk_per##_pclust##clk, \ | ||
138 | .parent_periph = _kernclk, \ | ||
139 | .get_rate = _callback, \ | ||
140 | .data = (void *) _data \ | ||
141 | } | ||
142 | |||
143 | |||
144 | #define CLK(_clk, _devname, _conname) \ | ||
145 | { \ | ||
146 | .clk = &clk_##_clk, \ | ||
147 | .dev_id = _devname, \ | ||
148 | .con_id = _conname, \ | ||
149 | } | ||
150 | |||
151 | int __init clk_db8500_ed_fixup(void); | ||
152 | int __init clk_init(void); | ||
153 | |||
154 | #ifdef CONFIG_DEBUG_FS | ||
155 | int clk_debugfs_init(void); | ||
156 | #else | ||
157 | static inline int clk_debugfs_init(void) { return 0; } | ||
158 | #endif | ||
159 | |||
160 | #ifdef CONFIG_CPU_FREQ | ||
161 | int clk_init_smp_twd_cpufreq(void); | ||
162 | #else | ||
163 | static inline int clk_init_smp_twd_cpufreq(void) { return 0; } | ||
164 | #endif | ||