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Diffstat (limited to 'arch/arm/mach-ux500/cache-l2x0.c')
-rw-r--r--arch/arm/mach-ux500/cache-l2x0.c32
1 files changed, 11 insertions, 21 deletions
diff --git a/arch/arm/mach-ux500/cache-l2x0.c b/arch/arm/mach-ux500/cache-l2x0.c
index 264f894c0e3d..842ebedbdd1c 100644
--- a/arch/arm/mach-ux500/cache-l2x0.c
+++ b/arch/arm/mach-ux500/cache-l2x0.c
@@ -35,10 +35,16 @@ static int __init ux500_l2x0_unlock(void)
35 return 0; 35 return 0;
36} 36}
37 37
38static int __init ux500_l2x0_init(void) 38static void ux500_l2c310_write_sec(unsigned long val, unsigned reg)
39{ 39{
40 u32 aux_val = 0x3e000000; 40 /*
41 * We can't write to secure registers as we are in non-secure
42 * mode, until we have some SMI service available.
43 */
44}
41 45
46static int __init ux500_l2x0_init(void)
47{
42 if (cpu_is_u8500_family() || cpu_is_ux540_family()) 48 if (cpu_is_u8500_family() || cpu_is_ux540_family())
43 l2x0_base = __io_address(U8500_L2CC_BASE); 49 l2x0_base = __io_address(U8500_L2CC_BASE);
44 else 50 else
@@ -48,28 +54,12 @@ static int __init ux500_l2x0_init(void)
48 /* Unlock before init */ 54 /* Unlock before init */
49 ux500_l2x0_unlock(); 55 ux500_l2x0_unlock();
50 56
51 /* DBx540's L2 has 128KB way size */ 57 outer_cache.write_sec = ux500_l2c310_write_sec;
52 if (cpu_is_ux540_family())
53 /* 128KB way size */
54 aux_val |= (0x4 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT);
55 else
56 /* 64KB way size */
57 aux_val |= (0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT);
58 58
59 /* 64KB way size, 8 way associativity, force WA */
60 if (of_have_populated_dt()) 59 if (of_have_populated_dt())
61 l2x0_of_init(aux_val, 0xc0000fff); 60 l2x0_of_init(0, ~0);
62 else 61 else
63 l2x0_init(l2x0_base, aux_val, 0xc0000fff); 62 l2x0_init(l2x0_base, 0, ~0);
64
65 /*
66 * We can't disable l2 as we are in non secure mode, currently
67 * this seems be called only during kexec path. So let's
68 * override outer.disable with nasty assignment until we have
69 * some SMI service available.
70 */
71 outer_cache.disable = NULL;
72 outer_cache.set_debug = NULL;
73 63
74 return 0; 64 return 0;
75} 65}