diff options
Diffstat (limited to 'arch/arm/mach-ux500/board-mop500.c')
-rw-r--r-- | arch/arm/mach-ux500/board-mop500.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c index f59d52806afe..2d70e2b45660 100644 --- a/arch/arm/mach-ux500/board-mop500.c +++ b/arch/arm/mach-ux500/board-mop500.c | |||
@@ -424,19 +424,19 @@ void mop500_snowball_ethernet_clock_enable(void) | |||
424 | 424 | ||
425 | static struct cryp_platform_data u8500_cryp1_platform_data = { | 425 | static struct cryp_platform_data u8500_cryp1_platform_data = { |
426 | .mem_to_engine = { | 426 | .mem_to_engine = { |
427 | .dir = STEDMA40_MEM_TO_PERIPH, | 427 | .dir = DMA_MEM_TO_DEV, |
428 | .dev_type = DB8500_DMA_DEV48_CAC1, | 428 | .dev_type = DB8500_DMA_DEV48_CAC1, |
429 | .mode = STEDMA40_MODE_LOGICAL, | 429 | .mode = STEDMA40_MODE_LOGICAL, |
430 | }, | 430 | }, |
431 | .engine_to_mem = { | 431 | .engine_to_mem = { |
432 | .dir = STEDMA40_PERIPH_TO_MEM, | 432 | .dir = DMA_DEV_TO_MEM, |
433 | .dev_type = DB8500_DMA_DEV48_CAC1, | 433 | .dev_type = DB8500_DMA_DEV48_CAC1, |
434 | .mode = STEDMA40_MODE_LOGICAL, | 434 | .mode = STEDMA40_MODE_LOGICAL, |
435 | } | 435 | } |
436 | }; | 436 | }; |
437 | 437 | ||
438 | static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = { | 438 | static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = { |
439 | .dir = STEDMA40_MEM_TO_PERIPH, | 439 | .dir = DMA_MEM_TO_DEV, |
440 | .dev_type = DB8500_DMA_DEV50_HAC1_TX, | 440 | .dev_type = DB8500_DMA_DEV50_HAC1_TX, |
441 | .mode = STEDMA40_MODE_LOGICAL, | 441 | .mode = STEDMA40_MODE_LOGICAL, |
442 | }; | 442 | }; |
@@ -455,13 +455,13 @@ static struct platform_device *mop500_platform_devs[] __initdata = { | |||
455 | #ifdef CONFIG_STE_DMA40 | 455 | #ifdef CONFIG_STE_DMA40 |
456 | static struct stedma40_chan_cfg ssp0_dma_cfg_rx = { | 456 | static struct stedma40_chan_cfg ssp0_dma_cfg_rx = { |
457 | .mode = STEDMA40_MODE_LOGICAL, | 457 | .mode = STEDMA40_MODE_LOGICAL, |
458 | .dir = STEDMA40_PERIPH_TO_MEM, | 458 | .dir = DMA_DEV_TO_MEM, |
459 | .dev_type = DB8500_DMA_DEV8_SSP0, | 459 | .dev_type = DB8500_DMA_DEV8_SSP0, |
460 | }; | 460 | }; |
461 | 461 | ||
462 | static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { | 462 | static struct stedma40_chan_cfg ssp0_dma_cfg_tx = { |
463 | .mode = STEDMA40_MODE_LOGICAL, | 463 | .mode = STEDMA40_MODE_LOGICAL, |
464 | .dir = STEDMA40_MEM_TO_PERIPH, | 464 | .dir = DMA_MEM_TO_DEV, |
465 | .dev_type = DB8500_DMA_DEV8_SSP0, | 465 | .dev_type = DB8500_DMA_DEV8_SSP0, |
466 | }; | 466 | }; |
467 | #endif | 467 | #endif |
@@ -490,37 +490,37 @@ static void __init mop500_spi_init(struct device *parent) | |||
490 | #ifdef CONFIG_STE_DMA40 | 490 | #ifdef CONFIG_STE_DMA40 |
491 | static struct stedma40_chan_cfg uart0_dma_cfg_rx = { | 491 | static struct stedma40_chan_cfg uart0_dma_cfg_rx = { |
492 | .mode = STEDMA40_MODE_LOGICAL, | 492 | .mode = STEDMA40_MODE_LOGICAL, |
493 | .dir = STEDMA40_PERIPH_TO_MEM, | 493 | .dir = DMA_DEV_TO_MEM, |
494 | .dev_type = DB8500_DMA_DEV13_UART0, | 494 | .dev_type = DB8500_DMA_DEV13_UART0, |
495 | }; | 495 | }; |
496 | 496 | ||
497 | static struct stedma40_chan_cfg uart0_dma_cfg_tx = { | 497 | static struct stedma40_chan_cfg uart0_dma_cfg_tx = { |
498 | .mode = STEDMA40_MODE_LOGICAL, | 498 | .mode = STEDMA40_MODE_LOGICAL, |
499 | .dir = STEDMA40_MEM_TO_PERIPH, | 499 | .dir = DMA_MEM_TO_DEV, |
500 | .dev_type = DB8500_DMA_DEV13_UART0, | 500 | .dev_type = DB8500_DMA_DEV13_UART0, |
501 | }; | 501 | }; |
502 | 502 | ||
503 | static struct stedma40_chan_cfg uart1_dma_cfg_rx = { | 503 | static struct stedma40_chan_cfg uart1_dma_cfg_rx = { |
504 | .mode = STEDMA40_MODE_LOGICAL, | 504 | .mode = STEDMA40_MODE_LOGICAL, |
505 | .dir = STEDMA40_PERIPH_TO_MEM, | 505 | .dir = DMA_DEV_TO_MEM, |
506 | .dev_type = DB8500_DMA_DEV12_UART1, | 506 | .dev_type = DB8500_DMA_DEV12_UART1, |
507 | }; | 507 | }; |
508 | 508 | ||
509 | static struct stedma40_chan_cfg uart1_dma_cfg_tx = { | 509 | static struct stedma40_chan_cfg uart1_dma_cfg_tx = { |
510 | .mode = STEDMA40_MODE_LOGICAL, | 510 | .mode = STEDMA40_MODE_LOGICAL, |
511 | .dir = STEDMA40_MEM_TO_PERIPH, | 511 | .dir = DMA_MEM_TO_DEV, |
512 | .dev_type = DB8500_DMA_DEV12_UART1, | 512 | .dev_type = DB8500_DMA_DEV12_UART1, |
513 | }; | 513 | }; |
514 | 514 | ||
515 | static struct stedma40_chan_cfg uart2_dma_cfg_rx = { | 515 | static struct stedma40_chan_cfg uart2_dma_cfg_rx = { |
516 | .mode = STEDMA40_MODE_LOGICAL, | 516 | .mode = STEDMA40_MODE_LOGICAL, |
517 | .dir = STEDMA40_PERIPH_TO_MEM, | 517 | .dir = DMA_DEV_TO_MEM, |
518 | .dev_type = DB8500_DMA_DEV11_UART2, | 518 | .dev_type = DB8500_DMA_DEV11_UART2, |
519 | }; | 519 | }; |
520 | 520 | ||
521 | static struct stedma40_chan_cfg uart2_dma_cfg_tx = { | 521 | static struct stedma40_chan_cfg uart2_dma_cfg_tx = { |
522 | .mode = STEDMA40_MODE_LOGICAL, | 522 | .mode = STEDMA40_MODE_LOGICAL, |
523 | .dir = STEDMA40_MEM_TO_PERIPH, | 523 | .dir = DMA_MEM_TO_DEV, |
524 | .dev_type = DB8500_DMA_DEV11_UART2, | 524 | .dev_type = DB8500_DMA_DEV11_UART2, |
525 | }; | 525 | }; |
526 | #endif | 526 | #endif |