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-rw-r--r--arch/arm/mach-u300/clock.c6
-rw-r--r--arch/arm/mach-u300/timer.c18
2 files changed, 6 insertions, 18 deletions
diff --git a/arch/arm/mach-u300/clock.c b/arch/arm/mach-u300/clock.c
index fabcc49abe80..5535dd0a78c9 100644
--- a/arch/arm/mach-u300/clock.c
+++ b/arch/arm/mach-u300/clock.c
@@ -263,7 +263,7 @@ static void disable_i2s0_vcxo(void)
263 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); 263 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
264 val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO; 264 val &= ~U300_SYSCON_CCR_I2S0_USE_VCXO;
265 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 265 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
266 /* Deactivate VCXO if noone else is using VCXO */ 266 /* Deactivate VCXO if no one else is using VCXO */
267 if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO)) 267 if (!(val & U300_SYSCON_CCR_I2S1_USE_VCXO))
268 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; 268 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON;
269 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 269 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
@@ -283,7 +283,7 @@ static void disable_i2s1_vcxo(void)
283 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR); 283 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CCR);
284 val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO; 284 val &= ~U300_SYSCON_CCR_I2S1_USE_VCXO;
285 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 285 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
286 /* Deactivate VCXO if noone else is using VCXO */ 286 /* Deactivate VCXO if no one else is using VCXO */
287 if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO)) 287 if (!(val & U300_SYSCON_CCR_I2S0_USE_VCXO))
288 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON; 288 val &= ~U300_SYSCON_CCR_TURN_VCXO_ON;
289 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR); 289 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CCR);
@@ -649,7 +649,7 @@ static unsigned long clk_round_rate_cpuclk(struct clk *clk, unsigned long rate)
649 */ 649 */
650long clk_round_rate(struct clk *clk, unsigned long rate) 650long clk_round_rate(struct clk *clk, unsigned long rate)
651{ 651{
652 /* TODO: get apropriate switches for EMIFCLK, AHBCLK and MCLK */ 652 /* TODO: get appropriate switches for EMIFCLK, AHBCLK and MCLK */
653 /* Else default to fixed value */ 653 /* Else default to fixed value */
654 654
655 if (clk->round_rate) { 655 if (clk->round_rate) {
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c
index 3ec58bd2d6e4..891cf44591e0 100644
--- a/arch/arm/mach-u300/timer.c
+++ b/arch/arm/mach-u300/timer.c
@@ -333,20 +333,6 @@ static struct irqaction u300_timer_irq = {
333 .handler = u300_timer_interrupt, 333 .handler = u300_timer_interrupt,
334}; 334};
335 335
336/* Use general purpose timer 2 as clock source */
337static cycle_t u300_get_cycles(struct clocksource *cs)
338{
339 return (cycles_t) readl(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC);
340}
341
342static struct clocksource clocksource_u300_1mhz = {
343 .name = "GPT2",
344 .rating = 300, /* Reasonably fast and accurate clock source */
345 .read = u300_get_cycles,
346 .mask = CLOCKSOURCE_MASK(32), /* 32 bits */
347 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
348};
349
350/* 336/*
351 * Override the global weak sched_clock symbol with this 337 * Override the global weak sched_clock symbol with this
352 * local implementation which uses the clocksource to get some 338 * local implementation which uses the clocksource to get some
@@ -422,7 +408,9 @@ static void __init u300_timer_init(void)
422 writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE, 408 writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE,
423 U300_TIMER_APP_VBASE + U300_TIMER_APP_EGPT2); 409 U300_TIMER_APP_VBASE + U300_TIMER_APP_EGPT2);
424 410
425 if (clocksource_register_hz(&clocksource_u300_1mhz, rate)) 411 /* Use general purpose timer 2 as clock source */
412 if (clocksource_mmio_init(U300_TIMER_APP_VBASE + U300_TIMER_APP_GPT2CC,
413 "GPT2", rate, 300, 32, clocksource_mmio_readl_up))
426 printk(KERN_ERR "timer: failed to initialize clock " 414 printk(KERN_ERR "timer: failed to initialize clock "
427 "source %s\n", clocksource_u300_1mhz.name); 415 "source %s\n", clocksource_u300_1mhz.name);
428 416