diff options
Diffstat (limited to 'arch/arm/mach-u300/timer.c')
-rw-r--r-- | arch/arm/mach-u300/timer.c | 28 |
1 files changed, 17 insertions, 11 deletions
diff --git a/arch/arm/mach-u300/timer.c b/arch/arm/mach-u300/timer.c index 26d26f5100fe..3fc4472719be 100644 --- a/arch/arm/mach-u300/timer.c +++ b/arch/arm/mach-u300/timer.c | |||
@@ -15,6 +15,8 @@ | |||
15 | #include <linux/clocksource.h> | 15 | #include <linux/clocksource.h> |
16 | #include <linux/types.h> | 16 | #include <linux/types.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <linux/clk.h> | ||
19 | #include <linux/err.h> | ||
18 | 20 | ||
19 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
20 | 22 | ||
@@ -23,7 +25,8 @@ | |||
23 | #include <asm/mach/time.h> | 25 | #include <asm/mach/time.h> |
24 | #include <asm/mach/irq.h> | 26 | #include <asm/mach/irq.h> |
25 | 27 | ||
26 | #include "clock.h" | 28 | /* Be able to sleep for atleast 4 seconds (usually more) */ |
29 | #define APPTIMER_MIN_RANGE 4 | ||
27 | 30 | ||
28 | /* | 31 | /* |
29 | * APP side special timer registers | 32 | * APP side special timer registers |
@@ -307,8 +310,6 @@ static struct clock_event_device clockevent_u300_1mhz = { | |||
307 | .name = "GPT1", | 310 | .name = "GPT1", |
308 | .rating = 300, /* Reasonably fast and accurate clock event */ | 311 | .rating = 300, /* Reasonably fast and accurate clock event */ |
309 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 312 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
310 | /* 22 calculated using the algorithm in arch/mips/kernel/time.c */ | ||
311 | .shift = 22, | ||
312 | .set_next_event = u300_set_next_event, | 313 | .set_next_event = u300_set_next_event, |
313 | .set_mode = u300_set_mode, | 314 | .set_mode = u300_set_mode, |
314 | }; | 315 | }; |
@@ -341,8 +342,6 @@ static struct clocksource clocksource_u300_1mhz = { | |||
341 | .rating = 300, /* Reasonably fast and accurate clock source */ | 342 | .rating = 300, /* Reasonably fast and accurate clock source */ |
342 | .read = u300_get_cycles, | 343 | .read = u300_get_cycles, |
343 | .mask = CLOCKSOURCE_MASK(32), /* 32 bits */ | 344 | .mask = CLOCKSOURCE_MASK(32), /* 32 bits */ |
344 | /* 22 calculated using the algorithm in arch/mips/kernel/time.c */ | ||
345 | .shift = 22, | ||
346 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 345 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
347 | }; | 346 | }; |
348 | 347 | ||
@@ -367,7 +366,15 @@ unsigned long long notrace sched_clock(void) | |||
367 | */ | 366 | */ |
368 | static void __init u300_timer_init(void) | 367 | static void __init u300_timer_init(void) |
369 | { | 368 | { |
370 | u300_enable_timer_clock(); | 369 | struct clk *clk; |
370 | unsigned long rate; | ||
371 | |||
372 | /* Clock the interrupt controller */ | ||
373 | clk = clk_get_sys("apptimer", NULL); | ||
374 | BUG_ON(IS_ERR(clk)); | ||
375 | clk_enable(clk); | ||
376 | rate = clk_get_rate(clk); | ||
377 | |||
371 | /* | 378 | /* |
372 | * Disable the "OS" and "DD" timers - these are designed for Symbian! | 379 | * Disable the "OS" and "DD" timers - these are designed for Symbian! |
373 | * Example usage in cnh1601578 cpu subsystem pd_timer_app.c | 380 | * Example usage in cnh1601578 cpu subsystem pd_timer_app.c |
@@ -405,15 +412,14 @@ static void __init u300_timer_init(void) | |||
405 | writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE, | 412 | writel(U300_TIMER_APP_EGPT2_TIMER_ENABLE, |
406 | U300_TIMER_APP_VBASE + U300_TIMER_APP_EGPT2); | 413 | U300_TIMER_APP_VBASE + U300_TIMER_APP_EGPT2); |
407 | 414 | ||
408 | /* This is a pure microsecond clock source */ | 415 | clocksource_calc_mult_shift(&clocksource_u300_1mhz, |
409 | clocksource_u300_1mhz.mult = | 416 | rate, APPTIMER_MIN_RANGE); |
410 | clocksource_khz2mult(1000, clocksource_u300_1mhz.shift); | ||
411 | if (clocksource_register(&clocksource_u300_1mhz)) | 417 | if (clocksource_register(&clocksource_u300_1mhz)) |
412 | printk(KERN_ERR "timer: failed to initialize clock " | 418 | printk(KERN_ERR "timer: failed to initialize clock " |
413 | "source %s\n", clocksource_u300_1mhz.name); | 419 | "source %s\n", clocksource_u300_1mhz.name); |
414 | 420 | ||
415 | clockevent_u300_1mhz.mult = | 421 | clockevents_calc_mult_shift(&clockevent_u300_1mhz, |
416 | div_sc(1000000, NSEC_PER_SEC, clockevent_u300_1mhz.shift); | 422 | rate, APPTIMER_MIN_RANGE); |
417 | /* 32bit counter, so 32bits delta is max */ | 423 | /* 32bit counter, so 32bits delta is max */ |
418 | clockevent_u300_1mhz.max_delta_ns = | 424 | clockevent_u300_1mhz.max_delta_ns = |
419 | clockevent_delta2ns(0xffffffff, &clockevent_u300_1mhz); | 425 | clockevent_delta2ns(0xffffffff, &clockevent_u300_1mhz); |