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-rw-r--r--arch/arm/mach-tegra/include/mach/pinmux.h10
-rw-r--r--arch/arm/mach-tegra/pinmux-tegra20-tables.c4
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h
index 35999ce7c9b2..988c6c5ec9ec 100644
--- a/arch/arm/mach-tegra/include/mach/pinmux.h
+++ b/arch/arm/mach-tegra/include/mach/pinmux.h
@@ -2,6 +2,7 @@
2 * linux/arch/arm/mach-tegra/include/mach/pinmux.h 2 * linux/arch/arm/mach-tegra/include/mach/pinmux.h
3 * 3 *
4 * Copyright (C) 2010 Google, Inc. 4 * Copyright (C) 2010 Google, Inc.
5 * Copyright (C) 2010,2011 Nvidia, Inc.
5 * 6 *
6 * This software is licensed under the terms of the GNU General Public 7 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and 8 * License version 2, as published by the Free Software Foundation, and
@@ -99,6 +100,11 @@ enum tegra_tristate {
99 TEGRA_TRI_TRISTATE = 1, 100 TEGRA_TRI_TRISTATE = 1,
100}; 101};
101 102
103enum tegra_pin_io {
104 TEGRA_PIN_OUTPUT = 0,
105 TEGRA_PIN_INPUT = 1,
106};
107
102enum tegra_vddio { 108enum tegra_vddio {
103 TEGRA_VDDIO_BB = 0, 109 TEGRA_VDDIO_BB = 0,
104 TEGRA_VDDIO_LCD, 110 TEGRA_VDDIO_LCD,
@@ -202,6 +208,7 @@ struct tegra_pingroup_desc {
202 int funcs[4]; 208 int funcs[4];
203 int func_safe; 209 int func_safe;
204 int vddio; 210 int vddio;
211 enum tegra_pin_io io_default;
205 s16 tri_bank; /* Register bank the tri_reg exists within */ 212 s16 tri_bank; /* Register bank the tri_reg exists within */
206 s16 mux_bank; /* Register bank the mux_reg exists within */ 213 s16 mux_bank; /* Register bank the mux_reg exists within */
207 s16 pupd_bank; /* Register bank the pupd_reg exists within */ 214 s16 pupd_bank; /* Register bank the pupd_reg exists within */
@@ -211,6 +218,9 @@ struct tegra_pingroup_desc {
211 s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */ 218 s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */
212 s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */ 219 s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */
213 s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */ 220 s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */
221 s8 lock_bit; /* offset of the LOCK bit into mux register bit */
222 s8 od_bit; /* offset of the OD bit into mux register bit */
223 s8 ioreset_bit; /* offset of the IO_RESET bit into mux register bit */
214}; 224};
215 225
216typedef void (*pinmux_init) (const struct tegra_pingroup_desc **pg, 226typedef void (*pinmux_init) (const struct tegra_pingroup_desc **pg,
diff --git a/arch/arm/mach-tegra/pinmux-tegra20-tables.c b/arch/arm/mach-tegra/pinmux-tegra20-tables.c
index efe6aeeea474..0fe533573567 100644
--- a/arch/arm/mach-tegra/pinmux-tegra20-tables.c
+++ b/arch/arm/mach-tegra/pinmux-tegra20-tables.c
@@ -106,6 +106,10 @@ static const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MA
106 .pupd_bank = 2, \ 106 .pupd_bank = 2, \
107 .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \ 107 .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \
108 .pupd_bit = pupd_b, \ 108 .pupd_bit = pupd_b, \
109 .lock_bit = -1, \
110 .od_bit = -1, \
111 .ioreset_bit = -1, \
112 .io_default = -1, \
109 } 113 }
110 114
111static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { 115static const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = {