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-rw-r--r--arch/arm/mach-tegra/Kconfig12
-rw-r--r--arch/arm/mach-tegra/Makefile4
-rw-r--r--arch/arm/mach-tegra/Makefile.boot3
-rw-r--r--arch/arm/mach-tegra/board-dt.c119
-rw-r--r--arch/arm/mach-tegra/board-harmony.c22
-rw-r--r--arch/arm/mach-tegra/board-paz00-pinmux.c10
-rw-r--r--arch/arm/mach-tegra/board-paz00.c31
-rw-r--r--arch/arm/mach-tegra/board-paz00.h10
-rw-r--r--arch/arm/mach-tegra/board-seaboard.c28
-rw-r--r--arch/arm/mach-tegra/board-trimslice-pinmux.c9
-rw-r--r--arch/arm/mach-tegra/board-trimslice.c56
-rw-r--r--arch/arm/mach-tegra/board-trimslice.h3
-rw-r--r--arch/arm/mach-tegra/clock.c7
-rw-r--r--arch/arm/mach-tegra/devices.c53
-rw-r--r--arch/arm/mach-tegra/gpio.c431
-rw-r--r--arch/arm/mach-tegra/include/mach/barriers.h30
-rw-r--r--arch/arm/mach-tegra/include/mach/clkdev.h34
-rw-r--r--arch/arm/mach-tegra/include/mach/hardware.h28
-rw-r--r--arch/arm/mach-tegra/include/mach/system.h1
-rw-r--r--arch/arm/mach-tegra/io.c1
-rw-r--r--arch/arm/mach-tegra/pcie.c4
-rw-r--r--arch/arm/mach-tegra/platsmp.c11
-rw-r--r--arch/arm/mach-tegra/tegra2_clocks.c4
23 files changed, 287 insertions, 624 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index 5ec1846aa1d0..d82ebab50e11 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -27,14 +27,14 @@ comment "Tegra board type"
27 27
28config MACH_HARMONY 28config MACH_HARMONY
29 bool "Harmony board" 29 bool "Harmony board"
30 select MACH_HAS_SND_SOC_TEGRA_WM8903 30 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
31 help 31 help
32 Support for nVidia Harmony development platform 32 Support for nVidia Harmony development platform
33 33
34config MACH_KAEN 34config MACH_KAEN
35 bool "Kaen board" 35 bool "Kaen board"
36 select MACH_SEABOARD 36 select MACH_SEABOARD
37 select MACH_HAS_SND_SOC_TEGRA_WM8903 37 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
38 help 38 help
39 Support for the Kaen version of Seaboard 39 Support for the Kaen version of Seaboard
40 40
@@ -45,12 +45,18 @@ config MACH_PAZ00
45 45
46config MACH_SEABOARD 46config MACH_SEABOARD
47 bool "Seaboard board" 47 bool "Seaboard board"
48 select MACH_HAS_SND_SOC_TEGRA_WM8903 48 select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC
49 help 49 help
50 Support for nVidia Seaboard development platform. It will 50 Support for nVidia Seaboard development platform. It will
51 also be included for some of the derivative boards that 51 also be included for some of the derivative boards that
52 have large similarities with the seaboard design. 52 have large similarities with the seaboard design.
53 53
54config MACH_TEGRA_DT
55 bool "Generic Tegra board (FDT support)"
56 select USE_OF
57 help
58 Support for generic nVidia Tegra boards using Flattened Device Tree
59
54config MACH_TRIMSLICE 60config MACH_TRIMSLICE
55 bool "TrimSlice board" 61 bool "TrimSlice board"
56 select TEGRA_PCI 62 select TEGRA_PCI
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile
index 823c703e573c..f11b9100114a 100644
--- a/arch/arm/mach-tegra/Makefile
+++ b/arch/arm/mach-tegra/Makefile
@@ -4,7 +4,6 @@ obj-y += io.o
4obj-y += irq.o 4obj-y += irq.o
5obj-y += clock.o 5obj-y += clock.o
6obj-y += timer.o 6obj-y += timer.o
7obj-y += gpio.o
8obj-y += pinmux.o 7obj-y += pinmux.o
9obj-y += powergate.o 8obj-y += powergate.o
10obj-y += fuse.o 9obj-y += fuse.o
@@ -30,5 +29,8 @@ obj-${CONFIG_MACH_PAZ00} += board-paz00-pinmux.o
30obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o 29obj-${CONFIG_MACH_SEABOARD} += board-seaboard.o
31obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o 30obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o
32 31
32obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o
33obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o
34
33obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o 35obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o
34obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o 36obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot
index db52d61a7386..428ad122be03 100644
--- a/arch/arm/mach-tegra/Makefile.boot
+++ b/arch/arm/mach-tegra/Makefile.boot
@@ -1,3 +1,6 @@
1zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00008000 1zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00008000
2params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 2params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100
3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 3initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000
4
5dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb
6dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c
new file mode 100644
index 000000000000..9f47e04446f3
--- /dev/null
+++ b/arch/arm/mach-tegra/board-dt.c
@@ -0,0 +1,119 @@
1/*
2 * nVidia Tegra device tree board support
3 *
4 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
5 * Copyright (C) 2010 Google, Inc.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/serial_8250.h>
22#include <linux/clk.h>
23#include <linux/dma-mapping.h>
24#include <linux/irqdomain.h>
25#include <linux/of.h>
26#include <linux/of_address.h>
27#include <linux/of_fdt.h>
28#include <linux/of_irq.h>
29#include <linux/of_platform.h>
30#include <linux/pda_power.h>
31#include <linux/io.h>
32#include <linux/i2c.h>
33#include <linux/i2c-tegra.h>
34
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/time.h>
38#include <asm/setup.h>
39
40#include <mach/iomap.h>
41#include <mach/irqs.h>
42
43#include "board.h"
44#include "board-harmony.h"
45#include "clock.h"
46#include "devices.h"
47
48void harmony_pinmux_init(void);
49void seaboard_pinmux_init(void);
50
51
52struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
53 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL),
54 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC2_BASE, "sdhci-tegra.1", NULL),
55 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC3_BASE, "sdhci-tegra.2", NULL),
56 OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC4_BASE, "sdhci-tegra.3", NULL),
57 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C_BASE, "tegra-i2c.0", NULL),
58 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C2_BASE, "tegra-i2c.1", NULL),
59 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_I2C3_BASE, "tegra-i2c.2", NULL),
60 OF_DEV_AUXDATA("nvidia,tegra20-i2c", TEGRA_DVC_BASE, "tegra-i2c.3", NULL),
61 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.0", NULL),
62 OF_DEV_AUXDATA("nvidia,tegra20-i2s", TEGRA_I2S1_BASE, "tegra-i2s.1", NULL),
63 OF_DEV_AUXDATA("nvidia,tegra20-das", TEGRA_APB_MISC_DAS_BASE, "tegra-das", NULL),
64 {}
65};
66
67static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = {
68 /* name parent rate enabled */
69 { "uartd", "pll_p", 216000000, true },
70 { NULL, NULL, 0, 0},
71};
72
73static struct of_device_id tegra_dt_match_table[] __initdata = {
74 { .compatible = "simple-bus", },
75 {}
76};
77
78static struct of_device_id tegra_dt_gic_match[] __initdata = {
79 { .compatible = "nvidia,tegra20-gic", },
80 {}
81};
82
83static void __init tegra_dt_init(void)
84{
85 struct device_node *node;
86
87 node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match,
88 TEGRA_ARM_INT_DIST_BASE);
89 if (node)
90 irq_domain_add_simple(node, INT_GIC_BASE);
91
92 tegra_clk_init_from_table(tegra_dt_clk_init_table);
93
94 if (of_machine_is_compatible("nvidia,harmony"))
95 harmony_pinmux_init();
96 else if (of_machine_is_compatible("nvidia,seaboard"))
97 seaboard_pinmux_init();
98
99 /*
100 * Finished with the static registrations now; fill in the missing
101 * devices
102 */
103 of_platform_populate(NULL, tegra_dt_match_table, tegra20_auxdata_lookup, NULL);
104}
105
106static const char * tegra_dt_board_compat[] = {
107 "nvidia,harmony",
108 "nvidia,seaboard",
109 NULL
110};
111
112DT_MACHINE_START(TEGRA_DT, "nVidia Tegra (Flattened Device Tree)")
113 .map_io = tegra_map_common_io,
114 .init_early = tegra_init_early,
115 .init_irq = tegra_init_irq,
116 .timer = &tegra_timer,
117 .init_machine = tegra_dt_init,
118 .dt_compat = tegra_dt_board_compat,
119MACHINE_END
diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c
index 30e18bc60647..846cd7d69e3e 100644
--- a/arch/arm/mach-tegra/board-harmony.c
+++ b/arch/arm/mach-tegra/board-harmony.c
@@ -25,7 +25,6 @@
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/gpio.h> 26#include <linux/gpio.h>
27#include <linux/i2c.h> 27#include <linux/i2c.h>
28#include <linux/i2c-tegra.h>
29 28
30#include <sound/wm8903.h> 29#include <sound/wm8903.h>
31 30
@@ -83,22 +82,6 @@ static struct platform_device harmony_audio_device = {
83 }, 82 },
84}; 83};
85 84
86static struct tegra_i2c_platform_data harmony_i2c1_platform_data = {
87 .bus_clk_rate = 400000,
88};
89
90static struct tegra_i2c_platform_data harmony_i2c2_platform_data = {
91 .bus_clk_rate = 400000,
92};
93
94static struct tegra_i2c_platform_data harmony_i2c3_platform_data = {
95 .bus_clk_rate = 400000,
96};
97
98static struct tegra_i2c_platform_data harmony_dvc_platform_data = {
99 .bus_clk_rate = 400000,
100};
101
102static struct wm8903_platform_data harmony_wm8903_pdata = { 85static struct wm8903_platform_data harmony_wm8903_pdata = {
103 .irq_active_low = 0, 86 .irq_active_low = 0,
104 .micdet_cfg = 0, 87 .micdet_cfg = 0,
@@ -121,11 +104,6 @@ static struct i2c_board_info __initdata wm8903_board_info = {
121 104
122static void __init harmony_i2c_init(void) 105static void __init harmony_i2c_init(void)
123{ 106{
124 tegra_i2c_device1.dev.platform_data = &harmony_i2c1_platform_data;
125 tegra_i2c_device2.dev.platform_data = &harmony_i2c2_platform_data;
126 tegra_i2c_device3.dev.platform_data = &harmony_i2c3_platform_data;
127 tegra_i2c_device4.dev.platform_data = &harmony_dvc_platform_data;
128
129 platform_device_register(&tegra_i2c_device1); 107 platform_device_register(&tegra_i2c_device1);
130 platform_device_register(&tegra_i2c_device2); 108 platform_device_register(&tegra_i2c_device2);
131 platform_device_register(&tegra_i2c_device3); 109 platform_device_register(&tegra_i2c_device3);
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c
index 2643d1bd568b..bdd2627dd87b 100644
--- a/arch/arm/mach-tegra/board-paz00-pinmux.c
+++ b/arch/arm/mach-tegra/board-paz00-pinmux.c
@@ -141,12 +141,10 @@ static struct tegra_pingroup_config paz00_pinmux[] = {
141}; 141};
142 142
143static struct tegra_gpio_table gpio_table[] = { 143static struct tegra_gpio_table gpio_table[] = {
144 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, 144 { .gpio = TEGRA_GPIO_SD1_CD, .enable = true },
145 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, 145 { .gpio = TEGRA_GPIO_SD1_WP, .enable = true },
146 { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true }, 146 { .gpio = TEGRA_GPIO_SD1_POWER, .enable = true },
147 { .gpio = TEGRA_GPIO_SD4_CD, .enable = true }, 147 { .gpio = TEGRA_ULPI_RST, .enable = true },
148 { .gpio = TEGRA_GPIO_SD4_WP, .enable = true },
149 { .gpio = TEGRA_GPIO_SD4_POWER, .enable = true },
150}; 148};
151 149
152void paz00_pinmux_init(void) 150void paz00_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-paz00.c b/arch/arm/mach-tegra/board-paz00.c
index 57e50a823eec..ea2f79c9879b 100644
--- a/arch/arm/mach-tegra/board-paz00.c
+++ b/arch/arm/mach-tegra/board-paz00.c
@@ -25,6 +25,7 @@
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/pda_power.h> 26#include <linux/pda_power.h>
27#include <linux/io.h> 27#include <linux/io.h>
28#include <linux/i2c.h>
28 29
29#include <asm/mach-types.h> 30#include <asm/mach-types.h>
30#include <asm/mach/arch.h> 31#include <asm/mach/arch.h>
@@ -34,6 +35,7 @@
34#include <mach/iomap.h> 35#include <mach/iomap.h>
35#include <mach/irqs.h> 36#include <mach/irqs.h>
36#include <mach/sdhci.h> 37#include <mach/sdhci.h>
38#include <mach/gpio.h>
37 39
38#include "board.h" 40#include "board.h"
39#include "board-paz00.h" 41#include "board-paz00.h"
@@ -66,10 +68,22 @@ static struct platform_device debug_uart = {
66static struct platform_device *paz00_devices[] __initdata = { 68static struct platform_device *paz00_devices[] __initdata = {
67 &debug_uart, 69 &debug_uart,
68 &tegra_sdhci_device1, 70 &tegra_sdhci_device1,
69 &tegra_sdhci_device2,
70 &tegra_sdhci_device4, 71 &tegra_sdhci_device4,
71}; 72};
72 73
74static void paz00_i2c_init(void)
75{
76 platform_device_register(&tegra_i2c_device1);
77 platform_device_register(&tegra_i2c_device2);
78 platform_device_register(&tegra_i2c_device4);
79}
80
81static void paz00_usb_init(void)
82{
83 platform_device_register(&tegra_ehci2_device);
84 platform_device_register(&tegra_ehci3_device);
85}
86
73static void __init tegra_paz00_fixup(struct machine_desc *desc, 87static void __init tegra_paz00_fixup(struct machine_desc *desc,
74 struct tag *tags, char **cmdline, struct meminfo *mi) 88 struct tag *tags, char **cmdline, struct meminfo *mi)
75{ 89{
@@ -84,23 +98,16 @@ static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {
84 { NULL, NULL, 0, 0}, 98 { NULL, NULL, 0, 0},
85}; 99};
86 100
87
88static struct tegra_sdhci_platform_data sdhci_pdata1 = { 101static struct tegra_sdhci_platform_data sdhci_pdata1 = {
89 .cd_gpio = TEGRA_GPIO_SD1_CD, 102 .cd_gpio = TEGRA_GPIO_SD1_CD,
90 .wp_gpio = TEGRA_GPIO_SD1_WP, 103 .wp_gpio = TEGRA_GPIO_SD1_WP,
91 .power_gpio = TEGRA_GPIO_SD1_POWER, 104 .power_gpio = TEGRA_GPIO_SD1_POWER,
92}; 105};
93 106
94static struct tegra_sdhci_platform_data sdhci_pdata2 = { 107static struct tegra_sdhci_platform_data sdhci_pdata4 = {
95 .cd_gpio = -1, 108 .cd_gpio = -1,
96 .wp_gpio = -1, 109 .wp_gpio = -1,
97 .power_gpio = -1, 110 .power_gpio = -1,
98};
99
100static struct tegra_sdhci_platform_data sdhci_pdata4 = {
101 .cd_gpio = TEGRA_GPIO_SD4_CD,
102 .wp_gpio = TEGRA_GPIO_SD4_WP,
103 .power_gpio = TEGRA_GPIO_SD4_POWER,
104 .is_8bit = 1, 111 .is_8bit = 1,
105}; 112};
106 113
@@ -111,13 +118,15 @@ static void __init tegra_paz00_init(void)
111 paz00_pinmux_init(); 118 paz00_pinmux_init();
112 119
113 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1; 120 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
114 tegra_sdhci_device2.dev.platform_data = &sdhci_pdata2;
115 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; 121 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
116 122
117 platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices)); 123 platform_add_devices(paz00_devices, ARRAY_SIZE(paz00_devices));
124
125 paz00_i2c_init();
126 paz00_usb_init();
118} 127}
119 128
120MACHINE_START(PAZ00, "paz00") 129MACHINE_START(PAZ00, "Toshiba AC100 / Dynabook AZ")
121 .boot_params = 0x00000100, 130 .boot_params = 0x00000100,
122 .fixup = tegra_paz00_fixup, 131 .fixup = tegra_paz00_fixup,
123 .map_io = tegra_map_common_io, 132 .map_io = tegra_map_common_io,
diff --git a/arch/arm/mach-tegra/board-paz00.h b/arch/arm/mach-tegra/board-paz00.h
index da193ca76d3b..d4ff39ddaeb3 100644
--- a/arch/arm/mach-tegra/board-paz00.h
+++ b/arch/arm/mach-tegra/board-paz00.h
@@ -17,12 +17,10 @@
17#ifndef _MACH_TEGRA_BOARD_PAZ00_H 17#ifndef _MACH_TEGRA_BOARD_PAZ00_H
18#define _MACH_TEGRA_BOARD_PAZ00_H 18#define _MACH_TEGRA_BOARD_PAZ00_H
19 19
20#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5 20#define TEGRA_GPIO_SD1_CD TEGRA_GPIO_PV5
21#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1 21#define TEGRA_GPIO_SD1_WP TEGRA_GPIO_PH1
22#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3 22#define TEGRA_GPIO_SD1_POWER TEGRA_GPIO_PT3
23#define TEGRA_GPIO_SD4_CD TEGRA_GPIO_PH2 23#define TEGRA_ULPI_RST TEGRA_GPIO_PV0
24#define TEGRA_GPIO_SD4_WP TEGRA_GPIO_PH3
25#define TEGRA_GPIO_SD4_POWER TEGRA_GPIO_PI6
26 24
27void paz00_pinmux_init(void); 25void paz00_pinmux_init(void);
28 26
diff --git a/arch/arm/mach-tegra/board-seaboard.c b/arch/arm/mach-tegra/board-seaboard.c
index a8d7ace9f958..56cbabf6aa68 100644
--- a/arch/arm/mach-tegra/board-seaboard.c
+++ b/arch/arm/mach-tegra/board-seaboard.c
@@ -19,7 +19,6 @@
19#include <linux/platform_device.h> 19#include <linux/platform_device.h>
20#include <linux/serial_8250.h> 20#include <linux/serial_8250.h>
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/i2c-tegra.h>
23#include <linux/delay.h> 22#include <linux/delay.h>
24#include <linux/input.h> 23#include <linux/input.h>
25#include <linux/io.h> 24#include <linux/io.h>
@@ -66,22 +65,6 @@ static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
66 { NULL, NULL, 0, 0}, 65 { NULL, NULL, 0, 0},
67}; 66};
68 67
69static struct tegra_i2c_platform_data seaboard_i2c1_platform_data = {
70 .bus_clk_rate = 400000.
71};
72
73static struct tegra_i2c_platform_data seaboard_i2c2_platform_data = {
74 .bus_clk_rate = 400000,
75};
76
77static struct tegra_i2c_platform_data seaboard_i2c3_platform_data = {
78 .bus_clk_rate = 400000,
79};
80
81static struct tegra_i2c_platform_data seaboard_dvc_platform_data = {
82 .bus_clk_rate = 400000,
83};
84
85static struct gpio_keys_button seaboard_gpio_keys_buttons[] = { 68static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
86 { 69 {
87 .code = SW_LID, 70 .code = SW_LID,
@@ -137,9 +120,9 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = {
137static struct platform_device *seaboard_devices[] __initdata = { 120static struct platform_device *seaboard_devices[] __initdata = {
138 &debug_uart, 121 &debug_uart,
139 &tegra_pmu_device, 122 &tegra_pmu_device,
140 &tegra_sdhci_device1,
141 &tegra_sdhci_device3,
142 &tegra_sdhci_device4, 123 &tegra_sdhci_device4,
124 &tegra_sdhci_device3,
125 &tegra_sdhci_device1,
143 &seaboard_gpio_keys_device, 126 &seaboard_gpio_keys_device,
144}; 127};
145 128
@@ -159,12 +142,7 @@ static void __init seaboard_i2c_init(void)
159 142
160 i2c_register_board_info(0, &isl29018_device, 1); 143 i2c_register_board_info(0, &isl29018_device, 1);
161 144
162 i2c_register_board_info(4, &adt7461_device, 1); 145 i2c_register_board_info(3, &adt7461_device, 1);
163
164 tegra_i2c_device1.dev.platform_data = &seaboard_i2c1_platform_data;
165 tegra_i2c_device2.dev.platform_data = &seaboard_i2c2_platform_data;
166 tegra_i2c_device3.dev.platform_data = &seaboard_i2c3_platform_data;
167 tegra_i2c_device4.dev.platform_data = &seaboard_dvc_platform_data;
168 146
169 platform_device_register(&tegra_i2c_device1); 147 platform_device_register(&tegra_i2c_device1);
170 platform_device_register(&tegra_i2c_device2); 148 platform_device_register(&tegra_i2c_device2);
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c
index 13534fa08abf..47c596cdbf32 100644
--- a/arch/arm/mach-tegra/board-trimslice-pinmux.c
+++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c
@@ -29,13 +29,13 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
29 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 29 {TEGRA_PINGROUP_ATC, TEGRA_MUX_NAND, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
30 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 30 {TEGRA_PINGROUP_ATD, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
31 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 31 {TEGRA_PINGROUP_ATE, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
32 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 32 {TEGRA_PINGROUP_CDEV1, TEGRA_MUX_PLLA_OUT, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
33 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 33 {TEGRA_PINGROUP_CDEV2, TEGRA_MUX_PLLP_OUT4, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
34 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 34 {TEGRA_PINGROUP_CRTP, TEGRA_MUX_CRT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
35 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE}, 35 {TEGRA_PINGROUP_CSUS, TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},
36 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 36 {TEGRA_PINGROUP_DAP1, TEGRA_MUX_DAP1, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
37 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 37 {TEGRA_PINGROUP_DAP2, TEGRA_MUX_DAP2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
38 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, 38 {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
39 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 39 {TEGRA_PINGROUP_DAP4, TEGRA_MUX_DAP4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
40 {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, 40 {TEGRA_PINGROUP_DDC, TEGRA_MUX_I2C2, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL},
41 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 41 {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
@@ -126,7 +126,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
126 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 126 {TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
127 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 127 {TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
128 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 128 {TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
129 {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, 129 {TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
130 {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 130 {TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
131 {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 131 {TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
132 {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, 132 {TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
@@ -145,6 +145,9 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
145static struct tegra_gpio_table gpio_table[] = { 145static struct tegra_gpio_table gpio_table[] = {
146 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ 146 { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
147 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ 147 { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
148
149 { .gpio = TRIMSLICE_GPIO_USB1_MODE, .enable = true }, /* USB1 mode */
150 { .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */
148}; 151};
149 152
150void __init trimslice_pinmux_init(void) 153void __init trimslice_pinmux_init(void)
diff --git a/arch/arm/mach-tegra/board-trimslice.c b/arch/arm/mach-tegra/board-trimslice.c
index cda4cfd78e84..89a6d2adc1de 100644
--- a/arch/arm/mach-tegra/board-trimslice.c
+++ b/arch/arm/mach-tegra/board-trimslice.c
@@ -23,6 +23,8 @@
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/i2c.h>
27#include <linux/gpio.h>
26 28
27#include <asm/mach-types.h> 29#include <asm/mach-types.h>
28#include <asm/mach/arch.h> 30#include <asm/mach/arch.h>
@@ -30,6 +32,7 @@
30 32
31#include <mach/iomap.h> 33#include <mach/iomap.h>
32#include <mach/sdhci.h> 34#include <mach/sdhci.h>
35#include <mach/gpio.h>
33 36
34#include "board.h" 37#include "board.h"
35#include "clock.h" 38#include "clock.h"
@@ -71,12 +74,58 @@ static struct tegra_sdhci_platform_data sdhci_pdata4 = {
71 .power_gpio = -1, 74 .power_gpio = -1,
72}; 75};
73 76
77static struct platform_device trimslice_audio_device = {
78 .name = "tegra-snd-trimslice",
79 .id = 0,
80};
81
74static struct platform_device *trimslice_devices[] __initdata = { 82static struct platform_device *trimslice_devices[] __initdata = {
75 &debug_uart, 83 &debug_uart,
76 &tegra_sdhci_device1, 84 &tegra_sdhci_device1,
77 &tegra_sdhci_device4, 85 &tegra_sdhci_device4,
86 &tegra_i2s_device1,
87 &tegra_das_device,
88 &tegra_pcm_device,
89 &trimslice_audio_device,
78}; 90};
79 91
92static struct i2c_board_info trimslice_i2c3_board_info[] = {
93 {
94 I2C_BOARD_INFO("tlv320aic23", 0x1a),
95 },
96 {
97 I2C_BOARD_INFO("em3027", 0x56),
98 },
99};
100
101static void trimslice_i2c_init(void)
102{
103 platform_device_register(&tegra_i2c_device1);
104 platform_device_register(&tegra_i2c_device2);
105 platform_device_register(&tegra_i2c_device3);
106
107 i2c_register_board_info(2, trimslice_i2c3_board_info,
108 ARRAY_SIZE(trimslice_i2c3_board_info));
109}
110
111static void trimslice_usb_init(void)
112{
113 int err;
114
115 platform_device_register(&tegra_ehci3_device);
116
117 platform_device_register(&tegra_ehci2_device);
118
119 err = gpio_request_one(TRIMSLICE_GPIO_USB1_MODE, GPIOF_OUT_INIT_HIGH,
120 "usb1mode");
121 if (err) {
122 pr_err("TrimSlice: failed to obtain USB1 mode gpio: %d\n", err);
123 return;
124 }
125
126 platform_device_register(&tegra_ehci1_device);
127}
128
80static void __init tegra_trimslice_fixup(struct machine_desc *desc, 129static void __init tegra_trimslice_fixup(struct machine_desc *desc,
81 struct tag *tags, char **cmdline, struct meminfo *mi) 130 struct tag *tags, char **cmdline, struct meminfo *mi)
82{ 131{
@@ -90,6 +139,10 @@ static void __init tegra_trimslice_fixup(struct machine_desc *desc,
90static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = { 139static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
91 /* name parent rate enabled */ 140 /* name parent rate enabled */
92 { "uarta", "pll_p", 216000000, true }, 141 { "uarta", "pll_p", 216000000, true },
142 { "pll_a", "pll_p_out1", 56448000, true },
143 { "pll_a_out0", "pll_a", 11289600, true },
144 { "cdev1", NULL, 0, true },
145 { "i2s1", "pll_a_out0", 11289600, false},
93 { NULL, NULL, 0, 0}, 146 { NULL, NULL, 0, 0},
94}; 147};
95 148
@@ -112,6 +165,9 @@ static void __init tegra_trimslice_init(void)
112 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4; 165 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
113 166
114 platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices)); 167 platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
168
169 trimslice_i2c_init();
170 trimslice_usb_init();
115} 171}
116 172
117MACHINE_START(TRIMSLICE, "trimslice") 173MACHINE_START(TRIMSLICE, "trimslice")
diff --git a/arch/arm/mach-tegra/board-trimslice.h b/arch/arm/mach-tegra/board-trimslice.h
index e8ef6291c6f1..7a7dee86b4da 100644
--- a/arch/arm/mach-tegra/board-trimslice.h
+++ b/arch/arm/mach-tegra/board-trimslice.h
@@ -20,6 +20,9 @@
20#define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */ 20#define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */
21#define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */ 21#define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */
22 22
23#define TRIMSLICE_GPIO_USB1_MODE TEGRA_GPIO_PV2 /* USB1 mode */
24#define TRIMSLICE_GPIO_USB2_RST TEGRA_GPIO_PV0 /* USB2 PHY reset */
25
23void trimslice_pinmux_init(void); 26void trimslice_pinmux_init(void);
24 27
25#endif 28#endif
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index e028320ab423..f8d41ffc0ca9 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -585,7 +585,7 @@ static const struct file_operations possible_parents_fops = {
585 585
586static int clk_debugfs_register_one(struct clk *c) 586static int clk_debugfs_register_one(struct clk *c)
587{ 587{
588 struct dentry *d, *child, *child_tmp; 588 struct dentry *d;
589 589
590 d = debugfs_create_dir(c->name, clk_debugfs_root); 590 d = debugfs_create_dir(c->name, clk_debugfs_root);
591 if (!d) 591 if (!d)
@@ -614,10 +614,7 @@ static int clk_debugfs_register_one(struct clk *c)
614 return 0; 614 return 0;
615 615
616err_out: 616err_out:
617 d = c->dent; 617 debugfs_remove_recursive(c->dent);
618 list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
619 debugfs_remove(child);
620 debugfs_remove(c->dent);
621 return -ENOMEM; 618 return -ENOMEM;
622} 619}
623 620
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c
index 1528f9daef1f..57e35d20c24c 100644
--- a/arch/arm/mach-tegra/devices.c
+++ b/arch/arm/mach-tegra/devices.c
@@ -22,10 +22,14 @@
22#include <linux/dma-mapping.h> 22#include <linux/dma-mapping.h>
23#include <linux/fsl_devices.h> 23#include <linux/fsl_devices.h>
24#include <linux/serial_8250.h> 24#include <linux/serial_8250.h>
25#include <linux/i2c-tegra.h>
26#include <linux/platform_data/tegra_usb.h>
25#include <asm/pmu.h> 27#include <asm/pmu.h>
26#include <mach/irqs.h> 28#include <mach/irqs.h>
27#include <mach/iomap.h> 29#include <mach/iomap.h>
28#include <mach/dma.h> 30#include <mach/dma.h>
31#include <mach/usb_phy.h>
32#include "gpio-names.h"
29 33
30static struct resource i2c_resource1[] = { 34static struct resource i2c_resource1[] = {
31 [0] = { 35 [0] = {
@@ -79,13 +83,29 @@ static struct resource i2c_resource4[] = {
79 }, 83 },
80}; 84};
81 85
86static struct tegra_i2c_platform_data tegra_i2c1_platform_data = {
87 .bus_clk_rate = 400000,
88};
89
90static struct tegra_i2c_platform_data tegra_i2c2_platform_data = {
91 .bus_clk_rate = 400000,
92};
93
94static struct tegra_i2c_platform_data tegra_i2c3_platform_data = {
95 .bus_clk_rate = 400000,
96};
97
98static struct tegra_i2c_platform_data tegra_dvc_platform_data = {
99 .bus_clk_rate = 400000,
100};
101
82struct platform_device tegra_i2c_device1 = { 102struct platform_device tegra_i2c_device1 = {
83 .name = "tegra-i2c", 103 .name = "tegra-i2c",
84 .id = 0, 104 .id = 0,
85 .resource = i2c_resource1, 105 .resource = i2c_resource1,
86 .num_resources = ARRAY_SIZE(i2c_resource1), 106 .num_resources = ARRAY_SIZE(i2c_resource1),
87 .dev = { 107 .dev = {
88 .platform_data = 0, 108 .platform_data = &tegra_i2c1_platform_data,
89 }, 109 },
90}; 110};
91 111
@@ -95,7 +115,7 @@ struct platform_device tegra_i2c_device2 = {
95 .resource = i2c_resource2, 115 .resource = i2c_resource2,
96 .num_resources = ARRAY_SIZE(i2c_resource2), 116 .num_resources = ARRAY_SIZE(i2c_resource2),
97 .dev = { 117 .dev = {
98 .platform_data = 0, 118 .platform_data = &tegra_i2c2_platform_data,
99 }, 119 },
100}; 120};
101 121
@@ -105,7 +125,7 @@ struct platform_device tegra_i2c_device3 = {
105 .resource = i2c_resource3, 125 .resource = i2c_resource3,
106 .num_resources = ARRAY_SIZE(i2c_resource3), 126 .num_resources = ARRAY_SIZE(i2c_resource3),
107 .dev = { 127 .dev = {
108 .platform_data = 0, 128 .platform_data = &tegra_i2c3_platform_data,
109 }, 129 },
110}; 130};
111 131
@@ -115,7 +135,7 @@ struct platform_device tegra_i2c_device4 = {
115 .resource = i2c_resource4, 135 .resource = i2c_resource4,
116 .num_resources = ARRAY_SIZE(i2c_resource4), 136 .num_resources = ARRAY_SIZE(i2c_resource4),
117 .dev = { 137 .dev = {
118 .platform_data = 0, 138 .platform_data = &tegra_dvc_platform_data,
119 }, 139 },
120}; 140};
121 141
@@ -334,6 +354,28 @@ static struct resource tegra_usb3_resources[] = {
334 }, 354 },
335}; 355};
336 356
357static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
358 /* All existing boards use GPIO PV0 for phy reset */
359 .reset_gpio = TEGRA_GPIO_PV0,
360 .clk = "cdev2",
361};
362
363static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
364 .operating_mode = TEGRA_USB_OTG,
365 .power_down_on_bus_suspend = 1,
366};
367
368static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
369 .phy_config = &tegra_ehci2_ulpi_phy_config,
370 .operating_mode = TEGRA_USB_HOST,
371 .power_down_on_bus_suspend = 1,
372};
373
374static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
375 .operating_mode = TEGRA_USB_HOST,
376 .power_down_on_bus_suspend = 1,
377};
378
337static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32); 379static u64 tegra_ehci_dmamask = DMA_BIT_MASK(32);
338 380
339struct platform_device tegra_ehci1_device = { 381struct platform_device tegra_ehci1_device = {
@@ -342,6 +384,7 @@ struct platform_device tegra_ehci1_device = {
342 .dev = { 384 .dev = {
343 .dma_mask = &tegra_ehci_dmamask, 385 .dma_mask = &tegra_ehci_dmamask,
344 .coherent_dma_mask = DMA_BIT_MASK(32), 386 .coherent_dma_mask = DMA_BIT_MASK(32),
387 .platform_data = &tegra_ehci1_pdata,
345 }, 388 },
346 .resource = tegra_usb1_resources, 389 .resource = tegra_usb1_resources,
347 .num_resources = ARRAY_SIZE(tegra_usb1_resources), 390 .num_resources = ARRAY_SIZE(tegra_usb1_resources),
@@ -353,6 +396,7 @@ struct platform_device tegra_ehci2_device = {
353 .dev = { 396 .dev = {
354 .dma_mask = &tegra_ehci_dmamask, 397 .dma_mask = &tegra_ehci_dmamask,
355 .coherent_dma_mask = DMA_BIT_MASK(32), 398 .coherent_dma_mask = DMA_BIT_MASK(32),
399 .platform_data = &tegra_ehci2_pdata,
356 }, 400 },
357 .resource = tegra_usb2_resources, 401 .resource = tegra_usb2_resources,
358 .num_resources = ARRAY_SIZE(tegra_usb2_resources), 402 .num_resources = ARRAY_SIZE(tegra_usb2_resources),
@@ -364,6 +408,7 @@ struct platform_device tegra_ehci3_device = {
364 .dev = { 408 .dev = {
365 .dma_mask = &tegra_ehci_dmamask, 409 .dma_mask = &tegra_ehci_dmamask,
366 .coherent_dma_mask = DMA_BIT_MASK(32), 410 .coherent_dma_mask = DMA_BIT_MASK(32),
411 .platform_data = &tegra_ehci3_pdata,
367 }, 412 },
368 .resource = tegra_usb3_resources, 413 .resource = tegra_usb3_resources,
369 .num_resources = ARRAY_SIZE(tegra_usb3_resources), 414 .num_resources = ARRAY_SIZE(tegra_usb3_resources),
diff --git a/arch/arm/mach-tegra/gpio.c b/arch/arm/mach-tegra/gpio.c
deleted file mode 100644
index 919d63837736..000000000000
--- a/arch/arm/mach-tegra/gpio.c
+++ /dev/null
@@ -1,431 +0,0 @@
1/*
2 * arch/arm/mach-tegra/gpio.c
3 *
4 * Copyright (c) 2010 Google, Inc
5 *
6 * Author:
7 * Erik Gilling <konkers@google.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/irq.h>
22#include <linux/interrupt.h>
23
24#include <linux/io.h>
25#include <linux/gpio.h>
26
27#include <asm/mach/irq.h>
28
29#include <mach/iomap.h>
30#include <mach/suspend.h>
31
32#define GPIO_BANK(x) ((x) >> 5)
33#define GPIO_PORT(x) (((x) >> 3) & 0x3)
34#define GPIO_BIT(x) ((x) & 0x7)
35
36#define GPIO_REG(x) (IO_TO_VIRT(TEGRA_GPIO_BASE) + \
37 GPIO_BANK(x) * 0x80 + \
38 GPIO_PORT(x) * 4)
39
40#define GPIO_CNF(x) (GPIO_REG(x) + 0x00)
41#define GPIO_OE(x) (GPIO_REG(x) + 0x10)
42#define GPIO_OUT(x) (GPIO_REG(x) + 0X20)
43#define GPIO_IN(x) (GPIO_REG(x) + 0x30)
44#define GPIO_INT_STA(x) (GPIO_REG(x) + 0x40)
45#define GPIO_INT_ENB(x) (GPIO_REG(x) + 0x50)
46#define GPIO_INT_LVL(x) (GPIO_REG(x) + 0x60)
47#define GPIO_INT_CLR(x) (GPIO_REG(x) + 0x70)
48
49#define GPIO_MSK_CNF(x) (GPIO_REG(x) + 0x800)
50#define GPIO_MSK_OE(x) (GPIO_REG(x) + 0x810)
51#define GPIO_MSK_OUT(x) (GPIO_REG(x) + 0X820)
52#define GPIO_MSK_INT_STA(x) (GPIO_REG(x) + 0x840)
53#define GPIO_MSK_INT_ENB(x) (GPIO_REG(x) + 0x850)
54#define GPIO_MSK_INT_LVL(x) (GPIO_REG(x) + 0x860)
55
56#define GPIO_INT_LVL_MASK 0x010101
57#define GPIO_INT_LVL_EDGE_RISING 0x000101
58#define GPIO_INT_LVL_EDGE_FALLING 0x000100
59#define GPIO_INT_LVL_EDGE_BOTH 0x010100
60#define GPIO_INT_LVL_LEVEL_HIGH 0x000001
61#define GPIO_INT_LVL_LEVEL_LOW 0x000000
62
63struct tegra_gpio_bank {
64 int bank;
65 int irq;
66 spinlock_t lvl_lock[4];
67#ifdef CONFIG_PM
68 u32 cnf[4];
69 u32 out[4];
70 u32 oe[4];
71 u32 int_enb[4];
72 u32 int_lvl[4];
73#endif
74};
75
76
77static struct tegra_gpio_bank tegra_gpio_banks[] = {
78 {.bank = 0, .irq = INT_GPIO1},
79 {.bank = 1, .irq = INT_GPIO2},
80 {.bank = 2, .irq = INT_GPIO3},
81 {.bank = 3, .irq = INT_GPIO4},
82 {.bank = 4, .irq = INT_GPIO5},
83 {.bank = 5, .irq = INT_GPIO6},
84 {.bank = 6, .irq = INT_GPIO7},
85};
86
87static int tegra_gpio_compose(int bank, int port, int bit)
88{
89 return (bank << 5) | ((port & 0x3) << 3) | (bit & 0x7);
90}
91
92static void tegra_gpio_mask_write(u32 reg, int gpio, int value)
93{
94 u32 val;
95
96 val = 0x100 << GPIO_BIT(gpio);
97 if (value)
98 val |= 1 << GPIO_BIT(gpio);
99 __raw_writel(val, reg);
100}
101
102void tegra_gpio_enable(int gpio)
103{
104 tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 1);
105}
106
107void tegra_gpio_disable(int gpio)
108{
109 tegra_gpio_mask_write(GPIO_MSK_CNF(gpio), gpio, 0);
110}
111
112static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
113{
114 tegra_gpio_mask_write(GPIO_MSK_OUT(offset), offset, value);
115}
116
117static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset)
118{
119 return (__raw_readl(GPIO_IN(offset)) >> GPIO_BIT(offset)) & 0x1;
120}
121
122static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
123{
124 tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 0);
125 return 0;
126}
127
128static int tegra_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
129 int value)
130{
131 tegra_gpio_set(chip, offset, value);
132 tegra_gpio_mask_write(GPIO_MSK_OE(offset), offset, 1);
133 return 0;
134}
135
136
137
138static struct gpio_chip tegra_gpio_chip = {
139 .label = "tegra-gpio",
140 .direction_input = tegra_gpio_direction_input,
141 .get = tegra_gpio_get,
142 .direction_output = tegra_gpio_direction_output,
143 .set = tegra_gpio_set,
144 .base = 0,
145 .ngpio = TEGRA_NR_GPIOS,
146};
147
148static void tegra_gpio_irq_ack(struct irq_data *d)
149{
150 int gpio = d->irq - INT_GPIO_BASE;
151
152 __raw_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio));
153}
154
155static void tegra_gpio_irq_mask(struct irq_data *d)
156{
157 int gpio = d->irq - INT_GPIO_BASE;
158
159 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 0);
160}
161
162static void tegra_gpio_irq_unmask(struct irq_data *d)
163{
164 int gpio = d->irq - INT_GPIO_BASE;
165
166 tegra_gpio_mask_write(GPIO_MSK_INT_ENB(gpio), gpio, 1);
167}
168
169static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type)
170{
171 int gpio = d->irq - INT_GPIO_BASE;
172 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
173 int port = GPIO_PORT(gpio);
174 int lvl_type;
175 int val;
176 unsigned long flags;
177
178 switch (type & IRQ_TYPE_SENSE_MASK) {
179 case IRQ_TYPE_EDGE_RISING:
180 lvl_type = GPIO_INT_LVL_EDGE_RISING;
181 break;
182
183 case IRQ_TYPE_EDGE_FALLING:
184 lvl_type = GPIO_INT_LVL_EDGE_FALLING;
185 break;
186
187 case IRQ_TYPE_EDGE_BOTH:
188 lvl_type = GPIO_INT_LVL_EDGE_BOTH;
189 break;
190
191 case IRQ_TYPE_LEVEL_HIGH:
192 lvl_type = GPIO_INT_LVL_LEVEL_HIGH;
193 break;
194
195 case IRQ_TYPE_LEVEL_LOW:
196 lvl_type = GPIO_INT_LVL_LEVEL_LOW;
197 break;
198
199 default:
200 return -EINVAL;
201 }
202
203 spin_lock_irqsave(&bank->lvl_lock[port], flags);
204
205 val = __raw_readl(GPIO_INT_LVL(gpio));
206 val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio));
207 val |= lvl_type << GPIO_BIT(gpio);
208 __raw_writel(val, GPIO_INT_LVL(gpio));
209
210 spin_unlock_irqrestore(&bank->lvl_lock[port], flags);
211
212 if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
213 __irq_set_handler_locked(d->irq, handle_level_irq);
214 else if (type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
215 __irq_set_handler_locked(d->irq, handle_edge_irq);
216
217 return 0;
218}
219
220static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
221{
222 struct tegra_gpio_bank *bank;
223 int port;
224 int pin;
225 int unmasked = 0;
226 struct irq_chip *chip = irq_desc_get_chip(desc);
227
228 chained_irq_enter(chip, desc);
229
230 bank = irq_get_handler_data(irq);
231
232 for (port = 0; port < 4; port++) {
233 int gpio = tegra_gpio_compose(bank->bank, port, 0);
234 unsigned long sta = __raw_readl(GPIO_INT_STA(gpio)) &
235 __raw_readl(GPIO_INT_ENB(gpio));
236 u32 lvl = __raw_readl(GPIO_INT_LVL(gpio));
237
238 for_each_set_bit(pin, &sta, 8) {
239 __raw_writel(1 << pin, GPIO_INT_CLR(gpio));
240
241 /* if gpio is edge triggered, clear condition
242 * before executing the hander so that we don't
243 * miss edges
244 */
245 if (lvl & (0x100 << pin)) {
246 unmasked = 1;
247 chained_irq_exit(chip, desc);
248 }
249
250 generic_handle_irq(gpio_to_irq(gpio + pin));
251 }
252 }
253
254 if (!unmasked)
255 chained_irq_exit(chip, desc);
256
257}
258
259#ifdef CONFIG_PM
260void tegra_gpio_resume(void)
261{
262 unsigned long flags;
263 int b;
264 int p;
265
266 local_irq_save(flags);
267
268 for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) {
269 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b];
270
271 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) {
272 unsigned int gpio = (b<<5) | (p<<3);
273 __raw_writel(bank->cnf[p], GPIO_CNF(gpio));
274 __raw_writel(bank->out[p], GPIO_OUT(gpio));
275 __raw_writel(bank->oe[p], GPIO_OE(gpio));
276 __raw_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio));
277 __raw_writel(bank->int_enb[p], GPIO_INT_ENB(gpio));
278 }
279 }
280
281 local_irq_restore(flags);
282}
283
284void tegra_gpio_suspend(void)
285{
286 unsigned long flags;
287 int b;
288 int p;
289
290 local_irq_save(flags);
291 for (b = 0; b < ARRAY_SIZE(tegra_gpio_banks); b++) {
292 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b];
293
294 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) {
295 unsigned int gpio = (b<<5) | (p<<3);
296 bank->cnf[p] = __raw_readl(GPIO_CNF(gpio));
297 bank->out[p] = __raw_readl(GPIO_OUT(gpio));
298 bank->oe[p] = __raw_readl(GPIO_OE(gpio));
299 bank->int_enb[p] = __raw_readl(GPIO_INT_ENB(gpio));
300 bank->int_lvl[p] = __raw_readl(GPIO_INT_LVL(gpio));
301 }
302 }
303 local_irq_restore(flags);
304}
305
306static int tegra_gpio_wake_enable(struct irq_data *d, unsigned int enable)
307{
308 struct tegra_gpio_bank *bank = irq_data_get_irq_chip_data(d);
309 return irq_set_irq_wake(bank->irq, enable);
310}
311#endif
312
313static struct irq_chip tegra_gpio_irq_chip = {
314 .name = "GPIO",
315 .irq_ack = tegra_gpio_irq_ack,
316 .irq_mask = tegra_gpio_irq_mask,
317 .irq_unmask = tegra_gpio_irq_unmask,
318 .irq_set_type = tegra_gpio_irq_set_type,
319#ifdef CONFIG_PM
320 .irq_set_wake = tegra_gpio_wake_enable,
321#endif
322};
323
324
325/* This lock class tells lockdep that GPIO irqs are in a different
326 * category than their parents, so it won't report false recursion.
327 */
328static struct lock_class_key gpio_lock_class;
329
330static int __init tegra_gpio_init(void)
331{
332 struct tegra_gpio_bank *bank;
333 int i;
334 int j;
335
336 for (i = 0; i < 7; i++) {
337 for (j = 0; j < 4; j++) {
338 int gpio = tegra_gpio_compose(i, j, 0);
339 __raw_writel(0x00, GPIO_INT_ENB(gpio));
340 }
341 }
342
343 gpiochip_add(&tegra_gpio_chip);
344
345 for (i = INT_GPIO_BASE; i < (INT_GPIO_BASE + TEGRA_NR_GPIOS); i++) {
346 bank = &tegra_gpio_banks[GPIO_BANK(irq_to_gpio(i))];
347
348 irq_set_lockdep_class(i, &gpio_lock_class);
349 irq_set_chip_data(i, bank);
350 irq_set_chip_and_handler(i, &tegra_gpio_irq_chip,
351 handle_simple_irq);
352 set_irq_flags(i, IRQF_VALID);
353 }
354
355 for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) {
356 bank = &tegra_gpio_banks[i];
357
358 irq_set_chained_handler(bank->irq, tegra_gpio_irq_handler);
359 irq_set_handler_data(bank->irq, bank);
360
361 for (j = 0; j < 4; j++)
362 spin_lock_init(&bank->lvl_lock[j]);
363 }
364
365 return 0;
366}
367
368postcore_initcall(tegra_gpio_init);
369
370void __init tegra_gpio_config(struct tegra_gpio_table *table, int num)
371{
372 int i;
373
374 for (i = 0; i < num; i++) {
375 int gpio = table[i].gpio;
376
377 if (table[i].enable)
378 tegra_gpio_enable(gpio);
379 else
380 tegra_gpio_disable(gpio);
381 }
382}
383
384#ifdef CONFIG_DEBUG_FS
385
386#include <linux/debugfs.h>
387#include <linux/seq_file.h>
388
389static int dbg_gpio_show(struct seq_file *s, void *unused)
390{
391 int i;
392 int j;
393
394 for (i = 0; i < 7; i++) {
395 for (j = 0; j < 4; j++) {
396 int gpio = tegra_gpio_compose(i, j, 0);
397 seq_printf(s,
398 "%d:%d %02x %02x %02x %02x %02x %02x %06x\n",
399 i, j,
400 __raw_readl(GPIO_CNF(gpio)),
401 __raw_readl(GPIO_OE(gpio)),
402 __raw_readl(GPIO_OUT(gpio)),
403 __raw_readl(GPIO_IN(gpio)),
404 __raw_readl(GPIO_INT_STA(gpio)),
405 __raw_readl(GPIO_INT_ENB(gpio)),
406 __raw_readl(GPIO_INT_LVL(gpio)));
407 }
408 }
409 return 0;
410}
411
412static int dbg_gpio_open(struct inode *inode, struct file *file)
413{
414 return single_open(file, dbg_gpio_show, &inode->i_private);
415}
416
417static const struct file_operations debug_fops = {
418 .open = dbg_gpio_open,
419 .read = seq_read,
420 .llseek = seq_lseek,
421 .release = single_release,
422};
423
424static int __init tegra_gpio_debuginit(void)
425{
426 (void) debugfs_create_file("tegra_gpio", S_IRUGO,
427 NULL, NULL, &debug_fops);
428 return 0;
429}
430late_initcall(tegra_gpio_debuginit);
431#endif
diff --git a/arch/arm/mach-tegra/include/mach/barriers.h b/arch/arm/mach-tegra/include/mach/barriers.h
deleted file mode 100644
index 425b42e91ef6..000000000000
--- a/arch/arm/mach-tegra/include/mach/barriers.h
+++ /dev/null
@@ -1,30 +0,0 @@
1/*
2 * arch/arm/mach-realview/include/mach/barriers.h
3 *
4 * Copyright (C) 2010 ARM Ltd.
5 * Written by Catalin Marinas <catalin.marinas@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifndef __MACH_BARRIERS_H
22#define __MACH_BARRIERS_H
23
24#include <asm/outercache.h>
25
26#define rmb() dsb()
27#define wmb() do { dsb(); outer_sync(); } while (0)
28#define mb() wmb()
29
30#endif /* __MACH_BARRIERS_H */
diff --git a/arch/arm/mach-tegra/include/mach/clkdev.h b/arch/arm/mach-tegra/include/mach/clkdev.h
deleted file mode 100644
index 66cd3f4fc896..000000000000
--- a/arch/arm/mach-tegra/include/mach/clkdev.h
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * arch/arm/mach-tegra/include/mach/clkdev.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#ifndef __MACH_CLKDEV_H
21#define __MACH_CLKDEV_H
22
23struct clk;
24
25static inline int __clk_get(struct clk *clk)
26{
27 return 1;
28}
29
30static inline void __clk_put(struct clk *clk)
31{
32}
33
34#endif
diff --git a/arch/arm/mach-tegra/include/mach/hardware.h b/arch/arm/mach-tegra/include/mach/hardware.h
deleted file mode 100644
index 56e43b3a5b97..000000000000
--- a/arch/arm/mach-tegra/include/mach/hardware.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * arch/arm/mach-tegra/include/mach/hardware.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 * Erik Gilling <konkers@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#ifndef __MACH_TEGRA_HARDWARE_H
22#define __MACH_TEGRA_HARDWARE_H
23
24#define PCIBIOS_MIN_IO 0x1000
25#define PCIBIOS_MIN_MEM 0
26#define pcibios_assign_all_busses() 1
27
28#endif
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h
index d0183d876c3b..027c4215d313 100644
--- a/arch/arm/mach-tegra/include/mach/system.h
+++ b/arch/arm/mach-tegra/include/mach/system.h
@@ -21,7 +21,6 @@
21#ifndef __MACH_TEGRA_SYSTEM_H 21#ifndef __MACH_TEGRA_SYSTEM_H
22#define __MACH_TEGRA_SYSTEM_H 22#define __MACH_TEGRA_SYSTEM_H
23 23
24#include <mach/hardware.h>
25#include <mach/iomap.h> 24#include <mach/iomap.h>
26 25
27extern void (*arch_reset)(char mode, const char *cmd); 26extern void (*arch_reset)(char mode, const char *cmd);
diff --git a/arch/arm/mach-tegra/io.c b/arch/arm/mach-tegra/io.c
index 31848a9592f8..ea50fe28cf6a 100644
--- a/arch/arm/mach-tegra/io.c
+++ b/arch/arm/mach-tegra/io.c
@@ -24,7 +24,6 @@
24#include <linux/mm.h> 24#include <linux/mm.h>
25#include <linux/io.h> 25#include <linux/io.h>
26 26
27#include <mach/hardware.h>
28#include <asm/page.h> 27#include <asm/page.h>
29#include <asm/mach/map.h> 28#include <asm/mach/map.h>
30 29
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 2941212b853c..f1f699d86c32 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -449,7 +449,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
449 return 1; 449 return 1;
450} 450}
451 451
452static int tegra_pcie_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 452static int tegra_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
453{ 453{
454 return INT_PCIE_INTR; 454 return INT_PCIE_INTR;
455} 455}
@@ -912,6 +912,8 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
912 if (!(init_port0 || init_port1)) 912 if (!(init_port0 || init_port1))
913 return -ENODEV; 913 return -ENODEV;
914 914
915 pcibios_min_mem = 0;
916
915 err = tegra_pcie_get_resources(); 917 err = tegra_pcie_get_resources();
916 if (err) 918 if (err)
917 return err; 919 return err;
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index b8ae3c978dee..0886cbccddee 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -21,7 +21,6 @@
21 21
22#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
23#include <asm/hardware/gic.h> 23#include <asm/hardware/gic.h>
24#include <mach/hardware.h>
25#include <asm/mach-types.h> 24#include <asm/mach-types.h>
26#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
27 26
@@ -122,21 +121,13 @@ void __init smp_init_cpus(void)
122 } 121 }
123 122
124 for (i = 0; i < ncores; i++) 123 for (i = 0; i < ncores; i++)
125 cpu_set(i, cpu_possible_map); 124 set_cpu_possible(i, true);
126 125
127 set_smp_cross_call(gic_raise_softirq); 126 set_smp_cross_call(gic_raise_softirq);
128} 127}
129 128
130void __init platform_smp_prepare_cpus(unsigned int max_cpus) 129void __init platform_smp_prepare_cpus(unsigned int max_cpus)
131{ 130{
132 int i;
133
134 /*
135 * Initialise the present map, which describes the set of CPUs
136 * actually populated at the present time.
137 */
138 for (i = 0; i < max_cpus; i++)
139 set_cpu_present(i, true);
140 131
141 scu_enable(scu_base); 132 scu_enable(scu_base);
142} 133}
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c
index bb618075fab6..0fe9b3ee2947 100644
--- a/arch/arm/mach-tegra/tegra2_clocks.c
+++ b/arch/arm/mach-tegra/tegra2_clocks.c
@@ -2182,8 +2182,8 @@ struct clk tegra_list_clks[] = {
2182 PERIPH_CLK("tvo", "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ 2182 PERIPH_CLK("tvo", "tvo", NULL, 49, 0x188, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */
2183 PERIPH_CLK("hdmi", "hdmi", NULL, 51, 0x18c, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ 2183 PERIPH_CLK("hdmi", "hdmi", NULL, 51, 0x18c, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */
2184 PERIPH_CLK("tvdac", "tvdac", NULL, 53, 0x194, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */ 2184 PERIPH_CLK("tvdac", "tvdac", NULL, 53, 0x194, 250000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* requires min voltage */
2185 PERIPH_CLK("disp1", "tegradc.0", NULL, 27, 0x138, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* scales with voltage and process_id */ 2185 PERIPH_CLK("disp1", "tegradc.0", NULL, 27, 0x138, 600000000, mux_pllp_plld_pllc_clkm, MUX), /* scales with voltage and process_id */
2186 PERIPH_CLK("disp2", "tegradc.1", NULL, 26, 0x13c, 600000000, mux_pllp_plld_pllc_clkm, MUX | DIV_U71), /* scales with voltage and process_id */ 2186 PERIPH_CLK("disp2", "tegradc.1", NULL, 26, 0x13c, 600000000, mux_pllp_plld_pllc_clkm, MUX), /* scales with voltage and process_id */
2187 PERIPH_CLK("usbd", "fsl-tegra-udc", NULL, 22, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ 2187 PERIPH_CLK("usbd", "fsl-tegra-udc", NULL, 22, 0, 480000000, mux_clk_m, 0), /* requires min voltage */
2188 PERIPH_CLK("usb2", "tegra-ehci.1", NULL, 58, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ 2188 PERIPH_CLK("usb2", "tegra-ehci.1", NULL, 58, 0, 480000000, mux_clk_m, 0), /* requires min voltage */
2189 PERIPH_CLK("usb3", "tegra-ehci.2", NULL, 59, 0, 480000000, mux_clk_m, 0), /* requires min voltage */ 2189 PERIPH_CLK("usb3", "tegra-ehci.2", NULL, 59, 0, 480000000, mux_clk_m, 0), /* requires min voltage */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-21 01:33:28 -0500