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Diffstat (limited to 'arch/arm/mach-tegra/pm.c')
-rw-r--r--arch/arm/mach-tegra/pm.c25
1 files changed, 21 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c
index 45cf52c7e528..94e69bee3da5 100644
--- a/arch/arm/mach-tegra/pm.c
+++ b/arch/arm/mach-tegra/pm.c
@@ -44,6 +44,20 @@
44static DEFINE_SPINLOCK(tegra_lp2_lock); 44static DEFINE_SPINLOCK(tegra_lp2_lock);
45void (*tegra_tear_down_cpu)(void); 45void (*tegra_tear_down_cpu)(void);
46 46
47static void tegra_tear_down_cpu_init(void)
48{
49 switch (tegra_chip_id) {
50 case TEGRA20:
51 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
52 tegra_tear_down_cpu = tegra20_tear_down_cpu;
53 break;
54 case TEGRA30:
55 if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC))
56 tegra_tear_down_cpu = tegra30_tear_down_cpu;
57 break;
58 }
59}
60
47/* 61/*
48 * restore_cpu_complex 62 * restore_cpu_complex
49 * 63 *
@@ -91,8 +105,9 @@ static void suspend_cpu_complex(void)
91 flowctrl_cpu_suspend_enter(cpu); 105 flowctrl_cpu_suspend_enter(cpu);
92} 106}
93 107
94void tegra_clear_cpu_in_lp2(int phy_cpu_id) 108void tegra_clear_cpu_in_lp2(void)
95{ 109{
110 int phy_cpu_id = cpu_logical_map(smp_processor_id());
96 u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; 111 u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
97 112
98 spin_lock(&tegra_lp2_lock); 113 spin_lock(&tegra_lp2_lock);
@@ -103,8 +118,9 @@ void tegra_clear_cpu_in_lp2(int phy_cpu_id)
103 spin_unlock(&tegra_lp2_lock); 118 spin_unlock(&tegra_lp2_lock);
104} 119}
105 120
106bool tegra_set_cpu_in_lp2(int phy_cpu_id) 121bool tegra_set_cpu_in_lp2(void)
107{ 122{
123 int phy_cpu_id = cpu_logical_map(smp_processor_id());
108 bool last_cpu = false; 124 bool last_cpu = false;
109 cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask; 125 cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask;
110 u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; 126 u32 *cpu_in_lp2 = tegra_cpu_lp2_mask;
@@ -192,7 +208,7 @@ static int __cpuinit tegra_suspend_enter(suspend_state_t state)
192 suspend_cpu_complex(); 208 suspend_cpu_complex();
193 switch (mode) { 209 switch (mode) {
194 case TEGRA_SUSPEND_LP2: 210 case TEGRA_SUSPEND_LP2:
195 tegra_set_cpu_in_lp2(0); 211 tegra_set_cpu_in_lp2();
196 break; 212 break;
197 default: 213 default:
198 break; 214 break;
@@ -202,7 +218,7 @@ static int __cpuinit tegra_suspend_enter(suspend_state_t state)
202 218
203 switch (mode) { 219 switch (mode) {
204 case TEGRA_SUSPEND_LP2: 220 case TEGRA_SUSPEND_LP2:
205 tegra_clear_cpu_in_lp2(0); 221 tegra_clear_cpu_in_lp2();
206 break; 222 break;
207 default: 223 default:
208 break; 224 break;
@@ -224,6 +240,7 @@ void __init tegra_init_suspend(void)
224 if (tegra_pmc_get_suspend_mode() == TEGRA_SUSPEND_NONE) 240 if (tegra_pmc_get_suspend_mode() == TEGRA_SUSPEND_NONE)
225 return; 241 return;
226 242
243 tegra_tear_down_cpu_init();
227 tegra_pmc_suspend_init(); 244 tegra_pmc_suspend_init();
228 245
229 suspend_set_ops(&tegra_suspend_ops); 246 suspend_set_ops(&tegra_suspend_ops);