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-rw-r--r--arch/arm/mach-tegra/platsmp.c35
1 files changed, 9 insertions, 26 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 1c0fd92cab39..ec1f68924edf 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -22,7 +22,6 @@
22#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <asm/mach-types.h> 24#include <asm/mach-types.h>
25#include <asm/localtimer.h>
26#include <asm/smp_scu.h> 25#include <asm/smp_scu.h>
27 26
28#include <mach/iomap.h> 27#include <mach/iomap.h>
@@ -41,14 +40,12 @@ static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
41 40
42void __cpuinit platform_secondary_init(unsigned int cpu) 41void __cpuinit platform_secondary_init(unsigned int cpu)
43{ 42{
44 trace_hardirqs_off();
45
46 /* 43 /*
47 * if any interrupts are already enabled for the primary 44 * if any interrupts are already enabled for the primary
48 * core (e.g. timer irq), then they will not have been enabled 45 * core (e.g. timer irq), then they will not have been enabled
49 * for us: do so 46 * for us: do so
50 */ 47 */
51 gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x100); 48 gic_secondary_init(0);
52 49
53 /* 50 /*
54 * Synchronise with the boot thread. 51 * Synchronise with the boot thread.
@@ -117,24 +114,20 @@ void __init smp_init_cpus(void)
117{ 114{
118 unsigned int i, ncores = scu_get_core_count(scu_base); 115 unsigned int i, ncores = scu_get_core_count(scu_base);
119 116
117 if (ncores > NR_CPUS) {
118 printk(KERN_ERR "Tegra: no. of cores (%u) greater than configured (%u), clipping\n",
119 ncores, NR_CPUS);
120 ncores = NR_CPUS;
121 }
122
120 for (i = 0; i < ncores; i++) 123 for (i = 0; i < ncores; i++)
121 cpu_set(i, cpu_possible_map); 124 cpu_set(i, cpu_possible_map);
122} 125}
123 126
124void __init smp_prepare_cpus(unsigned int max_cpus) 127void __init platform_smp_prepare_cpus(unsigned int max_cpus)
125{ 128{
126 unsigned int ncores = scu_get_core_count(scu_base);
127 unsigned int cpu = smp_processor_id();
128 int i; 129 int i;
129 130
130 smp_store_cpu_info(cpu);
131
132 /*
133 * are we trying to boot more cores than exist?
134 */
135 if (max_cpus > ncores)
136 max_cpus = ncores;
137
138 /* 131 /*
139 * Initialise the present map, which describes the set of CPUs 132 * Initialise the present map, which describes the set of CPUs
140 * actually populated at the present time. 133 * actually populated at the present time.
@@ -142,15 +135,5 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
142 for (i = 0; i < max_cpus; i++) 135 for (i = 0; i < max_cpus; i++)
143 set_cpu_present(i, true); 136 set_cpu_present(i, true);
144 137
145 /* 138 scu_enable(scu_base);
146 * Initialise the SCU if there are more than one CPU and let
147 * them know where to start. Note that, on modern versions of
148 * MILO, the "poke" doesn't actually do anything until each
149 * individual core is sent a soft interrupt to get it out of
150 * WFI
151 */
152 if (max_cpus > 1) {
153 percpu_timer_setup();
154 scu_enable(scu_base);
155 }
156} 139}