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-rw-r--r--arch/arm/mach-tegra/platsmp.c25
1 files changed, 3 insertions, 22 deletions
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c
index 3c4a43c892a5..2c6b3d55213b 100644
--- a/arch/arm/mach-tegra/platsmp.c
+++ b/arch/arm/mach-tegra/platsmp.c
@@ -19,6 +19,7 @@
19#include <linux/smp.h> 19#include <linux/smp.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/irqchip/arm-gic.h> 21#include <linux/irqchip/arm-gic.h>
22#include <linux/clk/tegra.h>
22 23
23#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
24#include <asm/mach-types.h> 25#include <asm/mach-types.h>
@@ -30,7 +31,6 @@
30#include "fuse.h" 31#include "fuse.h"
31#include "flowctrl.h" 32#include "flowctrl.h"
32#include "reset.h" 33#include "reset.h"
33#include "tegra_cpu_car.h"
34 34
35#include "common.h" 35#include "common.h"
36#include "iomap.h" 36#include "iomap.h"
@@ -38,7 +38,6 @@
38extern void tegra_secondary_startup(void); 38extern void tegra_secondary_startup(void);
39 39
40static cpumask_t tegra_cpu_init_mask; 40static cpumask_t tegra_cpu_init_mask;
41static void __iomem *scu_base = IO_ADDRESS(TEGRA_ARM_PERIF_BASE);
42 41
43#define EVP_CPU_RESET_VECTOR \ 42#define EVP_CPU_RESET_VECTOR \
44 (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100) 43 (IO_ADDRESS(TEGRA_EXCEPTION_VECTORS_BASE) + 0x100)
@@ -177,34 +176,16 @@ done:
177 return status; 176 return status;
178} 177}
179 178
180/*
181 * Initialise the CPU possible map early - this describes the CPUs
182 * which may be present or become present in the system.
183 */
184static void __init tegra_smp_init_cpus(void)
185{
186 unsigned int i, ncores = scu_get_core_count(scu_base);
187
188 if (ncores > nr_cpu_ids) {
189 pr_warn("SMP: %u cores greater than maximum (%u), clipping\n",
190 ncores, nr_cpu_ids);
191 ncores = nr_cpu_ids;
192 }
193
194 for (i = 0; i < ncores; i++)
195 set_cpu_possible(i, true);
196}
197
198static void __init tegra_smp_prepare_cpus(unsigned int max_cpus) 179static void __init tegra_smp_prepare_cpus(unsigned int max_cpus)
199{ 180{
200 /* Always mark the boot CPU (CPU0) as initialized. */ 181 /* Always mark the boot CPU (CPU0) as initialized. */
201 cpumask_set_cpu(0, &tegra_cpu_init_mask); 182 cpumask_set_cpu(0, &tegra_cpu_init_mask);
202 183
203 scu_enable(scu_base); 184 if (scu_a9_has_base())
185 scu_enable(IO_ADDRESS(scu_a9_get_base()));
204} 186}
205 187
206struct smp_operations tegra_smp_ops __initdata = { 188struct smp_operations tegra_smp_ops __initdata = {
207 .smp_init_cpus = tegra_smp_init_cpus,
208 .smp_prepare_cpus = tegra_smp_prepare_cpus, 189 .smp_prepare_cpus = tegra_smp_prepare_cpus,
209 .smp_secondary_init = tegra_secondary_init, 190 .smp_secondary_init = tegra_secondary_init,
210 .smp_boot_secondary = tegra_boot_secondary, 191 .smp_boot_secondary = tegra_boot_secondary,