2 files changed, 225 insertions, 159 deletions
diff --git a/arch/arm/mach-tegra/include/mach/pinmux-t2.h b/arch/arm/mach-tegra/include/mach/pinmux-t2.h
new file mode 100644
index 000000000000..e5b9d740f973
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/pinmux-t2.h
@@ -0,0 +1,174 @@
+/*
+ * linux/arch/arm/mach-tegra/include/mach/pinmux-t2.h
+ *
+ * Copyright (C) 2010 Google, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#ifndef __MACH_TEGRA_PINMUX_T2_H
+#define __MACH_TEGRA_PINMUX_T2_H
+enum tegra_pingroup {
+        TEGRA_PINGROUP_ATA = 0,
+        TEGRA_PINGROUP_ATB,
+        TEGRA_PINGROUP_ATC,
+        TEGRA_PINGROUP_ATD,
+        TEGRA_PINGROUP_ATE,
+        TEGRA_PINGROUP_CDEV1,
+        TEGRA_PINGROUP_CDEV2,
+        TEGRA_PINGROUP_CRTP,
+        TEGRA_PINGROUP_CSUS,
+        TEGRA_PINGROUP_DAP1,
+        TEGRA_PINGROUP_DAP2,
+        TEGRA_PINGROUP_DAP3,
+        TEGRA_PINGROUP_DAP4,
+        TEGRA_PINGROUP_DDC,
+        TEGRA_PINGROUP_DTA,
+        TEGRA_PINGROUP_DTB,
+        TEGRA_PINGROUP_DTC,
+        TEGRA_PINGROUP_DTD,
+        TEGRA_PINGROUP_DTE,
+        TEGRA_PINGROUP_DTF,
+        TEGRA_PINGROUP_GMA,
+        TEGRA_PINGROUP_GMB,
+        TEGRA_PINGROUP_GMC,
+        TEGRA_PINGROUP_GMD,
+        TEGRA_PINGROUP_GME,
+        TEGRA_PINGROUP_GPU,
+        TEGRA_PINGROUP_GPU7,
+        TEGRA_PINGROUP_GPV,
+        TEGRA_PINGROUP_HDINT,
+        TEGRA_PINGROUP_I2CP,
+        TEGRA_PINGROUP_IRRX,
+        TEGRA_PINGROUP_IRTX,
+        TEGRA_PINGROUP_KBCA,
+        TEGRA_PINGROUP_KBCB,
+        TEGRA_PINGROUP_KBCC,
+        TEGRA_PINGROUP_KBCD,
+        TEGRA_PINGROUP_KBCE,
+        TEGRA_PINGROUP_KBCF,
+        TEGRA_PINGROUP_LCSN,
+        TEGRA_PINGROUP_LD0,
+        TEGRA_PINGROUP_LD1,
+        TEGRA_PINGROUP_LD10,
+        TEGRA_PINGROUP_LD11,
+        TEGRA_PINGROUP_LD12,
+        TEGRA_PINGROUP_LD13,
+        TEGRA_PINGROUP_LD14,
+        TEGRA_PINGROUP_LD15,
+        TEGRA_PINGROUP_LD16,
+        TEGRA_PINGROUP_LD17,
+        TEGRA_PINGROUP_LD2,
+        TEGRA_PINGROUP_LD3,
+        TEGRA_PINGROUP_LD4,
+        TEGRA_PINGROUP_LD5,
+        TEGRA_PINGROUP_LD6,
+        TEGRA_PINGROUP_LD7,
+        TEGRA_PINGROUP_LD8,
+        TEGRA_PINGROUP_LD9,
+        TEGRA_PINGROUP_LDC,
+        TEGRA_PINGROUP_LDI,
+        TEGRA_PINGROUP_LHP0,
+        TEGRA_PINGROUP_LHP1,
+        TEGRA_PINGROUP_LHP2,
+        TEGRA_PINGROUP_LHS,
+        TEGRA_PINGROUP_LM0,
+        TEGRA_PINGROUP_LM1,
+        TEGRA_PINGROUP_LPP,
+        TEGRA_PINGROUP_LPW0,
+        TEGRA_PINGROUP_LPW1,
+        TEGRA_PINGROUP_LPW2,
+        TEGRA_PINGROUP_LSC0,
+        TEGRA_PINGROUP_LSC1,
+        TEGRA_PINGROUP_LSCK,
+        TEGRA_PINGROUP_LSDA,
+        TEGRA_PINGROUP_LSDI,
+        TEGRA_PINGROUP_LSPI,
+        TEGRA_PINGROUP_LVP0,
+        TEGRA_PINGROUP_LVP1,
+        TEGRA_PINGROUP_LVS,
+        TEGRA_PINGROUP_OWC,
+        TEGRA_PINGROUP_PMC,
+        TEGRA_PINGROUP_PTA,
+        TEGRA_PINGROUP_RM,
+        TEGRA_PINGROUP_SDB,
+        TEGRA_PINGROUP_SDC,
+        TEGRA_PINGROUP_SDD,
+        TEGRA_PINGROUP_SDIO1,
+        TEGRA_PINGROUP_SLXA,
+        TEGRA_PINGROUP_SLXC,
+        TEGRA_PINGROUP_SLXD,
+        TEGRA_PINGROUP_SLXK,
+        TEGRA_PINGROUP_SPDI,
+        TEGRA_PINGROUP_SPDO,
+        TEGRA_PINGROUP_SPIA,
+        TEGRA_PINGROUP_SPIB,
+        TEGRA_PINGROUP_SPIC,
+        TEGRA_PINGROUP_SPID,
+        TEGRA_PINGROUP_SPIE,
+        TEGRA_PINGROUP_SPIF,
+        TEGRA_PINGROUP_SPIG,
+        TEGRA_PINGROUP_SPIH,
+        TEGRA_PINGROUP_UAA,
+        TEGRA_PINGROUP_UAB,
+        TEGRA_PINGROUP_UAC,
+        TEGRA_PINGROUP_UAD,
+        TEGRA_PINGROUP_UCA,
+        TEGRA_PINGROUP_UCB,
+        TEGRA_PINGROUP_UDA,
+        /* these pin groups only have pullup and pull down control */
+        TEGRA_PINGROUP_CK32,
+        TEGRA_PINGROUP_DDRC,
+        TEGRA_PINGROUP_PMCA,
+        TEGRA_PINGROUP_PMCB,
+        TEGRA_PINGROUP_PMCC,
+        TEGRA_PINGROUP_PMCD,
+        TEGRA_PINGROUP_PMCE,
+        TEGRA_PINGROUP_XM2C,
+        TEGRA_PINGROUP_XM2D,
+        TEGRA_MAX_PINGROUP,
+};
+enum tegra_drive_pingroup {
+        TEGRA_DRIVE_PINGROUP_AO1 = 0,
+        TEGRA_DRIVE_PINGROUP_AO2,
+        TEGRA_DRIVE_PINGROUP_AT1,
+        TEGRA_DRIVE_PINGROUP_AT2,
+        TEGRA_DRIVE_PINGROUP_CDEV1,
+        TEGRA_DRIVE_PINGROUP_CDEV2,
+        TEGRA_DRIVE_PINGROUP_CSUS,
+        TEGRA_DRIVE_PINGROUP_DAP1,
+        TEGRA_DRIVE_PINGROUP_DAP2,
+        TEGRA_DRIVE_PINGROUP_DAP3,
+        TEGRA_DRIVE_PINGROUP_DAP4,
+        TEGRA_DRIVE_PINGROUP_DBG,
+        TEGRA_DRIVE_PINGROUP_LCD1,
+        TEGRA_DRIVE_PINGROUP_LCD2,
+        TEGRA_DRIVE_PINGROUP_SDMMC2,
+        TEGRA_DRIVE_PINGROUP_SDMMC3,
+        TEGRA_DRIVE_PINGROUP_SPI,
+        TEGRA_DRIVE_PINGROUP_UAA,
+        TEGRA_DRIVE_PINGROUP_UAB,
+        TEGRA_DRIVE_PINGROUP_UART2,
+        TEGRA_DRIVE_PINGROUP_UART3,
+        TEGRA_DRIVE_PINGROUP_VI1,
+        TEGRA_DRIVE_PINGROUP_VI2,
+        TEGRA_DRIVE_PINGROUP_XM2A,
+        TEGRA_DRIVE_PINGROUP_XM2C,
+        TEGRA_DRIVE_PINGROUP_XM2D,
+        TEGRA_DRIVE_PINGROUP_XM2CLK,
+        TEGRA_DRIVE_PINGROUP_MEMCOMP,
+        TEGRA_MAX_DRIVE_PINGROUP,
+};
+#endif
diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h
index 41c8ce5b7c27..defd8775defa 100644
--- a/arch/arm/mach-tegra/include/mach/pinmux.h
+++ b/arch/arm/mach-tegra/include/mach/pinmux.h
@@ -17,126 +17,11 @@
 #ifndef __MACH_TEGRA_PINMUX_H
 #define __MACH_TEGRA_PINMUX_H
-enum tegra_pingroup {
+#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
-        TEGRA_PINGROUP_ATA = 0,
+#include "pinmux-t2.h"
-        TEGRA_PINGROUP_ATB,
+#else
-        TEGRA_PINGROUP_ATC,
+#error "Undefined Tegra architecture"
-        TEGRA_PINGROUP_ATD,
+#endif
-        TEGRA_PINGROUP_ATE,
-        TEGRA_PINGROUP_CDEV1,
-        TEGRA_PINGROUP_CDEV2,
-        TEGRA_PINGROUP_CRTP,
-        TEGRA_PINGROUP_CSUS,
-        TEGRA_PINGROUP_DAP1,
-        TEGRA_PINGROUP_DAP2,
-        TEGRA_PINGROUP_DAP3,
-        TEGRA_PINGROUP_DAP4,
-        TEGRA_PINGROUP_DDC,
-        TEGRA_PINGROUP_DTA,
-        TEGRA_PINGROUP_DTB,
-        TEGRA_PINGROUP_DTC,
-        TEGRA_PINGROUP_DTD,
-        TEGRA_PINGROUP_DTE,
-        TEGRA_PINGROUP_DTF,
-        TEGRA_PINGROUP_GMA,
-        TEGRA_PINGROUP_GMB,
-        TEGRA_PINGROUP_GMC,
-        TEGRA_PINGROUP_GMD,
-        TEGRA_PINGROUP_GME,
-        TEGRA_PINGROUP_GPU,
-        TEGRA_PINGROUP_GPU7,
-        TEGRA_PINGROUP_GPV,
-        TEGRA_PINGROUP_HDINT,
-        TEGRA_PINGROUP_I2CP,
-        TEGRA_PINGROUP_IRRX,
-        TEGRA_PINGROUP_IRTX,
-        TEGRA_PINGROUP_KBCA,
-        TEGRA_PINGROUP_KBCB,
-        TEGRA_PINGROUP_KBCC,
-        TEGRA_PINGROUP_KBCD,
-        TEGRA_PINGROUP_KBCE,
-        TEGRA_PINGROUP_KBCF,
-        TEGRA_PINGROUP_LCSN,
-        TEGRA_PINGROUP_LD0,
-        TEGRA_PINGROUP_LD1,
-        TEGRA_PINGROUP_LD10,
-        TEGRA_PINGROUP_LD11,
-        TEGRA_PINGROUP_LD12,
-        TEGRA_PINGROUP_LD13,
-        TEGRA_PINGROUP_LD14,
-        TEGRA_PINGROUP_LD15,
-        TEGRA_PINGROUP_LD16,
-        TEGRA_PINGROUP_LD17,
-        TEGRA_PINGROUP_LD2,
-        TEGRA_PINGROUP_LD3,
-        TEGRA_PINGROUP_LD4,
-        TEGRA_PINGROUP_LD5,
-        TEGRA_PINGROUP_LD6,
-        TEGRA_PINGROUP_LD7,
-        TEGRA_PINGROUP_LD8,
-        TEGRA_PINGROUP_LD9,
-        TEGRA_PINGROUP_LDC,
-        TEGRA_PINGROUP_LDI,
-        TEGRA_PINGROUP_LHP0,
-        TEGRA_PINGROUP_LHP1,
-        TEGRA_PINGROUP_LHP2,
-        TEGRA_PINGROUP_LHS,
-        TEGRA_PINGROUP_LM0,
-        TEGRA_PINGROUP_LM1,
-        TEGRA_PINGROUP_LPP,
-        TEGRA_PINGROUP_LPW0,
-        TEGRA_PINGROUP_LPW1,
-        TEGRA_PINGROUP_LPW2,
-        TEGRA_PINGROUP_LSC0,
-        TEGRA_PINGROUP_LSC1,
-        TEGRA_PINGROUP_LSCK,
-        TEGRA_PINGROUP_LSDA,
-        TEGRA_PINGROUP_LSDI,
-        TEGRA_PINGROUP_LSPI,
-        TEGRA_PINGROUP_LVP0,
-        TEGRA_PINGROUP_LVP1,
-        TEGRA_PINGROUP_LVS,
-        TEGRA_PINGROUP_OWC,
-        TEGRA_PINGROUP_PMC,
-        TEGRA_PINGROUP_PTA,
-        TEGRA_PINGROUP_RM,
-        TEGRA_PINGROUP_SDB,
-        TEGRA_PINGROUP_SDC,
-        TEGRA_PINGROUP_SDD,
-        TEGRA_PINGROUP_SDIO1,
-        TEGRA_PINGROUP_SLXA,
-        TEGRA_PINGROUP_SLXC,
-        TEGRA_PINGROUP_SLXD,
-        TEGRA_PINGROUP_SLXK,
-        TEGRA_PINGROUP_SPDI,
-        TEGRA_PINGROUP_SPDO,
-        TEGRA_PINGROUP_SPIA,
-        TEGRA_PINGROUP_SPIB,
-        TEGRA_PINGROUP_SPIC,
-        TEGRA_PINGROUP_SPID,
-        TEGRA_PINGROUP_SPIE,
-        TEGRA_PINGROUP_SPIF,
-        TEGRA_PINGROUP_SPIG,
-        TEGRA_PINGROUP_SPIH,
-        TEGRA_PINGROUP_UAA,
-        TEGRA_PINGROUP_UAB,
-        TEGRA_PINGROUP_UAC,
-        TEGRA_PINGROUP_UAD,
-        TEGRA_PINGROUP_UCA,
-        TEGRA_PINGROUP_UCB,
-        TEGRA_PINGROUP_UDA,
-        /* these pin groups only have pullup and pull down control */
-        TEGRA_PINGROUP_CK32,
-        TEGRA_PINGROUP_DDRC,
-        TEGRA_PINGROUP_PMCA,
-        TEGRA_PINGROUP_PMCB,
-        TEGRA_PINGROUP_PMCC,
-        TEGRA_PINGROUP_PMCD,
-        TEGRA_PINGROUP_PMCE,
-        TEGRA_PINGROUP_XM2C,
-        TEGRA_PINGROUP_XM2D,
-        TEGRA_MAX_PINGROUP,
-};
 enum tegra_mux_func {
        TEGRA_MUX_RSVD = 0x8000,
@@ -205,6 +90,7 @@ enum tegra_mux_func {
        TEGRA_MUX_VI,
        TEGRA_MUX_VI_SENSOR_CLK,
        TEGRA_MUX_XIO,
+        TEGRA_MUX_SAFE,
        TEGRA_MAX_MUX,
 };
@@ -219,6 +105,18 @@ enum tegra_tristate {
        TEGRA_TRI_TRISTATE = 1,
 };
+enum tegra_vddio {
+        TEGRA_VDDIO_BB = 0,
+        TEGRA_VDDIO_LCD,
+        TEGRA_VDDIO_VI,
+        TEGRA_VDDIO_UART,
+        TEGRA_VDDIO_DDR,
+        TEGRA_VDDIO_NAND,
+        TEGRA_VDDIO_SYS,
+        TEGRA_VDDIO_AUDIO,
+        TEGRA_VDDIO_SD,
+};
 struct tegra_pingroup_config {
        enum tegra_pingroup     pingroup;
        enum tegra_mux_func     func;
@@ -270,38 +168,6 @@ enum tegra_pull_strength {
        TEGRA_MAX_PULL,
 };
-enum tegra_drive_pingroup {
-        TEGRA_DRIVE_PINGROUP_AO1 = 0,
-        TEGRA_DRIVE_PINGROUP_AO2,
-        TEGRA_DRIVE_PINGROUP_AT1,
-        TEGRA_DRIVE_PINGROUP_AT2,
-        TEGRA_DRIVE_PINGROUP_CDEV1,
-        TEGRA_DRIVE_PINGROUP_CDEV2,
-        TEGRA_DRIVE_PINGROUP_CSUS,
-        TEGRA_DRIVE_PINGROUP_DAP1,
-        TEGRA_DRIVE_PINGROUP_DAP2,
-        TEGRA_DRIVE_PINGROUP_DAP3,
-        TEGRA_DRIVE_PINGROUP_DAP4,
-        TEGRA_DRIVE_PINGROUP_DBG,
-        TEGRA_DRIVE_PINGROUP_LCD1,
-        TEGRA_DRIVE_PINGROUP_LCD2,
-        TEGRA_DRIVE_PINGROUP_SDMMC2,
-        TEGRA_DRIVE_PINGROUP_SDMMC3,
-        TEGRA_DRIVE_PINGROUP_SPI,
-        TEGRA_DRIVE_PINGROUP_UAA,
-        TEGRA_DRIVE_PINGROUP_UAB,
-        TEGRA_DRIVE_PINGROUP_UART2,
-        TEGRA_DRIVE_PINGROUP_UART3,
-        TEGRA_DRIVE_PINGROUP_VI1,
-        TEGRA_DRIVE_PINGROUP_VI2,
-        TEGRA_DRIVE_PINGROUP_XM2A,
-        TEGRA_DRIVE_PINGROUP_XM2C,
-        TEGRA_DRIVE_PINGROUP_XM2D,
-        TEGRA_DRIVE_PINGROUP_XM2CLK,
-        TEGRA_DRIVE_PINGROUP_MEMCOMP,
-        TEGRA_MAX_DRIVE_PINGROUP,
-};
 enum tegra_drive {
        TEGRA_DRIVE_DIV_8 = 0,
        TEGRA_DRIVE_DIV_4,
@@ -331,18 +197,44 @@ struct tegra_drive_pingroup_config {
        enum tegra_slew slew_falling;
 };
-int tegra_pinmux_set_func(enum tegra_pingroup pg, enum tegra_mux_func func);
+struct tegra_drive_pingroup_desc {
-int tegra_pinmux_set_tristate(enum tegra_pingroup pg, enum tegra_tristate tristate);
+        const char *name;
-int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, enum tegra_pullupdown pupd);
+        s16 reg;
+};
+struct tegra_pingroup_desc {
+        const char *name;
+        int funcs[4];
+        int func_safe;
+        int vddio;
+        s16 tri_reg;    /* offset into the TRISTATE_REG_* register bank */
+        s16 mux_reg;    /* offset into the PIN_MUX_CTL_* register bank */
+        s16 pupd_reg;   /* offset into the PULL_UPDOWN_REG_* register bank */
+        s8 tri_bit;     /* offset into the TRISTATE_REG_* register bit */
+        s8 mux_bit;     /* offset into the PIN_MUX_CTL_* register bit */
+        s8 pupd_bit;    /* offset into the PULL_UPDOWN_REG_* register bit */
+};
+extern const struct tegra_pingroup_desc tegra_soc_pingroups[];
+extern const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[];
-void tegra_pinmux_config_pingroup(enum tegra_pingroup pingroup,
+int tegra_pinmux_set_tristate(enum tegra_pingroup pg,
-        enum tegra_mux_func func, enum tegra_pullupdown pupd,
        enum tegra_tristate tristate);
+int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg,
+        enum tegra_pullupdown pupd);
-void tegra_pinmux_config_table(struct tegra_pingroup_config *config, int len);
+void tegra_pinmux_config_table(const struct tegra_pingroup_config *config,
+        int len);
 void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config,
        int len);
+void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config,
+        int len);
+void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config,
+        int len);
+void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config,
+        int len, enum tegra_tristate tristate);
+void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config,
+        int len, enum tegra_pullupdown pupd);
 #endif

diff --git a/arch/arm/mach-tegra/include/mach/pinmux-t2.h b/arch/arm/mach-tegra/include/mach/pinmux-t2.h new file mode 100644 index 000000000000..e5b9d740f973 --- /dev/null +++ b/arch/arm/mach-tegra/include/mach/pinmux-t2.h
@@ -0,0 +1,174 @@
		1	/*
		2	* linux/arch/arm/mach-tegra/include/mach/pinmux-t2.h
		3	*
		4	* Copyright (C) 2010 Google, Inc.
		5	*
		6	* This software is licensed under the terms of the GNU General Public
		7	* License version 2, as published by the Free Software Foundation, and
		8	* may be copied, distributed, and modified under those terms.
		9	*
		10	* This program is distributed in the hope that it will be useful,
		11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
		12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		13	* GNU General Public License for more details.
		14	*
		15	*/
		16
		17	#ifndef __MACH_TEGRA_PINMUX_T2_H
		18	#define __MACH_TEGRA_PINMUX_T2_H
		19
		20	enum tegra_pingroup {
		21	TEGRA_PINGROUP_ATA = 0,
		22	TEGRA_PINGROUP_ATB,
		23	TEGRA_PINGROUP_ATC,
		24	TEGRA_PINGROUP_ATD,
		25	TEGRA_PINGROUP_ATE,
		26	TEGRA_PINGROUP_CDEV1,
		27	TEGRA_PINGROUP_CDEV2,
		28	TEGRA_PINGROUP_CRTP,
		29	TEGRA_PINGROUP_CSUS,
		30	TEGRA_PINGROUP_DAP1,
		31	TEGRA_PINGROUP_DAP2,
		32	TEGRA_PINGROUP_DAP3,
		33	TEGRA_PINGROUP_DAP4,
		34	TEGRA_PINGROUP_DDC,
		35	TEGRA_PINGROUP_DTA,
		36	TEGRA_PINGROUP_DTB,
		37	TEGRA_PINGROUP_DTC,
		38	TEGRA_PINGROUP_DTD,
		39	TEGRA_PINGROUP_DTE,
		40	TEGRA_PINGROUP_DTF,
		41	TEGRA_PINGROUP_GMA,
		42	TEGRA_PINGROUP_GMB,
		43	TEGRA_PINGROUP_GMC,
		44	TEGRA_PINGROUP_GMD,
		45	TEGRA_PINGROUP_GME,
		46	TEGRA_PINGROUP_GPU,
		47	TEGRA_PINGROUP_GPU7,
		48	TEGRA_PINGROUP_GPV,
		49	TEGRA_PINGROUP_HDINT,
		50	TEGRA_PINGROUP_I2CP,
		51	TEGRA_PINGROUP_IRRX,
		52	TEGRA_PINGROUP_IRTX,
		53	TEGRA_PINGROUP_KBCA,
		54	TEGRA_PINGROUP_KBCB,
		55	TEGRA_PINGROUP_KBCC,
		56	TEGRA_PINGROUP_KBCD,
		57	TEGRA_PINGROUP_KBCE,
		58	TEGRA_PINGROUP_KBCF,
		59	TEGRA_PINGROUP_LCSN,
		60	TEGRA_PINGROUP_LD0,
		61	TEGRA_PINGROUP_LD1,
		62	TEGRA_PINGROUP_LD10,
		63	TEGRA_PINGROUP_LD11,
		64	TEGRA_PINGROUP_LD12,
		65	TEGRA_PINGROUP_LD13,
		66	TEGRA_PINGROUP_LD14,
		67	TEGRA_PINGROUP_LD15,
		68	TEGRA_PINGROUP_LD16,
		69	TEGRA_PINGROUP_LD17,
		70	TEGRA_PINGROUP_LD2,
		71	TEGRA_PINGROUP_LD3,
		72	TEGRA_PINGROUP_LD4,
		73	TEGRA_PINGROUP_LD5,
		74	TEGRA_PINGROUP_LD6,
		75	TEGRA_PINGROUP_LD7,
		76	TEGRA_PINGROUP_LD8,
		77	TEGRA_PINGROUP_LD9,
		78	TEGRA_PINGROUP_LDC,
		79	TEGRA_PINGROUP_LDI,
		80	TEGRA_PINGROUP_LHP0,
		81	TEGRA_PINGROUP_LHP1,
		82	TEGRA_PINGROUP_LHP2,
		83	TEGRA_PINGROUP_LHS,
		84	TEGRA_PINGROUP_LM0,
		85	TEGRA_PINGROUP_LM1,
		86	TEGRA_PINGROUP_LPP,
		87	TEGRA_PINGROUP_LPW0,
		88	TEGRA_PINGROUP_LPW1,
		89	TEGRA_PINGROUP_LPW2,
		90	TEGRA_PINGROUP_LSC0,
		91	TEGRA_PINGROUP_LSC1,
		92	TEGRA_PINGROUP_LSCK,
		93	TEGRA_PINGROUP_LSDA,
		94	TEGRA_PINGROUP_LSDI,
		95	TEGRA_PINGROUP_LSPI,
		96	TEGRA_PINGROUP_LVP0,
		97	TEGRA_PINGROUP_LVP1,
		98	TEGRA_PINGROUP_LVS,
		99	TEGRA_PINGROUP_OWC,
		100	TEGRA_PINGROUP_PMC,
		101	TEGRA_PINGROUP_PTA,
		102	TEGRA_PINGROUP_RM,
		103	TEGRA_PINGROUP_SDB,
		104	TEGRA_PINGROUP_SDC,
		105	TEGRA_PINGROUP_SDD,
		106	TEGRA_PINGROUP_SDIO1,
		107	TEGRA_PINGROUP_SLXA,
		108	TEGRA_PINGROUP_SLXC,
		109	TEGRA_PINGROUP_SLXD,
		110	TEGRA_PINGROUP_SLXK,
		111	TEGRA_PINGROUP_SPDI,
		112	TEGRA_PINGROUP_SPDO,
		113	TEGRA_PINGROUP_SPIA,
		114	TEGRA_PINGROUP_SPIB,
		115	TEGRA_PINGROUP_SPIC,
		116	TEGRA_PINGROUP_SPID,
		117	TEGRA_PINGROUP_SPIE,
		118	TEGRA_PINGROUP_SPIF,
		119	TEGRA_PINGROUP_SPIG,
		120	TEGRA_PINGROUP_SPIH,
		121	TEGRA_PINGROUP_UAA,
		122	TEGRA_PINGROUP_UAB,
		123	TEGRA_PINGROUP_UAC,
		124	TEGRA_PINGROUP_UAD,
		125	TEGRA_PINGROUP_UCA,
		126	TEGRA_PINGROUP_UCB,
		127	TEGRA_PINGROUP_UDA,
		128	/* these pin groups only have pullup and pull down control */
		129	TEGRA_PINGROUP_CK32,
		130	TEGRA_PINGROUP_DDRC,
		131	TEGRA_PINGROUP_PMCA,
		132	TEGRA_PINGROUP_PMCB,
		133	TEGRA_PINGROUP_PMCC,
		134	TEGRA_PINGROUP_PMCD,
		135	TEGRA_PINGROUP_PMCE,
		136	TEGRA_PINGROUP_XM2C,
		137	TEGRA_PINGROUP_XM2D,
		138	TEGRA_MAX_PINGROUP,
		139	};
		140
		141	enum tegra_drive_pingroup {
		142	TEGRA_DRIVE_PINGROUP_AO1 = 0,
		143	TEGRA_DRIVE_PINGROUP_AO2,
		144	TEGRA_DRIVE_PINGROUP_AT1,
		145	TEGRA_DRIVE_PINGROUP_AT2,
		146	TEGRA_DRIVE_PINGROUP_CDEV1,
		147	TEGRA_DRIVE_PINGROUP_CDEV2,
		148	TEGRA_DRIVE_PINGROUP_CSUS,
		149	TEGRA_DRIVE_PINGROUP_DAP1,
		150	TEGRA_DRIVE_PINGROUP_DAP2,
		151	TEGRA_DRIVE_PINGROUP_DAP3,
		152	TEGRA_DRIVE_PINGROUP_DAP4,
		153	TEGRA_DRIVE_PINGROUP_DBG,
		154	TEGRA_DRIVE_PINGROUP_LCD1,
		155	TEGRA_DRIVE_PINGROUP_LCD2,
		156	TEGRA_DRIVE_PINGROUP_SDMMC2,
		157	TEGRA_DRIVE_PINGROUP_SDMMC3,
		158	TEGRA_DRIVE_PINGROUP_SPI,
		159	TEGRA_DRIVE_PINGROUP_UAA,
		160	TEGRA_DRIVE_PINGROUP_UAB,
		161	TEGRA_DRIVE_PINGROUP_UART2,
		162	TEGRA_DRIVE_PINGROUP_UART3,
		163	TEGRA_DRIVE_PINGROUP_VI1,
		164	TEGRA_DRIVE_PINGROUP_VI2,
		165	TEGRA_DRIVE_PINGROUP_XM2A,
		166	TEGRA_DRIVE_PINGROUP_XM2C,
		167	TEGRA_DRIVE_PINGROUP_XM2D,
		168	TEGRA_DRIVE_PINGROUP_XM2CLK,
		169	TEGRA_DRIVE_PINGROUP_MEMCOMP,
		170	TEGRA_MAX_DRIVE_PINGROUP,
		171	};
		172
		173	#endif
		174


diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h index 41c8ce5b7c27..defd8775defa 100644 --- a/arch/arm/mach-tegra/include/mach/pinmux.h +++ b/arch/arm/mach-tegra/include/mach/pinmux.h
@@ -17,126 +17,11 @@
17	#ifndef __MACH_TEGRA_PINMUX_H	17	#ifndef __MACH_TEGRA_PINMUX_H
18	#define __MACH_TEGRA_PINMUX_H	18	#define __MACH_TEGRA_PINMUX_H
19		19
20	enum tegra_pingroup {	20	#if defined(CONFIG_ARCH_TEGRA_2x_SOC)
21	TEGRA_PINGROUP_ATA = 0,	21	#include "pinmux-t2.h"
22	TEGRA_PINGROUP_ATB,	22	#else
23	TEGRA_PINGROUP_ATC,	23	#error "Undefined Tegra architecture"
24	TEGRA_PINGROUP_ATD,	24	#endif
25	TEGRA_PINGROUP_ATE,
26	TEGRA_PINGROUP_CDEV1,
27	TEGRA_PINGROUP_CDEV2,
28	TEGRA_PINGROUP_CRTP,
29	TEGRA_PINGROUP_CSUS,
30	TEGRA_PINGROUP_DAP1,
31	TEGRA_PINGROUP_DAP2,
32	TEGRA_PINGROUP_DAP3,
33	TEGRA_PINGROUP_DAP4,
34	TEGRA_PINGROUP_DDC,
35	TEGRA_PINGROUP_DTA,
36	TEGRA_PINGROUP_DTB,
37	TEGRA_PINGROUP_DTC,
38	TEGRA_PINGROUP_DTD,
39	TEGRA_PINGROUP_DTE,
40	TEGRA_PINGROUP_DTF,
41	TEGRA_PINGROUP_GMA,
42	TEGRA_PINGROUP_GMB,
43	TEGRA_PINGROUP_GMC,
44	TEGRA_PINGROUP_GMD,
45	TEGRA_PINGROUP_GME,
46	TEGRA_PINGROUP_GPU,
47	TEGRA_PINGROUP_GPU7,
48	TEGRA_PINGROUP_GPV,
49	TEGRA_PINGROUP_HDINT,
50	TEGRA_PINGROUP_I2CP,
51	TEGRA_PINGROUP_IRRX,
52	TEGRA_PINGROUP_IRTX,
53	TEGRA_PINGROUP_KBCA,
54	TEGRA_PINGROUP_KBCB,
55	TEGRA_PINGROUP_KBCC,
56	TEGRA_PINGROUP_KBCD,
57	TEGRA_PINGROUP_KBCE,
58	TEGRA_PINGROUP_KBCF,
59	TEGRA_PINGROUP_LCSN,
60	TEGRA_PINGROUP_LD0,
61	TEGRA_PINGROUP_LD1,
62	TEGRA_PINGROUP_LD10,
63	TEGRA_PINGROUP_LD11,
64	TEGRA_PINGROUP_LD12,
65	TEGRA_PINGROUP_LD13,
66	TEGRA_PINGROUP_LD14,
67	TEGRA_PINGROUP_LD15,
68	TEGRA_PINGROUP_LD16,
69	TEGRA_PINGROUP_LD17,
70	TEGRA_PINGROUP_LD2,
71	TEGRA_PINGROUP_LD3,
72	TEGRA_PINGROUP_LD4,
73	TEGRA_PINGROUP_LD5,
74	TEGRA_PINGROUP_LD6,
75	TEGRA_PINGROUP_LD7,
76	TEGRA_PINGROUP_LD8,
77	TEGRA_PINGROUP_LD9,
78	TEGRA_PINGROUP_LDC,
79	TEGRA_PINGROUP_LDI,
80	TEGRA_PINGROUP_LHP0,
81	TEGRA_PINGROUP_LHP1,
82	TEGRA_PINGROUP_LHP2,
83	TEGRA_PINGROUP_LHS,
84	TEGRA_PINGROUP_LM0,
85	TEGRA_PINGROUP_LM1,
86	TEGRA_PINGROUP_LPP,
87	TEGRA_PINGROUP_LPW0,
88	TEGRA_PINGROUP_LPW1,
89	TEGRA_PINGROUP_LPW2,
90	TEGRA_PINGROUP_LSC0,
91	TEGRA_PINGROUP_LSC1,
92	TEGRA_PINGROUP_LSCK,
93	TEGRA_PINGROUP_LSDA,
94	TEGRA_PINGROUP_LSDI,
95	TEGRA_PINGROUP_LSPI,
96	TEGRA_PINGROUP_LVP0,
97	TEGRA_PINGROUP_LVP1,
98	TEGRA_PINGROUP_LVS,
99	TEGRA_PINGROUP_OWC,
100	TEGRA_PINGROUP_PMC,
101	TEGRA_PINGROUP_PTA,
102	TEGRA_PINGROUP_RM,
103	TEGRA_PINGROUP_SDB,
104	TEGRA_PINGROUP_SDC,
105	TEGRA_PINGROUP_SDD,
106	TEGRA_PINGROUP_SDIO1,
107	TEGRA_PINGROUP_SLXA,
108	TEGRA_PINGROUP_SLXC,
109	TEGRA_PINGROUP_SLXD,
110	TEGRA_PINGROUP_SLXK,
111	TEGRA_PINGROUP_SPDI,
112	TEGRA_PINGROUP_SPDO,
113	TEGRA_PINGROUP_SPIA,
114	TEGRA_PINGROUP_SPIB,
115	TEGRA_PINGROUP_SPIC,
116	TEGRA_PINGROUP_SPID,
117	TEGRA_PINGROUP_SPIE,
118	TEGRA_PINGROUP_SPIF,
119	TEGRA_PINGROUP_SPIG,
120	TEGRA_PINGROUP_SPIH,
121	TEGRA_PINGROUP_UAA,
122	TEGRA_PINGROUP_UAB,
123	TEGRA_PINGROUP_UAC,
124	TEGRA_PINGROUP_UAD,
125	TEGRA_PINGROUP_UCA,
126	TEGRA_PINGROUP_UCB,
127	TEGRA_PINGROUP_UDA,
128	/* these pin groups only have pullup and pull down control */
129	TEGRA_PINGROUP_CK32,
130	TEGRA_PINGROUP_DDRC,
131	TEGRA_PINGROUP_PMCA,
132	TEGRA_PINGROUP_PMCB,
133	TEGRA_PINGROUP_PMCC,
134	TEGRA_PINGROUP_PMCD,
135	TEGRA_PINGROUP_PMCE,
136	TEGRA_PINGROUP_XM2C,
137	TEGRA_PINGROUP_XM2D,
138	TEGRA_MAX_PINGROUP,
139	};
140		25
141	enum tegra_mux_func {	26	enum tegra_mux_func {
142	TEGRA_MUX_RSVD = 0x8000,	27	TEGRA_MUX_RSVD = 0x8000,
@@ -205,6 +90,7 @@ enum tegra_mux_func {
205	TEGRA_MUX_VI,	90	TEGRA_MUX_VI,
206	TEGRA_MUX_VI_SENSOR_CLK,	91	TEGRA_MUX_VI_SENSOR_CLK,
207	TEGRA_MUX_XIO,	92	TEGRA_MUX_XIO,
		93	TEGRA_MUX_SAFE,
208	TEGRA_MAX_MUX,	94	TEGRA_MAX_MUX,
209	};	95	};
210		96
@@ -219,6 +105,18 @@ enum tegra_tristate {
219	TEGRA_TRI_TRISTATE = 1,	105	TEGRA_TRI_TRISTATE = 1,
220	};	106	};
221		107
		108	enum tegra_vddio {
		109	TEGRA_VDDIO_BB = 0,
		110	TEGRA_VDDIO_LCD,
		111	TEGRA_VDDIO_VI,
		112	TEGRA_VDDIO_UART,
		113	TEGRA_VDDIO_DDR,
		114	TEGRA_VDDIO_NAND,
		115	TEGRA_VDDIO_SYS,
		116	TEGRA_VDDIO_AUDIO,
		117	TEGRA_VDDIO_SD,
		118	};
		119
222	struct tegra_pingroup_config {	120	struct tegra_pingroup_config {
223	enum tegra_pingroup pingroup;	121	enum tegra_pingroup pingroup;
224	enum tegra_mux_func func;	122	enum tegra_mux_func func;
@@ -270,38 +168,6 @@ enum tegra_pull_strength {
270	TEGRA_MAX_PULL,	168	TEGRA_MAX_PULL,
271	};	169	};
272		170
273	enum tegra_drive_pingroup {
274	TEGRA_DRIVE_PINGROUP_AO1 = 0,
275	TEGRA_DRIVE_PINGROUP_AO2,
276	TEGRA_DRIVE_PINGROUP_AT1,
277	TEGRA_DRIVE_PINGROUP_AT2,
278	TEGRA_DRIVE_PINGROUP_CDEV1,
279	TEGRA_DRIVE_PINGROUP_CDEV2,
280	TEGRA_DRIVE_PINGROUP_CSUS,
281	TEGRA_DRIVE_PINGROUP_DAP1,
282	TEGRA_DRIVE_PINGROUP_DAP2,
283	TEGRA_DRIVE_PINGROUP_DAP3,
284	TEGRA_DRIVE_PINGROUP_DAP4,
285	TEGRA_DRIVE_PINGROUP_DBG,
286	TEGRA_DRIVE_PINGROUP_LCD1,
287	TEGRA_DRIVE_PINGROUP_LCD2,
288	TEGRA_DRIVE_PINGROUP_SDMMC2,
289	TEGRA_DRIVE_PINGROUP_SDMMC3,
290	TEGRA_DRIVE_PINGROUP_SPI,
291	TEGRA_DRIVE_PINGROUP_UAA,
292	TEGRA_DRIVE_PINGROUP_UAB,
293	TEGRA_DRIVE_PINGROUP_UART2,
294	TEGRA_DRIVE_PINGROUP_UART3,
295	TEGRA_DRIVE_PINGROUP_VI1,
296	TEGRA_DRIVE_PINGROUP_VI2,
297	TEGRA_DRIVE_PINGROUP_XM2A,
298	TEGRA_DRIVE_PINGROUP_XM2C,
299	TEGRA_DRIVE_PINGROUP_XM2D,
300	TEGRA_DRIVE_PINGROUP_XM2CLK,
301	TEGRA_DRIVE_PINGROUP_MEMCOMP,
302	TEGRA_MAX_DRIVE_PINGROUP,
303	};
304
305	enum tegra_drive {	171	enum tegra_drive {
306	TEGRA_DRIVE_DIV_8 = 0,	172	TEGRA_DRIVE_DIV_8 = 0,
307	TEGRA_DRIVE_DIV_4,	173	TEGRA_DRIVE_DIV_4,
@@ -331,18 +197,44 @@ struct tegra_drive_pingroup_config {
331	enum tegra_slew slew_falling;	197	enum tegra_slew slew_falling;
332	};	198	};
333		199
334	int tegra_pinmux_set_func(enum tegra_pingroup pg, enum tegra_mux_func func);	200	struct tegra_drive_pingroup_desc {
335	int tegra_pinmux_set_tristate(enum tegra_pingroup pg, enum tegra_tristate tristate);	201	const char *name;
336	int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, enum tegra_pullupdown pupd);	202	s16 reg;
		203	};
		204
		205	struct tegra_pingroup_desc {
		206	const char *name;
		207	int funcs[4];
		208	int func_safe;
		209	int vddio;
		210	s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */
		211	s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */
		212	s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */
		213	s8 tri_bit; /* offset into the TRISTATE_REG_* register bit */
		214	s8 mux_bit; /* offset into the PIN_MUX_CTL_* register bit */
		215	s8 pupd_bit; /* offset into the PULL_UPDOWN_REG_* register bit */
		216	};
		217
		218	extern const struct tegra_pingroup_desc tegra_soc_pingroups[];
		219	extern const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[];
337		220
338	void tegra_pinmux_config_pingroup(enum tegra_pingroup pingroup,	221	int tegra_pinmux_set_tristate(enum tegra_pingroup pg,
339	enum tegra_mux_func func, enum tegra_pullupdown pupd,
340	enum tegra_tristate tristate);	222	enum tegra_tristate tristate);
		223	int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg,
		224	enum tegra_pullupdown pupd);
341		225
342	void tegra_pinmux_config_table(struct tegra_pingroup_config *config, int len);	226	void tegra_pinmux_config_table(const struct tegra_pingroup_config *config,
		227	int len);
343		228
344	void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config,	229	void tegra_drive_pinmux_config_table(struct tegra_drive_pingroup_config *config,
345	int len);	230	int len);
346		231	void tegra_pinmux_set_safe_pinmux_table(const struct tegra_pingroup_config *config,
		232	int len);
		233	void tegra_pinmux_config_pinmux_table(const struct tegra_pingroup_config *config,
		234	int len);
		235	void tegra_pinmux_config_tristate_table(const struct tegra_pingroup_config *config,
		236	int len, enum tegra_tristate tristate);
		237	void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *config,
		238	int len, enum tegra_pullupdown pupd);
347	#endif	239	#endif
348		240