diff options
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/dma.h')
-rw-r--r-- | arch/arm/mach-tegra/include/mach/dma.h | 97 |
1 files changed, 0 insertions, 97 deletions
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h index 9077092812c0..3081cc6dda3b 100644 --- a/arch/arm/mach-tegra/include/mach/dma.h +++ b/arch/arm/mach-tegra/include/mach/dma.h | |||
@@ -51,101 +51,4 @@ | |||
51 | #define TEGRA_DMA_REQ_SEL_OWR 25 | 51 | #define TEGRA_DMA_REQ_SEL_OWR 25 |
52 | #define TEGRA_DMA_REQ_SEL_INVALID 31 | 52 | #define TEGRA_DMA_REQ_SEL_INVALID 31 |
53 | 53 | ||
54 | struct tegra_dma_req; | ||
55 | struct tegra_dma_channel; | ||
56 | |||
57 | enum tegra_dma_mode { | ||
58 | TEGRA_DMA_SHARED = 1, | ||
59 | TEGRA_DMA_MODE_CONTINOUS = 2, | ||
60 | TEGRA_DMA_MODE_ONESHOT = 4, | ||
61 | }; | ||
62 | |||
63 | enum tegra_dma_req_error { | ||
64 | TEGRA_DMA_REQ_SUCCESS = 0, | ||
65 | TEGRA_DMA_REQ_ERROR_ABORTED, | ||
66 | TEGRA_DMA_REQ_INFLIGHT, | ||
67 | }; | ||
68 | |||
69 | enum tegra_dma_req_buff_status { | ||
70 | TEGRA_DMA_REQ_BUF_STATUS_EMPTY = 0, | ||
71 | TEGRA_DMA_REQ_BUF_STATUS_HALF_FULL, | ||
72 | TEGRA_DMA_REQ_BUF_STATUS_FULL, | ||
73 | }; | ||
74 | |||
75 | struct tegra_dma_req { | ||
76 | struct list_head node; | ||
77 | unsigned int modid; | ||
78 | int instance; | ||
79 | |||
80 | /* Called when the req is complete and from the DMA ISR context. | ||
81 | * When this is called the req structure is no longer queued by | ||
82 | * the DMA channel. | ||
83 | * | ||
84 | * State of the DMA depends on the number of req it has. If there are | ||
85 | * no DMA requests queued up, then it will STOP the DMA. It there are | ||
86 | * more requests in the DMA, then it will queue the next request. | ||
87 | */ | ||
88 | void (*complete)(struct tegra_dma_req *req); | ||
89 | |||
90 | /* This is a called from the DMA ISR context when the DMA is still in | ||
91 | * progress and is actively filling same buffer. | ||
92 | * | ||
93 | * In case of continuous mode receive, this threshold is 1/2 the buffer | ||
94 | * size. In other cases, this will not even be called as there is no | ||
95 | * hardware support for it. | ||
96 | * | ||
97 | * In the case of continuous mode receive, if there is next req already | ||
98 | * queued, DMA programs the HW to use that req when this req is | ||
99 | * completed. If there is no "next req" queued, then DMA ISR doesn't do | ||
100 | * anything before calling this callback. | ||
101 | * | ||
102 | * This is mainly used by the cases, where the clients has queued | ||
103 | * only one req and want to get some sort of DMA threshold | ||
104 | * callback to program the next buffer. | ||
105 | * | ||
106 | */ | ||
107 | void (*threshold)(struct tegra_dma_req *req); | ||
108 | |||
109 | /* 1 to copy to memory. | ||
110 | * 0 to copy from the memory to device FIFO */ | ||
111 | int to_memory; | ||
112 | |||
113 | void *virt_addr; | ||
114 | |||
115 | unsigned long source_addr; | ||
116 | unsigned long dest_addr; | ||
117 | unsigned long dest_wrap; | ||
118 | unsigned long source_wrap; | ||
119 | unsigned long source_bus_width; | ||
120 | unsigned long dest_bus_width; | ||
121 | unsigned long req_sel; | ||
122 | unsigned int size; | ||
123 | |||
124 | /* Updated by the DMA driver on the conpletion of the request. */ | ||
125 | int bytes_transferred; | ||
126 | int status; | ||
127 | |||
128 | /* DMA completion tracking information */ | ||
129 | int buffer_status; | ||
130 | |||
131 | /* Client specific data */ | ||
132 | void *dev; | ||
133 | }; | ||
134 | |||
135 | int tegra_dma_enqueue_req(struct tegra_dma_channel *ch, | ||
136 | struct tegra_dma_req *req); | ||
137 | int tegra_dma_dequeue_req(struct tegra_dma_channel *ch, | ||
138 | struct tegra_dma_req *req); | ||
139 | void tegra_dma_dequeue(struct tegra_dma_channel *ch); | ||
140 | void tegra_dma_flush(struct tegra_dma_channel *ch); | ||
141 | |||
142 | bool tegra_dma_is_req_inflight(struct tegra_dma_channel *ch, | ||
143 | struct tegra_dma_req *req); | ||
144 | bool tegra_dma_is_empty(struct tegra_dma_channel *ch); | ||
145 | |||
146 | struct tegra_dma_channel *tegra_dma_allocate_channel(int mode); | ||
147 | void tegra_dma_free_channel(struct tegra_dma_channel *ch); | ||
148 | |||
149 | int __init tegra_dma_init(void); | ||
150 | |||
151 | #endif | 54 | #endif |