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-rw-r--r--arch/arm/mach-tegra/include/mach/dma.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h
index 39011bd9a925..d0132e8031a1 100644
--- a/arch/arm/mach-tegra/include/mach/dma.h
+++ b/arch/arm/mach-tegra/include/mach/dma.h
@@ -92,11 +92,11 @@ struct tegra_dma_req {
92 /* This is a called from the DMA ISR context when the DMA is still in 92 /* This is a called from the DMA ISR context when the DMA is still in
93 * progress and is actively filling same buffer. 93 * progress and is actively filling same buffer.
94 * 94 *
95 * In case of continous mode receive, this threshold is 1/2 the buffer 95 * In case of continuous mode receive, this threshold is 1/2 the buffer
96 * size. In other cases, this will not even be called as there is no 96 * size. In other cases, this will not even be called as there is no
97 * hardware support for it. 97 * hardware support for it.
98 * 98 *
99 * In the case of continous mode receive, if there is next req already 99 * In the case of continuous mode receive, if there is next req already
100 * queued, DMA programs the HW to use that req when this req is 100 * queued, DMA programs the HW to use that req when this req is
101 * completed. If there is no "next req" queued, then DMA ISR doesn't do 101 * completed. If there is no "next req" queued, then DMA ISR doesn't do
102 * anything before calling this callback. 102 * anything before calling this callback.