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-rw-r--r--arch/arm/mach-tegra/clock.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c
index 165aa9c748f6..e028320ab423 100644
--- a/arch/arm/mach-tegra/clock.c
+++ b/arch/arm/mach-tegra/clock.c
@@ -86,6 +86,7 @@ static unsigned long clk_predict_rate_from_parent(struct clk *c, struct clk *p)
86 86
87 if (c->mul != 0 && c->div != 0) { 87 if (c->mul != 0 && c->div != 0) {
88 rate *= c->mul; 88 rate *= c->mul;
89 rate += c->div - 1; /* round up */
89 do_div(rate, c->div); 90 do_div(rate, c->div);
90 } 91 }
91 92
@@ -240,12 +241,23 @@ EXPORT_SYMBOL(clk_get_parent);
240 241
241int clk_set_rate_locked(struct clk *c, unsigned long rate) 242int clk_set_rate_locked(struct clk *c, unsigned long rate)
242{ 243{
244 long new_rate;
245
243 if (!c->ops || !c->ops->set_rate) 246 if (!c->ops || !c->ops->set_rate)
244 return -ENOSYS; 247 return -ENOSYS;
245 248
246 if (rate > c->max_rate) 249 if (rate > c->max_rate)
247 rate = c->max_rate; 250 rate = c->max_rate;
248 251
252 if (c->ops && c->ops->round_rate) {
253 new_rate = c->ops->round_rate(c, rate);
254
255 if (new_rate < 0)
256 return new_rate;
257
258 rate = new_rate;
259 }
260
249 return c->ops->set_rate(c, rate); 261 return c->ops->set_rate(c, rate);
250} 262}
251 263