diff options
Diffstat (limited to 'arch/arm/mach-tegra/board-dt-tegra30.c')
-rw-r--r-- | arch/arm/mach-tegra/board-dt-tegra30.c | 28 |
1 files changed, 26 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-dt-tegra30.c b/arch/arm/mach-tegra/board-dt-tegra30.c index 5e92a81f9a2e..6497d1236b08 100644 --- a/arch/arm/mach-tegra/board-dt-tegra30.c +++ b/arch/arm/mach-tegra/board-dt-tegra30.c | |||
@@ -33,11 +33,10 @@ | |||
33 | #include <asm/mach/arch.h> | 33 | #include <asm/mach/arch.h> |
34 | #include <asm/hardware/gic.h> | 34 | #include <asm/hardware/gic.h> |
35 | 35 | ||
36 | #include <mach/iomap.h> | ||
37 | |||
38 | #include "board.h" | 36 | #include "board.h" |
39 | #include "clock.h" | 37 | #include "clock.h" |
40 | #include "common.h" | 38 | #include "common.h" |
39 | #include "iomap.h" | ||
41 | 40 | ||
42 | struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { | 41 | struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { |
43 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL), | 42 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", 0x78000000, "sdhci-tegra.0", NULL), |
@@ -52,6 +51,18 @@ struct of_dev_auxdata tegra30_auxdata_lookup[] __initdata = { | |||
52 | OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), | 51 | OF_DEV_AUXDATA("nvidia,tegra30-ahub", 0x70080000, "tegra30-ahub", NULL), |
53 | OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL), | 52 | OF_DEV_AUXDATA("nvidia,tegra30-apbdma", 0x6000a000, "tegra-apbdma", NULL), |
54 | OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), | 53 | OF_DEV_AUXDATA("nvidia,tegra30-pwm", TEGRA_PWFM_BASE, "tegra-pwm", NULL), |
54 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D400, "spi_tegra.0", NULL), | ||
55 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D600, "spi_tegra.1", NULL), | ||
56 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000D800, "spi_tegra.2", NULL), | ||
57 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DA00, "spi_tegra.3", NULL), | ||
58 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DC00, "spi_tegra.4", NULL), | ||
59 | OF_DEV_AUXDATA("nvidia,tegra30-slink", 0x7000DE00, "spi_tegra.5", NULL), | ||
60 | OF_DEV_AUXDATA("nvidia,tegra30-host1x", 0x50000000, "host1x", NULL), | ||
61 | OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54200000, "tegradc.0", NULL), | ||
62 | OF_DEV_AUXDATA("nvidia,tegra30-dc", 0x54240000, "tegradc.1", NULL), | ||
63 | OF_DEV_AUXDATA("nvidia,tegra30-hdmi", 0x54280000, "hdmi", NULL), | ||
64 | OF_DEV_AUXDATA("nvidia,tegra30-dsi", 0x54300000, "dsi", NULL), | ||
65 | OF_DEV_AUXDATA("nvidia,tegra30-tvo", 0x542c0000, "tvo", NULL), | ||
55 | {} | 66 | {} |
56 | }; | 67 | }; |
57 | 68 | ||
@@ -62,11 +73,24 @@ static __initdata struct tegra_clk_init_table tegra_dt_clk_init_table[] = { | |||
62 | { "pll_a_out0", "pll_a", 11289600, true }, | 73 | { "pll_a_out0", "pll_a", 11289600, true }, |
63 | { "extern1", "pll_a_out0", 0, true }, | 74 | { "extern1", "pll_a_out0", 0, true }, |
64 | { "clk_out_1", "extern1", 0, true }, | 75 | { "clk_out_1", "extern1", 0, true }, |
76 | { "blink", "clk_32k", 32768, true }, | ||
65 | { "i2s0", "pll_a_out0", 11289600, false}, | 77 | { "i2s0", "pll_a_out0", 11289600, false}, |
66 | { "i2s1", "pll_a_out0", 11289600, false}, | 78 | { "i2s1", "pll_a_out0", 11289600, false}, |
67 | { "i2s2", "pll_a_out0", 11289600, false}, | 79 | { "i2s2", "pll_a_out0", 11289600, false}, |
68 | { "i2s3", "pll_a_out0", 11289600, false}, | 80 | { "i2s3", "pll_a_out0", 11289600, false}, |
69 | { "i2s4", "pll_a_out0", 11289600, false}, | 81 | { "i2s4", "pll_a_out0", 11289600, false}, |
82 | { "sdmmc1", "pll_p", 48000000, false}, | ||
83 | { "sdmmc3", "pll_p", 48000000, false}, | ||
84 | { "sdmmc4", "pll_p", 48000000, false}, | ||
85 | { "sbc1", "pll_p", 100000000, false}, | ||
86 | { "sbc2", "pll_p", 100000000, false}, | ||
87 | { "sbc3", "pll_p", 100000000, false}, | ||
88 | { "sbc4", "pll_p", 100000000, false}, | ||
89 | { "sbc5", "pll_p", 100000000, false}, | ||
90 | { "sbc6", "pll_p", 100000000, false}, | ||
91 | { "host1x", "pll_c", 150000000, false}, | ||
92 | { "disp1", "pll_p", 600000000, false}, | ||
93 | { "disp2", "pll_p", 600000000, false}, | ||
70 | { NULL, NULL, 0, 0}, | 94 | { NULL, NULL, 0, 0}, |
71 | }; | 95 | }; |
72 | 96 | ||