diff options
Diffstat (limited to 'arch/arm/mach-stmp37xx/include/mach/regs-ecc8.h')
-rw-r--r-- | arch/arm/mach-stmp37xx/include/mach/regs-ecc8.h | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/arch/arm/mach-stmp37xx/include/mach/regs-ecc8.h b/arch/arm/mach-stmp37xx/include/mach/regs-ecc8.h deleted file mode 100644 index 3b6d990a3af5..000000000000 --- a/arch/arm/mach-stmp37xx/include/mach/regs-ecc8.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* | ||
2 | * stmp37xx: ECC8 register definitions | ||
3 | * | ||
4 | * Copyright (c) 2008 Freescale Semiconductor | ||
5 | * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #define REGS_ECC8_BASE (STMP3XXX_REGS_BASE + 0x8000) | ||
22 | |||
23 | #define HW_ECC8_CTRL 0x0 | ||
24 | #define BM_ECC8_CTRL_COMPLETE_IRQ 0x00000001 | ||
25 | #define BP_ECC8_CTRL_COMPLETE_IRQ 0 | ||
26 | #define BM_ECC8_CTRL_COMPLETE_IRQ_EN 0x00000100 | ||
27 | #define BM_ECC8_CTRL_AHBM_SFTRST 0x20000000 | ||
28 | |||
29 | #define HW_ECC8_STATUS0 0x10 | ||
30 | #define BM_ECC8_STATUS0_UNCORRECTABLE 0x00000004 | ||
31 | #define BM_ECC8_STATUS0_CORRECTED 0x00000008 | ||
32 | #define BM_ECC8_STATUS0_STATUS_AUX 0x00000F00 | ||
33 | #define BP_ECC8_STATUS0_STATUS_AUX 8 | ||
34 | #define BM_ECC8_STATUS0_COMPLETED_CE 0x000F0000 | ||
35 | #define BP_ECC8_STATUS0_COMPLETED_CE 16 | ||
36 | |||
37 | #define HW_ECC8_STATUS1 0x20 | ||