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Diffstat (limited to 'arch/arm/mach-stmp37xx/include/mach/regs-apbx.h')
-rw-r--r--arch/arm/mach-stmp37xx/include/mach/regs-apbx.h113
1 files changed, 113 insertions, 0 deletions
diff --git a/arch/arm/mach-stmp37xx/include/mach/regs-apbx.h b/arch/arm/mach-stmp37xx/include/mach/regs-apbx.h
new file mode 100644
index 000000000000..6d080cd5b702
--- /dev/null
+++ b/arch/arm/mach-stmp37xx/include/mach/regs-apbx.h
@@ -0,0 +1,113 @@
1/*
2 * stmp37xx: APBX register definitions
3 *
4 * Copyright (c) 2008 Freescale Semiconductor
5 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#ifndef _MACH_REGS_APBX
22#define _MACH_REGS_APBX
23
24#define REGS_APBX_BASE (STMP3XXX_REGS_BASE + 0x24000)
25
26#define HW_APBX_CTRL0 0x0
27#define BM_APBX_CTRL0_RESET_CHANNEL 0x00FF0000
28#define BP_APBX_CTRL0_RESET_CHANNEL 16
29#define BM_APBX_CTRL0_CLKGATE 0x40000000
30#define BM_APBX_CTRL0_SFTRST 0x80000000
31
32#define HW_APBX_CTRL1 0x10
33
34#define HW_APBX_DEVSEL 0x20
35
36#define HW_APBX_CH0_NXTCMDAR (0x50 + 0 * 0x70)
37#define HW_APBX_CH1_NXTCMDAR (0x50 + 1 * 0x70)
38#define HW_APBX_CH2_NXTCMDAR (0x50 + 2 * 0x70)
39#define HW_APBX_CH3_NXTCMDAR (0x50 + 3 * 0x70)
40#define HW_APBX_CH4_NXTCMDAR (0x50 + 4 * 0x70)
41#define HW_APBX_CH5_NXTCMDAR (0x50 + 5 * 0x70)
42#define HW_APBX_CH6_NXTCMDAR (0x50 + 6 * 0x70)
43#define HW_APBX_CH7_NXTCMDAR (0x50 + 7 * 0x70)
44#define HW_APBX_CH8_NXTCMDAR (0x50 + 8 * 0x70)
45#define HW_APBX_CH9_NXTCMDAR (0x50 + 9 * 0x70)
46#define HW_APBX_CH10_NXTCMDAR (0x50 + 10 * 0x70)
47#define HW_APBX_CH11_NXTCMDAR (0x50 + 11 * 0x70)
48#define HW_APBX_CH12_NXTCMDAR (0x50 + 12 * 0x70)
49#define HW_APBX_CH13_NXTCMDAR (0x50 + 13 * 0x70)
50#define HW_APBX_CH14_NXTCMDAR (0x50 + 14 * 0x70)
51#define HW_APBX_CH15_NXTCMDAR (0x50 + 15 * 0x70)
52
53#define HW_APBX_CHn_NXTCMDAR 0x50
54#define BM_APBX_CHn_CMD_MODE 0x00000003
55#define BP_APBX_CHn_CMD_MODE 0x00000001
56#define BV_APBX_CHn_CMD_MODE_NOOP 0
57#define BV_APBX_CHn_CMD_MODE_WRITE 1
58#define BV_APBX_CHn_CMD_MODE_READ 2
59#define BV_APBX_CHn_CMD_MODE_SENSE 3
60#define BM_APBX_CHn_CMD_COMMAND 0x00000003
61#define BP_APBX_CHn_CMD_COMMAND 0
62#define BM_APBX_CHn_CMD_CHAIN 0x00000004
63#define BM_APBX_CHn_CMD_IRQONCMPLT 0x00000008
64#define BM_APBX_CHn_CMD_SEMAPHORE 0x00000040
65#define BM_APBX_CHn_CMD_WAIT4ENDCMD 0x00000080
66#define BM_APBX_CHn_CMD_CMDWORDS 0x0000F000
67#define BP_APBX_CHn_CMD_CMDWORDS 12
68#define BM_APBX_CHn_CMD_XFER_COUNT 0xFFFF0000
69#define BP_APBX_CHn_CMD_XFER_COUNT 16
70
71#define HW_APBX_CH0_BAR (0x70 + 0 * 0x70)
72#define HW_APBX_CH1_BAR (0x70 + 1 * 0x70)
73#define HW_APBX_CH2_BAR (0x70 + 2 * 0x70)
74#define HW_APBX_CH3_BAR (0x70 + 3 * 0x70)
75#define HW_APBX_CH4_BAR (0x70 + 4 * 0x70)
76#define HW_APBX_CH5_BAR (0x70 + 5 * 0x70)
77#define HW_APBX_CH6_BAR (0x70 + 6 * 0x70)
78#define HW_APBX_CH7_BAR (0x70 + 7 * 0x70)
79#define HW_APBX_CH8_BAR (0x70 + 8 * 0x70)
80#define HW_APBX_CH9_BAR (0x70 + 9 * 0x70)
81#define HW_APBX_CH10_BAR (0x70 + 10 * 0x70)
82#define HW_APBX_CH11_BAR (0x70 + 11 * 0x70)
83#define HW_APBX_CH12_BAR (0x70 + 12 * 0x70)
84#define HW_APBX_CH13_BAR (0x70 + 13 * 0x70)
85#define HW_APBX_CH14_BAR (0x70 + 14 * 0x70)
86#define HW_APBX_CH15_BAR (0x70 + 15 * 0x70)
87
88#define HW_APBX_CHn_BAR 0x70
89
90#define HW_APBX_CH0_SEMA (0x80 + 0 * 0x70)
91#define HW_APBX_CH1_SEMA (0x80 + 1 * 0x70)
92#define HW_APBX_CH2_SEMA (0x80 + 2 * 0x70)
93#define HW_APBX_CH3_SEMA (0x80 + 3 * 0x70)
94#define HW_APBX_CH4_SEMA (0x80 + 4 * 0x70)
95#define HW_APBX_CH5_SEMA (0x80 + 5 * 0x70)
96#define HW_APBX_CH6_SEMA (0x80 + 6 * 0x70)
97#define HW_APBX_CH7_SEMA (0x80 + 7 * 0x70)
98#define HW_APBX_CH8_SEMA (0x80 + 8 * 0x70)
99#define HW_APBX_CH9_SEMA (0x80 + 9 * 0x70)
100#define HW_APBX_CH10_SEMA (0x80 + 10 * 0x70)
101#define HW_APBX_CH11_SEMA (0x80 + 11 * 0x70)
102#define HW_APBX_CH12_SEMA (0x80 + 12 * 0x70)
103#define HW_APBX_CH13_SEMA (0x80 + 13 * 0x70)
104#define HW_APBX_CH14_SEMA (0x80 + 14 * 0x70)
105#define HW_APBX_CH15_SEMA (0x80 + 15 * 0x70)
106
107#define HW_APBX_CHn_SEMA 0x80
108#define BM_APBX_CHn_SEMA_INCREMENT_SEMA 0x000000FF
109#define BP_APBX_CHn_SEMA_INCREMENT_SEMA 0
110#define BM_APBX_CHn_SEMA_PHORE 0x00FF0000
111#define BP_APBX_CHn_SEMA_PHORE 16
112
113#endif