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-rw-r--r--arch/arm/mach-stmp378x/include/mach/regs-ocotp.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h b/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h
new file mode 100644
index 000000000000..f0af64d9937e
--- /dev/null
+++ b/arch/arm/mach-stmp378x/include/mach/regs-ocotp.h
@@ -0,0 +1,40 @@
1/*
2 * stmp378x: OCOTP register definitions
3 *
4 * Copyright (c) 2008 Freescale Semiconductor
5 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21#define REGS_OCOTP_BASE (STMP3XXX_REGS_BASE + 0x2C000)
22#define REGS_OCOTP_PHYS 0x8002C000
23#define REGS_OCOTP_SIZE 0x2000
24
25#define HW_OCOTP_CTRL 0x0
26#define BM_OCOTP_CTRL_BUSY 0x00000100
27#define BM_OCOTP_CTRL_ERROR 0x00000200
28#define BM_OCOTP_CTRL_RD_BANK_OPEN 0x00001000
29#define BM_OCOTP_CTRL_RELOAD_SHADOWS 0x00002000
30#define BM_OCOTP_CTRL_WR_UNLOCK 0xFFFF0000
31#define BP_OCOTP_CTRL_WR_UNLOCK 16
32
33#define HW_OCOTP_DATA 0x10
34
35#define HW_OCOTP_CUST0 (0x20 + 0 * 0x10)
36#define HW_OCOTP_CUST1 (0x20 + 1 * 0x10)
37#define HW_OCOTP_CUST2 (0x20 + 2 * 0x10)
38#define HW_OCOTP_CUST3 (0x20 + 3 * 0x10)
39
40#define HW_OCOTP_CUSTn 0x20