diff options
Diffstat (limited to 'arch/arm/mach-stmp378x/include/mach/regs-icoll.h')
-rw-r--r-- | arch/arm/mach-stmp378x/include/mach/regs-icoll.h | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/mach-stmp378x/include/mach/regs-icoll.h b/arch/arm/mach-stmp378x/include/mach/regs-icoll.h new file mode 100644 index 000000000000..f996e80f40e7 --- /dev/null +++ b/arch/arm/mach-stmp378x/include/mach/regs-icoll.h | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * stmp378x: ICOLL register definitions | ||
3 | * | ||
4 | * Copyright (c) 2008 Freescale Semiconductor | ||
5 | * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef _MACH_REGS_ICOLL | ||
22 | #define _MACH_REGS_ICOLL | ||
23 | |||
24 | #define REGS_ICOLL_BASE (STMP3XXX_REGS_BASE + 0x0) | ||
25 | #define REGS_ICOLL_PHYS 0x80000000 | ||
26 | #define REGS_ICOLL_SIZE 0x2000 | ||
27 | |||
28 | #define HW_ICOLL_VECTOR 0x0 | ||
29 | |||
30 | #define HW_ICOLL_LEVELACK 0x10 | ||
31 | #define BM_ICOLL_LEVELACK_IRQLEVELACK 0x0000000F | ||
32 | #define BP_ICOLL_LEVELACK_IRQLEVELACK 0 | ||
33 | |||
34 | #define HW_ICOLL_CTRL 0x20 | ||
35 | #define BM_ICOLL_CTRL_CLKGATE 0x40000000 | ||
36 | #define BM_ICOLL_CTRL_SFTRST 0x80000000 | ||
37 | |||
38 | #define HW_ICOLL_STAT 0x70 | ||
39 | |||
40 | #define HW_ICOLL_INTERRUPTn 0x120 | ||
41 | |||
42 | #define HW_ICOLL_INTERRUPTn 0x120 | ||
43 | #define BM_ICOLL_INTERRUPTn_ENABLE 0x00000004 | ||
44 | |||
45 | #endif | ||