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-rw-r--r--arch/arm/mach-spear/generic.h5
-rw-r--r--arch/arm/mach-spear/include/mach/spear.h2
-rw-r--r--arch/arm/mach-spear/spear1310.c30
-rw-r--r--arch/arm/mach-spear/spear1340.c32
-rw-r--r--arch/arm/mach-spear/spear13xx-dma.h128
-rw-r--r--arch/arm/mach-spear/spear13xx.c58
6 files changed, 2 insertions, 253 deletions
diff --git a/arch/arm/mach-spear/generic.h b/arch/arm/mach-spear/generic.h
index 8ba7e75b648d..a9fd45362fee 100644
--- a/arch/arm/mach-spear/generic.h
+++ b/arch/arm/mach-spear/generic.h
@@ -22,11 +22,6 @@ extern void spear13xx_timer_init(void);
22extern void spear3xx_timer_init(void); 22extern void spear3xx_timer_init(void);
23extern struct pl022_ssp_controller pl022_plat_data; 23extern struct pl022_ssp_controller pl022_plat_data;
24extern struct pl08x_platform_data pl080_plat_data; 24extern struct pl08x_platform_data pl080_plat_data;
25extern struct dw_dma_platform_data dmac_plat_data;
26extern struct dw_dma_slave cf_dma_priv;
27extern struct dw_dma_slave nand_read_dma_priv;
28extern struct dw_dma_slave nand_write_dma_priv;
29bool dw_dma_filter(struct dma_chan *chan, void *slave);
30 25
31void __init spear_setup_of_timer(void); 26void __init spear_setup_of_timer(void);
32void __init spear3xx_clk_init(void __iomem *misc_base, 27void __init spear3xx_clk_init(void __iomem *misc_base,
diff --git a/arch/arm/mach-spear/include/mach/spear.h b/arch/arm/mach-spear/include/mach/spear.h
index 374ddc393df1..cf3a5369eeca 100644
--- a/arch/arm/mach-spear/include/mach/spear.h
+++ b/arch/arm/mach-spear/include/mach/spear.h
@@ -82,8 +82,6 @@
82#define VA_L2CC_BASE IOMEM(UL(0xFB000000)) 82#define VA_L2CC_BASE IOMEM(UL(0xFB000000))
83 83
84/* others */ 84/* others */
85#define DMAC0_BASE UL(0xEA800000)
86#define DMAC1_BASE UL(0xEB000000)
87#define MCIF_CF_BASE UL(0xB2800000) 85#define MCIF_CF_BASE UL(0xB2800000)
88 86
89/* Debug uart for linux, will be used for debug and uncompress messages */ 87/* Debug uart for linux, will be used for debug and uncompress messages */
diff --git a/arch/arm/mach-spear/spear1310.c b/arch/arm/mach-spear/spear1310.c
index ed3b5c287a7b..9eaac2c881ea 100644
--- a/arch/arm/mach-spear/spear1310.c
+++ b/arch/arm/mach-spear/spear1310.c
@@ -23,40 +23,12 @@
23#include <mach/spear.h> 23#include <mach/spear.h>
24 24
25/* Base addresses */ 25/* Base addresses */
26#define SPEAR1310_SSP1_BASE UL(0x5D400000)
27#define SPEAR1310_SATA0_BASE UL(0xB1000000)
28#define SPEAR1310_SATA1_BASE UL(0xB1800000)
29#define SPEAR1310_SATA2_BASE UL(0xB4000000)
30
31#define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000) 26#define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000)
32#define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000) 27#define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000)
33 28
34static struct arasan_cf_pdata cf_pdata = {
35 .cf_if_clk = CF_IF_CLK_166M,
36 .quirk = CF_BROKEN_UDMA,
37 .dma_priv = &cf_dma_priv,
38};
39
40/* ssp device registration */
41static struct pl022_ssp_controller ssp1_plat_data = {
42 .enable_dma = 0,
43};
44
45/* Add SPEAr1310 auxdata to pass platform data */
46static struct of_dev_auxdata spear1310_auxdata_lookup[] __initdata = {
47 OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_pdata),
48 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &dmac_plat_data),
49 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &dmac_plat_data),
50 OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data),
51
52 OF_DEV_AUXDATA("arm,pl022", SPEAR1310_SSP1_BASE, NULL, &ssp1_plat_data),
53 {}
54};
55
56static void __init spear1310_dt_init(void) 29static void __init spear1310_dt_init(void)
57{ 30{
58 of_platform_populate(NULL, of_default_bus_match_table, 31 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
59 spear1310_auxdata_lookup, NULL);
60} 32}
61 33
62static const char * const spear1310_dt_board_compat[] = { 34static const char * const spear1310_dt_board_compat[] = {
diff --git a/arch/arm/mach-spear/spear1340.c b/arch/arm/mach-spear/spear1340.c
index 75e38644bbfb..a04a7fe76f71 100644
--- a/arch/arm/mach-spear/spear1340.c
+++ b/arch/arm/mach-spear/spear1340.c
@@ -16,18 +16,16 @@
16#include <linux/ahci_platform.h> 16#include <linux/ahci_platform.h>
17#include <linux/amba/serial.h> 17#include <linux/amba/serial.h>
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/dw_dmac.h>
20#include <linux/of_platform.h> 19#include <linux/of_platform.h>
21#include <linux/irqchip.h> 20#include <linux/irqchip.h>
22#include <asm/mach/arch.h> 21#include <asm/mach/arch.h>
23#include "generic.h" 22#include "generic.h"
24#include <mach/spear.h> 23#include <mach/spear.h>
25 24
26#include "spear13xx-dma.h" 25/* FIXME: Move SATA PHY code into a standalone driver */
27 26
28/* Base addresses */ 27/* Base addresses */
29#define SPEAR1340_SATA_BASE UL(0xB1000000) 28#define SPEAR1340_SATA_BASE UL(0xB1000000)
30#define SPEAR1340_UART1_BASE UL(0xB4100000)
31 29
32/* Power Management Registers */ 30/* Power Management Registers */
33#define SPEAR1340_PCM_CFG (VA_MISC_BASE + 0x100) 31#define SPEAR1340_PCM_CFG (VA_MISC_BASE + 0x100)
@@ -79,28 +77,6 @@
79 (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \ 77 (SPEAR1340_MIPHY_OSC_BYPASS_EXT | \
80 SPEAR1340_MIPHY_PLL_RATIO_TOP(25)) 78 SPEAR1340_MIPHY_PLL_RATIO_TOP(25))
81 79
82static struct dw_dma_slave uart1_dma_param[] = {
83 {
84 /* Tx */
85 .cfg_hi = DWC_CFGH_DST_PER(SPEAR1340_DMA_REQ_UART1_TX),
86 .cfg_lo = 0,
87 .src_master = DMA_MASTER_MEMORY,
88 .dst_master = SPEAR1340_DMA_MASTER_UART1,
89 }, {
90 /* Rx */
91 .cfg_hi = DWC_CFGH_SRC_PER(SPEAR1340_DMA_REQ_UART1_RX),
92 .cfg_lo = 0,
93 .src_master = SPEAR1340_DMA_MASTER_UART1,
94 .dst_master = DMA_MASTER_MEMORY,
95 }
96};
97
98static struct amba_pl011_data uart1_data = {
99 .dma_filter = dw_dma_filter,
100 .dma_tx_param = &uart1_dma_param[0],
101 .dma_rx_param = &uart1_dma_param[1],
102};
103
104/* SATA device registration */ 80/* SATA device registration */
105static int sata_miphy_init(struct device *dev, void __iomem *addr) 81static int sata_miphy_init(struct device *dev, void __iomem *addr)
106{ 82{
@@ -159,14 +135,8 @@ static struct ahci_platform_data sata_pdata = {
159 135
160/* Add SPEAr1340 auxdata to pass platform data */ 136/* Add SPEAr1340 auxdata to pass platform data */
161static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = { 137static struct of_dev_auxdata spear1340_auxdata_lookup[] __initdata = {
162 OF_DEV_AUXDATA("arasan,cf-spear1340", MCIF_CF_BASE, NULL, &cf_dma_priv),
163 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC0_BASE, NULL, &dmac_plat_data),
164 OF_DEV_AUXDATA("snps,dma-spear1340", DMAC1_BASE, NULL, &dmac_plat_data),
165 OF_DEV_AUXDATA("arm,pl022", SSP_BASE, NULL, &pl022_plat_data),
166
167 OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL, 138 OF_DEV_AUXDATA("snps,spear-ahci", SPEAR1340_SATA_BASE, NULL,
168 &sata_pdata), 139 &sata_pdata),
169 OF_DEV_AUXDATA("arm,pl011", SPEAR1340_UART1_BASE, NULL, &uart1_data),
170 {} 140 {}
171}; 141};
172 142
diff --git a/arch/arm/mach-spear/spear13xx-dma.h b/arch/arm/mach-spear/spear13xx-dma.h
deleted file mode 100644
index d50bdb605925..000000000000
--- a/arch/arm/mach-spear/spear13xx-dma.h
+++ /dev/null
@@ -1,128 +0,0 @@
1/*
2 * arch/arm/mach-spear13xx/include/mach/dma.h
3 *
4 * DMA information for SPEAr13xx machine family
5 *
6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.linux@gmail.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#ifndef __MACH_DMA_H
15#define __MACH_DMA_H
16
17/* request id of all the peripherals */
18enum dma_master_info {
19 /* Accessible from only one master */
20 DMA_MASTER_MCIF = 0,
21 DMA_MASTER_FSMC = 1,
22 /* Accessible from both 0 & 1 */
23 DMA_MASTER_MEMORY = 0,
24 DMA_MASTER_ADC = 0,
25 DMA_MASTER_UART0 = 0,
26 DMA_MASTER_SSP0 = 0,
27 DMA_MASTER_I2C0 = 0,
28
29#ifdef CONFIG_MACH_SPEAR1310
30 /* Accessible from only one master */
31 SPEAR1310_DMA_MASTER_JPEG = 1,
32
33 /* Accessible from both 0 & 1 */
34 SPEAR1310_DMA_MASTER_I2S = 0,
35 SPEAR1310_DMA_MASTER_UART1 = 0,
36 SPEAR1310_DMA_MASTER_UART2 = 0,
37 SPEAR1310_DMA_MASTER_UART3 = 0,
38 SPEAR1310_DMA_MASTER_UART4 = 0,
39 SPEAR1310_DMA_MASTER_UART5 = 0,
40 SPEAR1310_DMA_MASTER_I2C1 = 0,
41 SPEAR1310_DMA_MASTER_I2C2 = 0,
42 SPEAR1310_DMA_MASTER_I2C3 = 0,
43 SPEAR1310_DMA_MASTER_I2C4 = 0,
44 SPEAR1310_DMA_MASTER_I2C5 = 0,
45 SPEAR1310_DMA_MASTER_I2C6 = 0,
46 SPEAR1310_DMA_MASTER_I2C7 = 0,
47 SPEAR1310_DMA_MASTER_SSP1 = 0,
48#endif
49
50#ifdef CONFIG_MACH_SPEAR1340
51 /* Accessible from only one master */
52 SPEAR1340_DMA_MASTER_I2S_PLAY = 1,
53 SPEAR1340_DMA_MASTER_I2S_REC = 1,
54 SPEAR1340_DMA_MASTER_I2C1 = 1,
55 SPEAR1340_DMA_MASTER_UART1 = 1,
56
57 /* following are accessible from both master 0 & 1 */
58 SPEAR1340_DMA_MASTER_SPDIF = 0,
59 SPEAR1340_DMA_MASTER_CAM = 1,
60 SPEAR1340_DMA_MASTER_VIDEO_IN = 0,
61 SPEAR1340_DMA_MASTER_MALI = 0,
62#endif
63};
64
65enum request_id {
66 DMA_REQ_ADC = 0,
67 DMA_REQ_SSP0_TX = 4,
68 DMA_REQ_SSP0_RX = 5,
69 DMA_REQ_UART0_TX = 6,
70 DMA_REQ_UART0_RX = 7,
71 DMA_REQ_I2C0_TX = 8,
72 DMA_REQ_I2C0_RX = 9,
73
74#ifdef CONFIG_MACH_SPEAR1310
75 SPEAR1310_DMA_REQ_FROM_JPEG = 2,
76 SPEAR1310_DMA_REQ_TO_JPEG = 3,
77 SPEAR1310_DMA_REQ_I2S_TX = 10,
78 SPEAR1310_DMA_REQ_I2S_RX = 11,
79
80 SPEAR1310_DMA_REQ_I2C1_RX = 0,
81 SPEAR1310_DMA_REQ_I2C1_TX = 1,
82 SPEAR1310_DMA_REQ_I2C2_RX = 2,
83 SPEAR1310_DMA_REQ_I2C2_TX = 3,
84 SPEAR1310_DMA_REQ_I2C3_RX = 4,
85 SPEAR1310_DMA_REQ_I2C3_TX = 5,
86 SPEAR1310_DMA_REQ_I2C4_RX = 6,
87 SPEAR1310_DMA_REQ_I2C4_TX = 7,
88 SPEAR1310_DMA_REQ_I2C5_RX = 8,
89 SPEAR1310_DMA_REQ_I2C5_TX = 9,
90 SPEAR1310_DMA_REQ_I2C6_RX = 10,
91 SPEAR1310_DMA_REQ_I2C6_TX = 11,
92 SPEAR1310_DMA_REQ_UART1_RX = 12,
93 SPEAR1310_DMA_REQ_UART1_TX = 13,
94 SPEAR1310_DMA_REQ_UART2_RX = 14,
95 SPEAR1310_DMA_REQ_UART2_TX = 15,
96 SPEAR1310_DMA_REQ_UART5_RX = 16,
97 SPEAR1310_DMA_REQ_UART5_TX = 17,
98 SPEAR1310_DMA_REQ_SSP1_RX = 18,
99 SPEAR1310_DMA_REQ_SSP1_TX = 19,
100 SPEAR1310_DMA_REQ_I2C7_RX = 20,
101 SPEAR1310_DMA_REQ_I2C7_TX = 21,
102 SPEAR1310_DMA_REQ_UART3_RX = 28,
103 SPEAR1310_DMA_REQ_UART3_TX = 29,
104 SPEAR1310_DMA_REQ_UART4_RX = 30,
105 SPEAR1310_DMA_REQ_UART4_TX = 31,
106#endif
107
108#ifdef CONFIG_MACH_SPEAR1340
109 SPEAR1340_DMA_REQ_SPDIF_TX = 2,
110 SPEAR1340_DMA_REQ_SPDIF_RX = 3,
111 SPEAR1340_DMA_REQ_I2S_TX = 10,
112 SPEAR1340_DMA_REQ_I2S_RX = 11,
113 SPEAR1340_DMA_REQ_UART1_TX = 12,
114 SPEAR1340_DMA_REQ_UART1_RX = 13,
115 SPEAR1340_DMA_REQ_I2C1_TX = 14,
116 SPEAR1340_DMA_REQ_I2C1_RX = 15,
117 SPEAR1340_DMA_REQ_CAM0_EVEN = 0,
118 SPEAR1340_DMA_REQ_CAM0_ODD = 1,
119 SPEAR1340_DMA_REQ_CAM1_EVEN = 2,
120 SPEAR1340_DMA_REQ_CAM1_ODD = 3,
121 SPEAR1340_DMA_REQ_CAM2_EVEN = 4,
122 SPEAR1340_DMA_REQ_CAM2_ODD = 5,
123 SPEAR1340_DMA_REQ_CAM3_EVEN = 6,
124 SPEAR1340_DMA_REQ_CAM3_ODD = 7,
125#endif
126};
127
128#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-spear/spear13xx.c b/arch/arm/mach-spear/spear13xx.c
index 1b97e8623472..3975916666a0 100644
--- a/arch/arm/mach-spear/spear13xx.c
+++ b/arch/arm/mach-spear/spear13xx.c
@@ -15,7 +15,6 @@
15 15
16#include <linux/amba/pl022.h> 16#include <linux/amba/pl022.h>
17#include <linux/clk.h> 17#include <linux/clk.h>
18#include <linux/dw_dmac.h>
19#include <linux/err.h> 18#include <linux/err.h>
20#include <linux/of.h> 19#include <linux/of.h>
21#include <asm/hardware/cache-l2x0.h> 20#include <asm/hardware/cache-l2x0.h>
@@ -24,63 +23,6 @@
24#include "generic.h" 23#include "generic.h"
25#include <mach/spear.h> 24#include <mach/spear.h>
26 25
27#include "spear13xx-dma.h"
28
29/* common dw_dma filter routine to be used by peripherals */
30bool dw_dma_filter(struct dma_chan *chan, void *slave)
31{
32 struct dw_dma_slave *dws = (struct dw_dma_slave *)slave;
33
34 if (chan->device->dev == dws->dma_dev) {
35 chan->private = slave;
36 return true;
37 } else {
38 return false;
39 }
40}
41
42/* ssp device registration */
43static struct dw_dma_slave ssp_dma_param[] = {
44 {
45 /* Tx */
46 .cfg_hi = DWC_CFGH_DST_PER(DMA_REQ_SSP0_TX),
47 .cfg_lo = 0,
48 .src_master = DMA_MASTER_MEMORY,
49 .dst_master = DMA_MASTER_SSP0,
50 }, {
51 /* Rx */
52 .cfg_hi = DWC_CFGH_SRC_PER(DMA_REQ_SSP0_RX),
53 .cfg_lo = 0,
54 .src_master = DMA_MASTER_SSP0,
55 .dst_master = DMA_MASTER_MEMORY,
56 }
57};
58
59struct pl022_ssp_controller pl022_plat_data = {
60 .enable_dma = 1,
61 .dma_filter = dw_dma_filter,
62 .dma_rx_param = &ssp_dma_param[1],
63 .dma_tx_param = &ssp_dma_param[0],
64};
65
66/* CF device registration */
67struct dw_dma_slave cf_dma_priv = {
68 .cfg_hi = 0,
69 .cfg_lo = 0,
70 .src_master = 0,
71 .dst_master = 0,
72};
73
74/* dmac device registeration */
75struct dw_dma_platform_data dmac_plat_data = {
76 .nr_channels = 8,
77 .chan_allocation_order = CHAN_ALLOCATION_DESCENDING,
78 .chan_priority = CHAN_PRIORITY_DESCENDING,
79 .block_size = 4095U,
80 .nr_masters = 2,
81 .data_width = { 3, 3, 0, 0 },
82};
83
84void __init spear13xx_l2x0_init(void) 26void __init spear13xx_l2x0_init(void)
85{ 27{
86 /* 28 /*
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 08:43:26 -0500