diff options
Diffstat (limited to 'arch/arm/mach-spear6xx/include/mach/spear.h')
| -rw-r--r-- | arch/arm/mach-spear6xx/include/mach/spear.h | 55 |
1 files changed, 6 insertions, 49 deletions
diff --git a/arch/arm/mach-spear6xx/include/mach/spear.h b/arch/arm/mach-spear6xx/include/mach/spear.h index 7fd621532def..d278ed047a53 100644 --- a/arch/arm/mach-spear6xx/include/mach/spear.h +++ b/arch/arm/mach-spear6xx/include/mach/spear.h | |||
| @@ -15,69 +15,26 @@ | |||
| 15 | #define __MACH_SPEAR6XX_H | 15 | #define __MACH_SPEAR6XX_H |
| 16 | 16 | ||
| 17 | #include <asm/memory.h> | 17 | #include <asm/memory.h> |
| 18 | #include <mach/spear600.h> | ||
| 19 | 18 | ||
| 20 | #define SPEAR6XX_ML_SDRAM_BASE UL(0x00000000) | ||
| 21 | /* ICM1 - Low speed connection */ | 19 | /* ICM1 - Low speed connection */ |
| 22 | #define SPEAR6XX_ICM1_BASE UL(0xD0000000) | 20 | #define SPEAR6XX_ICM1_BASE UL(0xD0000000) |
| 23 | 21 | #define VA_SPEAR6XX_ICM1_BASE UL(0xFD000000) | |
| 24 | #define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000) | 22 | #define SPEAR6XX_ICM1_UART0_BASE UL(0xD0000000) |
| 25 | #define VA_SPEAR6XX_ICM1_UART0_BASE IO_ADDRESS(SPEAR6XX_ICM1_UART0_BASE) | 23 | #define VA_SPEAR6XX_ICM1_UART0_BASE (VA_SPEAR6XX_ICM1_2_BASE | SPEAR6XX_ICM1_UART0_BASE) |
| 26 | |||
| 27 | #define SPEAR6XX_ICM1_UART1_BASE UL(0xD0080000) | ||
| 28 | #define SPEAR6XX_ICM1_SSP0_BASE UL(0xD0100000) | ||
| 29 | #define SPEAR6XX_ICM1_SSP1_BASE UL(0xD0180000) | ||
| 30 | #define SPEAR6XX_ICM1_I2C_BASE UL(0xD0200000) | ||
| 31 | #define SPEAR6XX_ICM1_JPEG_BASE UL(0xD0800000) | ||
| 32 | #define SPEAR6XX_ICM1_IRDA_BASE UL(0xD1000000) | ||
| 33 | #define SPEAR6XX_ICM1_FSMC_BASE UL(0xD1800000) | ||
| 34 | #define SPEAR6XX_ICM1_NAND_BASE UL(0xD2000000) | ||
| 35 | #define SPEAR6XX_ICM1_SRAM_BASE UL(0xD2800000) | ||
| 36 | |||
| 37 | /* ICM2 - Application Subsystem */ | ||
| 38 | #define SPEAR6XX_ICM2_BASE UL(0xD8000000) | ||
| 39 | #define SPEAR6XX_ICM2_TMR0_BASE UL(0xD8000000) | ||
| 40 | #define SPEAR6XX_ICM2_TMR1_BASE UL(0xD8080000) | ||
| 41 | #define SPEAR6XX_ICM2_GPIO_BASE UL(0xD8100000) | ||
| 42 | #define SPEAR6XX_ICM2_SSP2_BASE UL(0xD8180000) | ||
| 43 | #define SPEAR6XX_ICM2_ADC_BASE UL(0xD8200000) | ||
| 44 | 24 | ||
| 45 | /* ML-1, 2 - Multi Layer CPU Subsystem */ | 25 | /* ML-1, 2 - Multi Layer CPU Subsystem */ |
| 46 | #define SPEAR6XX_ML_CPU_BASE UL(0xF0000000) | 26 | #define SPEAR6XX_ML_CPU_BASE UL(0xF0000000) |
| 27 | #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) | ||
| 47 | #define SPEAR6XX_CPU_TMR_BASE UL(0xF0000000) | 28 | #define SPEAR6XX_CPU_TMR_BASE UL(0xF0000000) |
| 48 | #define SPEAR6XX_CPU_GPIO_BASE UL(0xF0100000) | ||
| 49 | #define SPEAR6XX_CPU_VIC_SEC_BASE UL(0xF1000000) | ||
| 50 | #define VA_SPEAR6XX_CPU_VIC_SEC_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_SEC_BASE) | ||
| 51 | #define SPEAR6XX_CPU_VIC_PRI_BASE UL(0xF1100000) | ||
| 52 | #define VA_SPEAR6XX_CPU_VIC_PRI_BASE IO_ADDRESS(SPEAR6XX_CPU_VIC_PRI_BASE) | ||
| 53 | 29 | ||
| 54 | /* ICM3 - Basic Subsystem */ | 30 | /* ICM3 - Basic Subsystem */ |
| 55 | #define SPEAR6XX_ICM3_BASE UL(0xF8000000) | ||
| 56 | #define SPEAR6XX_ICM3_SMEM_BASE UL(0xF8000000) | ||
| 57 | #define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) | 31 | #define SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
| 58 | #define SPEAR6XX_ICM3_CLCD_BASE UL(0xFC200000) | 32 | #define VA_SPEAR6XX_ICM3_SMI_CTRL_BASE UL(0xFC000000) |
| 59 | #define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000) | 33 | #define SPEAR6XX_ICM3_DMA_BASE UL(0xFC400000) |
| 60 | #define SPEAR6XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000) | ||
| 61 | #define SPEAR6XX_ICM3_TMR_BASE UL(0xFC800000) | ||
| 62 | #define SPEAR6XX_ICM3_WDT_BASE UL(0xFC880000) | ||
| 63 | #define SPEAR6XX_ICM3_RTC_BASE UL(0xFC900000) | ||
| 64 | #define SPEAR6XX_ICM3_GPIO_BASE UL(0xFC980000) | ||
| 65 | #define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) | 34 | #define SPEAR6XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000) |
| 66 | #define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR6XX_ICM3_SYS_CTRL_BASE) | 35 | #define VA_SPEAR6XX_ICM3_SYS_CTRL_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_SYS_CTRL_BASE) |
| 67 | #define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000) | 36 | #define SPEAR6XX_ICM3_MISC_REG_BASE UL(0xFCA80000) |
| 68 | #define VA_SPEAR6XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR6XX_ICM3_MISC_REG_BASE) | 37 | #define VA_SPEAR6XX_ICM3_MISC_REG_BASE (VA_SPEAR6XX_ICM3_SMI_CTRL_BASE | SPEAR6XX_ICM3_MISC_REG_BASE) |
| 69 | |||
| 70 | /* ICM4 - High Speed Connection */ | ||
| 71 | #define SPEAR6XX_ICM4_BASE UL(0xE0000000) | ||
| 72 | #define SPEAR6XX_ICM4_GMAC_BASE UL(0xE0800000) | ||
| 73 | #define SPEAR6XX_ICM4_USBD_FIFO_BASE UL(0xE1000000) | ||
| 74 | #define SPEAR6XX_ICM4_USBD_CSR_BASE UL(0xE1100000) | ||
| 75 | #define SPEAR6XX_ICM4_USBD_PLDT_BASE UL(0xE1200000) | ||
| 76 | #define SPEAR6XX_ICM4_USB_EHCI0_BASE UL(0xE1800000) | ||
| 77 | #define SPEAR6XX_ICM4_USB_OHCI0_BASE UL(0xE1900000) | ||
| 78 | #define SPEAR6XX_ICM4_USB_EHCI1_BASE UL(0xE2000000) | ||
| 79 | #define SPEAR6XX_ICM4_USB_OHCI1_BASE UL(0xE2100000) | ||
| 80 | #define SPEAR6XX_ICM4_USB_ARB_BASE UL(0xE2800000) | ||
| 81 | 38 | ||
| 82 | /* Debug uart for linux, will be used for debug and uncompress messages */ | 39 | /* Debug uart for linux, will be used for debug and uncompress messages */ |
| 83 | #define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE | 40 | #define SPEAR_DBG_UART_BASE SPEAR6XX_ICM1_UART0_BASE |