diff options
Diffstat (limited to 'arch/arm/mach-spear3xx/spear320.c')
-rw-r--r-- | arch/arm/mach-spear3xx/spear320.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c index 88d483bcd66a..fd823c624575 100644 --- a/arch/arm/mach-spear3xx/spear320.c +++ b/arch/arm/mach-spear3xx/spear320.c | |||
@@ -213,182 +213,156 @@ struct pl08x_channel_data spear320_dma_info[] = { | |||
213 | .min_signal = 2, | 213 | .min_signal = 2, |
214 | .max_signal = 2, | 214 | .max_signal = 2, |
215 | .muxval = 0, | 215 | .muxval = 0, |
216 | .cctl = 0, | ||
217 | .periph_buses = PL08X_AHB1, | 216 | .periph_buses = PL08X_AHB1, |
218 | }, { | 217 | }, { |
219 | .bus_id = "uart0_tx", | 218 | .bus_id = "uart0_tx", |
220 | .min_signal = 3, | 219 | .min_signal = 3, |
221 | .max_signal = 3, | 220 | .max_signal = 3, |
222 | .muxval = 0, | 221 | .muxval = 0, |
223 | .cctl = 0, | ||
224 | .periph_buses = PL08X_AHB1, | 222 | .periph_buses = PL08X_AHB1, |
225 | }, { | 223 | }, { |
226 | .bus_id = "ssp0_rx", | 224 | .bus_id = "ssp0_rx", |
227 | .min_signal = 8, | 225 | .min_signal = 8, |
228 | .max_signal = 8, | 226 | .max_signal = 8, |
229 | .muxval = 0, | 227 | .muxval = 0, |
230 | .cctl = 0, | ||
231 | .periph_buses = PL08X_AHB1, | 228 | .periph_buses = PL08X_AHB1, |
232 | }, { | 229 | }, { |
233 | .bus_id = "ssp0_tx", | 230 | .bus_id = "ssp0_tx", |
234 | .min_signal = 9, | 231 | .min_signal = 9, |
235 | .max_signal = 9, | 232 | .max_signal = 9, |
236 | .muxval = 0, | 233 | .muxval = 0, |
237 | .cctl = 0, | ||
238 | .periph_buses = PL08X_AHB1, | 234 | .periph_buses = PL08X_AHB1, |
239 | }, { | 235 | }, { |
240 | .bus_id = "i2c0_rx", | 236 | .bus_id = "i2c0_rx", |
241 | .min_signal = 10, | 237 | .min_signal = 10, |
242 | .max_signal = 10, | 238 | .max_signal = 10, |
243 | .muxval = 0, | 239 | .muxval = 0, |
244 | .cctl = 0, | ||
245 | .periph_buses = PL08X_AHB1, | 240 | .periph_buses = PL08X_AHB1, |
246 | }, { | 241 | }, { |
247 | .bus_id = "i2c0_tx", | 242 | .bus_id = "i2c0_tx", |
248 | .min_signal = 11, | 243 | .min_signal = 11, |
249 | .max_signal = 11, | 244 | .max_signal = 11, |
250 | .muxval = 0, | 245 | .muxval = 0, |
251 | .cctl = 0, | ||
252 | .periph_buses = PL08X_AHB1, | 246 | .periph_buses = PL08X_AHB1, |
253 | }, { | 247 | }, { |
254 | .bus_id = "irda", | 248 | .bus_id = "irda", |
255 | .min_signal = 12, | 249 | .min_signal = 12, |
256 | .max_signal = 12, | 250 | .max_signal = 12, |
257 | .muxval = 0, | 251 | .muxval = 0, |
258 | .cctl = 0, | ||
259 | .periph_buses = PL08X_AHB1, | 252 | .periph_buses = PL08X_AHB1, |
260 | }, { | 253 | }, { |
261 | .bus_id = "adc", | 254 | .bus_id = "adc", |
262 | .min_signal = 13, | 255 | .min_signal = 13, |
263 | .max_signal = 13, | 256 | .max_signal = 13, |
264 | .muxval = 0, | 257 | .muxval = 0, |
265 | .cctl = 0, | ||
266 | .periph_buses = PL08X_AHB1, | 258 | .periph_buses = PL08X_AHB1, |
267 | }, { | 259 | }, { |
268 | .bus_id = "to_jpeg", | 260 | .bus_id = "to_jpeg", |
269 | .min_signal = 14, | 261 | .min_signal = 14, |
270 | .max_signal = 14, | 262 | .max_signal = 14, |
271 | .muxval = 0, | 263 | .muxval = 0, |
272 | .cctl = 0, | ||
273 | .periph_buses = PL08X_AHB1, | 264 | .periph_buses = PL08X_AHB1, |
274 | }, { | 265 | }, { |
275 | .bus_id = "from_jpeg", | 266 | .bus_id = "from_jpeg", |
276 | .min_signal = 15, | 267 | .min_signal = 15, |
277 | .max_signal = 15, | 268 | .max_signal = 15, |
278 | .muxval = 0, | 269 | .muxval = 0, |
279 | .cctl = 0, | ||
280 | .periph_buses = PL08X_AHB1, | 270 | .periph_buses = PL08X_AHB1, |
281 | }, { | 271 | }, { |
282 | .bus_id = "ssp1_rx", | 272 | .bus_id = "ssp1_rx", |
283 | .min_signal = 0, | 273 | .min_signal = 0, |
284 | .max_signal = 0, | 274 | .max_signal = 0, |
285 | .muxval = 1, | 275 | .muxval = 1, |
286 | .cctl = 0, | ||
287 | .periph_buses = PL08X_AHB2, | 276 | .periph_buses = PL08X_AHB2, |
288 | }, { | 277 | }, { |
289 | .bus_id = "ssp1_tx", | 278 | .bus_id = "ssp1_tx", |
290 | .min_signal = 1, | 279 | .min_signal = 1, |
291 | .max_signal = 1, | 280 | .max_signal = 1, |
292 | .muxval = 1, | 281 | .muxval = 1, |
293 | .cctl = 0, | ||
294 | .periph_buses = PL08X_AHB2, | 282 | .periph_buses = PL08X_AHB2, |
295 | }, { | 283 | }, { |
296 | .bus_id = "ssp2_rx", | 284 | .bus_id = "ssp2_rx", |
297 | .min_signal = 2, | 285 | .min_signal = 2, |
298 | .max_signal = 2, | 286 | .max_signal = 2, |
299 | .muxval = 1, | 287 | .muxval = 1, |
300 | .cctl = 0, | ||
301 | .periph_buses = PL08X_AHB2, | 288 | .periph_buses = PL08X_AHB2, |
302 | }, { | 289 | }, { |
303 | .bus_id = "ssp2_tx", | 290 | .bus_id = "ssp2_tx", |
304 | .min_signal = 3, | 291 | .min_signal = 3, |
305 | .max_signal = 3, | 292 | .max_signal = 3, |
306 | .muxval = 1, | 293 | .muxval = 1, |
307 | .cctl = 0, | ||
308 | .periph_buses = PL08X_AHB2, | 294 | .periph_buses = PL08X_AHB2, |
309 | }, { | 295 | }, { |
310 | .bus_id = "uart1_rx", | 296 | .bus_id = "uart1_rx", |
311 | .min_signal = 4, | 297 | .min_signal = 4, |
312 | .max_signal = 4, | 298 | .max_signal = 4, |
313 | .muxval = 1, | 299 | .muxval = 1, |
314 | .cctl = 0, | ||
315 | .periph_buses = PL08X_AHB2, | 300 | .periph_buses = PL08X_AHB2, |
316 | }, { | 301 | }, { |
317 | .bus_id = "uart1_tx", | 302 | .bus_id = "uart1_tx", |
318 | .min_signal = 5, | 303 | .min_signal = 5, |
319 | .max_signal = 5, | 304 | .max_signal = 5, |
320 | .muxval = 1, | 305 | .muxval = 1, |
321 | .cctl = 0, | ||
322 | .periph_buses = PL08X_AHB2, | 306 | .periph_buses = PL08X_AHB2, |
323 | }, { | 307 | }, { |
324 | .bus_id = "uart2_rx", | 308 | .bus_id = "uart2_rx", |
325 | .min_signal = 6, | 309 | .min_signal = 6, |
326 | .max_signal = 6, | 310 | .max_signal = 6, |
327 | .muxval = 1, | 311 | .muxval = 1, |
328 | .cctl = 0, | ||
329 | .periph_buses = PL08X_AHB2, | 312 | .periph_buses = PL08X_AHB2, |
330 | }, { | 313 | }, { |
331 | .bus_id = "uart2_tx", | 314 | .bus_id = "uart2_tx", |
332 | .min_signal = 7, | 315 | .min_signal = 7, |
333 | .max_signal = 7, | 316 | .max_signal = 7, |
334 | .muxval = 1, | 317 | .muxval = 1, |
335 | .cctl = 0, | ||
336 | .periph_buses = PL08X_AHB2, | 318 | .periph_buses = PL08X_AHB2, |
337 | }, { | 319 | }, { |
338 | .bus_id = "i2c1_rx", | 320 | .bus_id = "i2c1_rx", |
339 | .min_signal = 8, | 321 | .min_signal = 8, |
340 | .max_signal = 8, | 322 | .max_signal = 8, |
341 | .muxval = 1, | 323 | .muxval = 1, |
342 | .cctl = 0, | ||
343 | .periph_buses = PL08X_AHB2, | 324 | .periph_buses = PL08X_AHB2, |
344 | }, { | 325 | }, { |
345 | .bus_id = "i2c1_tx", | 326 | .bus_id = "i2c1_tx", |
346 | .min_signal = 9, | 327 | .min_signal = 9, |
347 | .max_signal = 9, | 328 | .max_signal = 9, |
348 | .muxval = 1, | 329 | .muxval = 1, |
349 | .cctl = 0, | ||
350 | .periph_buses = PL08X_AHB2, | 330 | .periph_buses = PL08X_AHB2, |
351 | }, { | 331 | }, { |
352 | .bus_id = "i2c2_rx", | 332 | .bus_id = "i2c2_rx", |
353 | .min_signal = 10, | 333 | .min_signal = 10, |
354 | .max_signal = 10, | 334 | .max_signal = 10, |
355 | .muxval = 1, | 335 | .muxval = 1, |
356 | .cctl = 0, | ||
357 | .periph_buses = PL08X_AHB2, | 336 | .periph_buses = PL08X_AHB2, |
358 | }, { | 337 | }, { |
359 | .bus_id = "i2c2_tx", | 338 | .bus_id = "i2c2_tx", |
360 | .min_signal = 11, | 339 | .min_signal = 11, |
361 | .max_signal = 11, | 340 | .max_signal = 11, |
362 | .muxval = 1, | 341 | .muxval = 1, |
363 | .cctl = 0, | ||
364 | .periph_buses = PL08X_AHB2, | 342 | .periph_buses = PL08X_AHB2, |
365 | }, { | 343 | }, { |
366 | .bus_id = "i2s_rx", | 344 | .bus_id = "i2s_rx", |
367 | .min_signal = 12, | 345 | .min_signal = 12, |
368 | .max_signal = 12, | 346 | .max_signal = 12, |
369 | .muxval = 1, | 347 | .muxval = 1, |
370 | .cctl = 0, | ||
371 | .periph_buses = PL08X_AHB2, | 348 | .periph_buses = PL08X_AHB2, |
372 | }, { | 349 | }, { |
373 | .bus_id = "i2s_tx", | 350 | .bus_id = "i2s_tx", |
374 | .min_signal = 13, | 351 | .min_signal = 13, |
375 | .max_signal = 13, | 352 | .max_signal = 13, |
376 | .muxval = 1, | 353 | .muxval = 1, |
377 | .cctl = 0, | ||
378 | .periph_buses = PL08X_AHB2, | 354 | .periph_buses = PL08X_AHB2, |
379 | }, { | 355 | }, { |
380 | .bus_id = "rs485_rx", | 356 | .bus_id = "rs485_rx", |
381 | .min_signal = 14, | 357 | .min_signal = 14, |
382 | .max_signal = 14, | 358 | .max_signal = 14, |
383 | .muxval = 1, | 359 | .muxval = 1, |
384 | .cctl = 0, | ||
385 | .periph_buses = PL08X_AHB2, | 360 | .periph_buses = PL08X_AHB2, |
386 | }, { | 361 | }, { |
387 | .bus_id = "rs485_tx", | 362 | .bus_id = "rs485_tx", |
388 | .min_signal = 15, | 363 | .min_signal = 15, |
389 | .max_signal = 15, | 364 | .max_signal = 15, |
390 | .muxval = 1, | 365 | .muxval = 1, |
391 | .cctl = 0, | ||
392 | .periph_buses = PL08X_AHB2, | 366 | .periph_buses = PL08X_AHB2, |
393 | }, | 367 | }, |
394 | }; | 368 | }; |