diff options
Diffstat (limited to 'arch/arm/mach-spear3xx/spear310.c')
-rw-r--r-- | arch/arm/mach-spear3xx/spear310.c | 391 |
1 files changed, 367 insertions, 24 deletions
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c index febaa6fcfb6a..b26e41566b50 100644 --- a/arch/arm/mach-spear3xx/spear310.c +++ b/arch/arm/mach-spear3xx/spear310.c | |||
@@ -3,19 +3,84 @@ | |||
3 | * | 3 | * |
4 | * SPEAr310 machine source file | 4 | * SPEAr310 machine source file |
5 | * | 5 | * |
6 | * Copyright (C) 2009 ST Microelectronics | 6 | * Copyright (C) 2009-2012 ST Microelectronics |
7 | * Viresh Kumar<viresh.kumar@st.com> | 7 | * Viresh Kumar <viresh.kumar@st.com> |
8 | * | 8 | * |
9 | * This file is licensed under the terms of the GNU General Public | 9 | * This file is licensed under the terms of the GNU General Public |
10 | * License version 2. This program is licensed "as is" without any | 10 | * License version 2. This program is licensed "as is" without any |
11 | * warranty of any kind, whether express or implied. | 11 | * warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include <linux/ptrace.h> | 14 | #define pr_fmt(fmt) "SPEAr310: " fmt |
15 | #include <asm/irq.h> | 15 | |
16 | #include <linux/amba/pl08x.h> | ||
17 | #include <linux/amba/serial.h> | ||
18 | #include <linux/of_platform.h> | ||
19 | #include <asm/hardware/vic.h> | ||
20 | #include <asm/mach/arch.h> | ||
16 | #include <plat/shirq.h> | 21 | #include <plat/shirq.h> |
17 | #include <mach/generic.h> | 22 | #include <mach/generic.h> |
18 | #include <mach/hardware.h> | 23 | #include <mach/spear.h> |
24 | |||
25 | #define SPEAR310_UART1_BASE UL(0xB2000000) | ||
26 | #define SPEAR310_UART2_BASE UL(0xB2080000) | ||
27 | #define SPEAR310_UART3_BASE UL(0xB2100000) | ||
28 | #define SPEAR310_UART4_BASE UL(0xB2180000) | ||
29 | #define SPEAR310_UART5_BASE UL(0xB2200000) | ||
30 | #define SPEAR310_SOC_CONFIG_BASE UL(0xB4000000) | ||
31 | |||
32 | /* Interrupt registers offsets and masks */ | ||
33 | #define SPEAR310_INT_STS_MASK_REG 0x04 | ||
34 | #define SPEAR310_SMII0_IRQ_MASK (1 << 0) | ||
35 | #define SPEAR310_SMII1_IRQ_MASK (1 << 1) | ||
36 | #define SPEAR310_SMII2_IRQ_MASK (1 << 2) | ||
37 | #define SPEAR310_SMII3_IRQ_MASK (1 << 3) | ||
38 | #define SPEAR310_WAKEUP_SMII0_IRQ_MASK (1 << 4) | ||
39 | #define SPEAR310_WAKEUP_SMII1_IRQ_MASK (1 << 5) | ||
40 | #define SPEAR310_WAKEUP_SMII2_IRQ_MASK (1 << 6) | ||
41 | #define SPEAR310_WAKEUP_SMII3_IRQ_MASK (1 << 7) | ||
42 | #define SPEAR310_UART1_IRQ_MASK (1 << 8) | ||
43 | #define SPEAR310_UART2_IRQ_MASK (1 << 9) | ||
44 | #define SPEAR310_UART3_IRQ_MASK (1 << 10) | ||
45 | #define SPEAR310_UART4_IRQ_MASK (1 << 11) | ||
46 | #define SPEAR310_UART5_IRQ_MASK (1 << 12) | ||
47 | #define SPEAR310_EMI_IRQ_MASK (1 << 13) | ||
48 | #define SPEAR310_TDM_HDLC_IRQ_MASK (1 << 14) | ||
49 | #define SPEAR310_RS485_0_IRQ_MASK (1 << 15) | ||
50 | #define SPEAR310_RS485_1_IRQ_MASK (1 << 16) | ||
51 | |||
52 | #define SPEAR310_SHIRQ_RAS1_MASK 0x000FF | ||
53 | #define SPEAR310_SHIRQ_RAS2_MASK 0x01F00 | ||
54 | #define SPEAR310_SHIRQ_RAS3_MASK 0x02000 | ||
55 | #define SPEAR310_SHIRQ_INTRCOMM_RAS_MASK 0x1C000 | ||
56 | |||
57 | /* SPEAr310 Virtual irq definitions */ | ||
58 | /* IRQs sharing IRQ_GEN_RAS_1 */ | ||
59 | #define SPEAR310_VIRQ_SMII0 (SPEAR3XX_VIRQ_START + 0) | ||
60 | #define SPEAR310_VIRQ_SMII1 (SPEAR3XX_VIRQ_START + 1) | ||
61 | #define SPEAR310_VIRQ_SMII2 (SPEAR3XX_VIRQ_START + 2) | ||
62 | #define SPEAR310_VIRQ_SMII3 (SPEAR3XX_VIRQ_START + 3) | ||
63 | #define SPEAR310_VIRQ_WAKEUP_SMII0 (SPEAR3XX_VIRQ_START + 4) | ||
64 | #define SPEAR310_VIRQ_WAKEUP_SMII1 (SPEAR3XX_VIRQ_START + 5) | ||
65 | #define SPEAR310_VIRQ_WAKEUP_SMII2 (SPEAR3XX_VIRQ_START + 6) | ||
66 | #define SPEAR310_VIRQ_WAKEUP_SMII3 (SPEAR3XX_VIRQ_START + 7) | ||
67 | |||
68 | /* IRQs sharing IRQ_GEN_RAS_2 */ | ||
69 | #define SPEAR310_VIRQ_UART1 (SPEAR3XX_VIRQ_START + 8) | ||
70 | #define SPEAR310_VIRQ_UART2 (SPEAR3XX_VIRQ_START + 9) | ||
71 | #define SPEAR310_VIRQ_UART3 (SPEAR3XX_VIRQ_START + 10) | ||
72 | #define SPEAR310_VIRQ_UART4 (SPEAR3XX_VIRQ_START + 11) | ||
73 | #define SPEAR310_VIRQ_UART5 (SPEAR3XX_VIRQ_START + 12) | ||
74 | |||
75 | /* IRQs sharing IRQ_GEN_RAS_3 */ | ||
76 | #define SPEAR310_VIRQ_EMI (SPEAR3XX_VIRQ_START + 13) | ||
77 | #define SPEAR310_VIRQ_PLGPIO (SPEAR3XX_VIRQ_START + 14) | ||
78 | |||
79 | /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ | ||
80 | #define SPEAR310_VIRQ_TDM_HDLC (SPEAR3XX_VIRQ_START + 15) | ||
81 | #define SPEAR310_VIRQ_RS485_0 (SPEAR3XX_VIRQ_START + 16) | ||
82 | #define SPEAR310_VIRQ_RS485_1 (SPEAR3XX_VIRQ_START + 17) | ||
83 | |||
19 | 84 | ||
20 | /* pad multiplexing support */ | 85 | /* pad multiplexing support */ |
21 | /* muxing registers */ | 86 | /* muxing registers */ |
@@ -255,17 +320,271 @@ static struct spear_shirq shirq_intrcomm_ras = { | |||
255 | }, | 320 | }, |
256 | }; | 321 | }; |
257 | 322 | ||
258 | /* Add spear310 specific devices here */ | 323 | /* padmux devices to enable */ |
324 | static struct pmx_dev *spear310_evb_pmx_devs[] = { | ||
325 | /* spear3xx specific devices */ | ||
326 | &spear3xx_pmx_i2c, | ||
327 | &spear3xx_pmx_ssp, | ||
328 | &spear3xx_pmx_gpio_pin0, | ||
329 | &spear3xx_pmx_gpio_pin1, | ||
330 | &spear3xx_pmx_gpio_pin2, | ||
331 | &spear3xx_pmx_gpio_pin3, | ||
332 | &spear3xx_pmx_gpio_pin4, | ||
333 | &spear3xx_pmx_gpio_pin5, | ||
334 | &spear3xx_pmx_uart0, | ||
335 | |||
336 | /* spear310 specific devices */ | ||
337 | &spear310_pmx_emi_cs_0_1_4_5, | ||
338 | &spear310_pmx_emi_cs_2_3, | ||
339 | &spear310_pmx_uart1, | ||
340 | &spear310_pmx_uart2, | ||
341 | &spear310_pmx_uart3_4_5, | ||
342 | &spear310_pmx_fsmc, | ||
343 | &spear310_pmx_rs485_0_1, | ||
344 | &spear310_pmx_tdm0, | ||
345 | }; | ||
259 | 346 | ||
260 | /* spear310 routines */ | 347 | /* DMAC platform data's slave info */ |
261 | void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | 348 | struct pl08x_channel_data spear310_dma_info[] = { |
262 | u8 pmx_dev_count) | 349 | { |
350 | .bus_id = "uart0_rx", | ||
351 | .min_signal = 2, | ||
352 | .max_signal = 2, | ||
353 | .muxval = 0, | ||
354 | .cctl = 0, | ||
355 | .periph_buses = PL08X_AHB1, | ||
356 | }, { | ||
357 | .bus_id = "uart0_tx", | ||
358 | .min_signal = 3, | ||
359 | .max_signal = 3, | ||
360 | .muxval = 0, | ||
361 | .cctl = 0, | ||
362 | .periph_buses = PL08X_AHB1, | ||
363 | }, { | ||
364 | .bus_id = "ssp0_rx", | ||
365 | .min_signal = 8, | ||
366 | .max_signal = 8, | ||
367 | .muxval = 0, | ||
368 | .cctl = 0, | ||
369 | .periph_buses = PL08X_AHB1, | ||
370 | }, { | ||
371 | .bus_id = "ssp0_tx", | ||
372 | .min_signal = 9, | ||
373 | .max_signal = 9, | ||
374 | .muxval = 0, | ||
375 | .cctl = 0, | ||
376 | .periph_buses = PL08X_AHB1, | ||
377 | }, { | ||
378 | .bus_id = "i2c_rx", | ||
379 | .min_signal = 10, | ||
380 | .max_signal = 10, | ||
381 | .muxval = 0, | ||
382 | .cctl = 0, | ||
383 | .periph_buses = PL08X_AHB1, | ||
384 | }, { | ||
385 | .bus_id = "i2c_tx", | ||
386 | .min_signal = 11, | ||
387 | .max_signal = 11, | ||
388 | .muxval = 0, | ||
389 | .cctl = 0, | ||
390 | .periph_buses = PL08X_AHB1, | ||
391 | }, { | ||
392 | .bus_id = "irda", | ||
393 | .min_signal = 12, | ||
394 | .max_signal = 12, | ||
395 | .muxval = 0, | ||
396 | .cctl = 0, | ||
397 | .periph_buses = PL08X_AHB1, | ||
398 | }, { | ||
399 | .bus_id = "adc", | ||
400 | .min_signal = 13, | ||
401 | .max_signal = 13, | ||
402 | .muxval = 0, | ||
403 | .cctl = 0, | ||
404 | .periph_buses = PL08X_AHB1, | ||
405 | }, { | ||
406 | .bus_id = "to_jpeg", | ||
407 | .min_signal = 14, | ||
408 | .max_signal = 14, | ||
409 | .muxval = 0, | ||
410 | .cctl = 0, | ||
411 | .periph_buses = PL08X_AHB1, | ||
412 | }, { | ||
413 | .bus_id = "from_jpeg", | ||
414 | .min_signal = 15, | ||
415 | .max_signal = 15, | ||
416 | .muxval = 0, | ||
417 | .cctl = 0, | ||
418 | .periph_buses = PL08X_AHB1, | ||
419 | }, { | ||
420 | .bus_id = "uart1_rx", | ||
421 | .min_signal = 0, | ||
422 | .max_signal = 0, | ||
423 | .muxval = 1, | ||
424 | .cctl = 0, | ||
425 | .periph_buses = PL08X_AHB1, | ||
426 | }, { | ||
427 | .bus_id = "uart1_tx", | ||
428 | .min_signal = 1, | ||
429 | .max_signal = 1, | ||
430 | .muxval = 1, | ||
431 | .cctl = 0, | ||
432 | .periph_buses = PL08X_AHB1, | ||
433 | }, { | ||
434 | .bus_id = "uart2_rx", | ||
435 | .min_signal = 2, | ||
436 | .max_signal = 2, | ||
437 | .muxval = 1, | ||
438 | .cctl = 0, | ||
439 | .periph_buses = PL08X_AHB1, | ||
440 | }, { | ||
441 | .bus_id = "uart2_tx", | ||
442 | .min_signal = 3, | ||
443 | .max_signal = 3, | ||
444 | .muxval = 1, | ||
445 | .cctl = 0, | ||
446 | .periph_buses = PL08X_AHB1, | ||
447 | }, { | ||
448 | .bus_id = "uart3_rx", | ||
449 | .min_signal = 4, | ||
450 | .max_signal = 4, | ||
451 | .muxval = 1, | ||
452 | .cctl = 0, | ||
453 | .periph_buses = PL08X_AHB1, | ||
454 | }, { | ||
455 | .bus_id = "uart3_tx", | ||
456 | .min_signal = 5, | ||
457 | .max_signal = 5, | ||
458 | .muxval = 1, | ||
459 | .cctl = 0, | ||
460 | .periph_buses = PL08X_AHB1, | ||
461 | }, { | ||
462 | .bus_id = "uart4_rx", | ||
463 | .min_signal = 6, | ||
464 | .max_signal = 6, | ||
465 | .muxval = 1, | ||
466 | .cctl = 0, | ||
467 | .periph_buses = PL08X_AHB1, | ||
468 | }, { | ||
469 | .bus_id = "uart4_tx", | ||
470 | .min_signal = 7, | ||
471 | .max_signal = 7, | ||
472 | .muxval = 1, | ||
473 | .cctl = 0, | ||
474 | .periph_buses = PL08X_AHB1, | ||
475 | }, { | ||
476 | .bus_id = "uart5_rx", | ||
477 | .min_signal = 8, | ||
478 | .max_signal = 8, | ||
479 | .muxval = 1, | ||
480 | .cctl = 0, | ||
481 | .periph_buses = PL08X_AHB1, | ||
482 | }, { | ||
483 | .bus_id = "uart5_tx", | ||
484 | .min_signal = 9, | ||
485 | .max_signal = 9, | ||
486 | .muxval = 1, | ||
487 | .cctl = 0, | ||
488 | .periph_buses = PL08X_AHB1, | ||
489 | }, { | ||
490 | .bus_id = "ras5_rx", | ||
491 | .min_signal = 10, | ||
492 | .max_signal = 10, | ||
493 | .muxval = 1, | ||
494 | .cctl = 0, | ||
495 | .periph_buses = PL08X_AHB1, | ||
496 | }, { | ||
497 | .bus_id = "ras5_tx", | ||
498 | .min_signal = 11, | ||
499 | .max_signal = 11, | ||
500 | .muxval = 1, | ||
501 | .cctl = 0, | ||
502 | .periph_buses = PL08X_AHB1, | ||
503 | }, { | ||
504 | .bus_id = "ras6_rx", | ||
505 | .min_signal = 12, | ||
506 | .max_signal = 12, | ||
507 | .muxval = 1, | ||
508 | .cctl = 0, | ||
509 | .periph_buses = PL08X_AHB1, | ||
510 | }, { | ||
511 | .bus_id = "ras6_tx", | ||
512 | .min_signal = 13, | ||
513 | .max_signal = 13, | ||
514 | .muxval = 1, | ||
515 | .cctl = 0, | ||
516 | .periph_buses = PL08X_AHB1, | ||
517 | }, { | ||
518 | .bus_id = "ras7_rx", | ||
519 | .min_signal = 14, | ||
520 | .max_signal = 14, | ||
521 | .muxval = 1, | ||
522 | .cctl = 0, | ||
523 | .periph_buses = PL08X_AHB1, | ||
524 | }, { | ||
525 | .bus_id = "ras7_tx", | ||
526 | .min_signal = 15, | ||
527 | .max_signal = 15, | ||
528 | .muxval = 1, | ||
529 | .cctl = 0, | ||
530 | .periph_buses = PL08X_AHB1, | ||
531 | }, | ||
532 | }; | ||
533 | |||
534 | /* uart devices plat data */ | ||
535 | static struct amba_pl011_data spear310_uart_data[] = { | ||
536 | { | ||
537 | .dma_filter = pl08x_filter_id, | ||
538 | .dma_tx_param = "uart1_tx", | ||
539 | .dma_rx_param = "uart1_rx", | ||
540 | }, { | ||
541 | .dma_filter = pl08x_filter_id, | ||
542 | .dma_tx_param = "uart2_tx", | ||
543 | .dma_rx_param = "uart2_rx", | ||
544 | }, { | ||
545 | .dma_filter = pl08x_filter_id, | ||
546 | .dma_tx_param = "uart3_tx", | ||
547 | .dma_rx_param = "uart3_rx", | ||
548 | }, { | ||
549 | .dma_filter = pl08x_filter_id, | ||
550 | .dma_tx_param = "uart4_tx", | ||
551 | .dma_rx_param = "uart4_rx", | ||
552 | }, { | ||
553 | .dma_filter = pl08x_filter_id, | ||
554 | .dma_tx_param = "uart5_tx", | ||
555 | .dma_rx_param = "uart5_rx", | ||
556 | }, | ||
557 | }; | ||
558 | |||
559 | /* Add SPEAr310 auxdata to pass platform data */ | ||
560 | static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = { | ||
561 | OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL, | ||
562 | &pl022_plat_data), | ||
563 | OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL, | ||
564 | &pl080_plat_data), | ||
565 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL, | ||
566 | &spear310_uart_data[0]), | ||
567 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL, | ||
568 | &spear310_uart_data[1]), | ||
569 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL, | ||
570 | &spear310_uart_data[2]), | ||
571 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL, | ||
572 | &spear310_uart_data[3]), | ||
573 | OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL, | ||
574 | &spear310_uart_data[4]), | ||
575 | {} | ||
576 | }; | ||
577 | |||
578 | static void __init spear310_dt_init(void) | ||
263 | { | 579 | { |
264 | void __iomem *base; | 580 | void __iomem *base; |
265 | int ret = 0; | 581 | int ret = 0; |
266 | 582 | ||
267 | /* call spear3xx family common init function */ | 583 | pl080_plat_data.slave_channels = spear310_dma_info; |
268 | spear3xx_init(); | 584 | pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info); |
585 | |||
586 | of_platform_populate(NULL, of_default_bus_match_table, | ||
587 | spear310_auxdata_lookup, NULL); | ||
269 | 588 | ||
270 | /* shared irq registration */ | 589 | /* shared irq registration */ |
271 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K); | 590 | base = ioremap(SPEAR310_SOC_CONFIG_BASE, SZ_4K); |
@@ -274,35 +593,59 @@ void __init spear310_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | |||
274 | shirq_ras1.regs.base = base; | 593 | shirq_ras1.regs.base = base; |
275 | ret = spear_shirq_register(&shirq_ras1); | 594 | ret = spear_shirq_register(&shirq_ras1); |
276 | if (ret) | 595 | if (ret) |
277 | printk(KERN_ERR "Error registering Shared IRQ 1\n"); | 596 | pr_err("Error registering Shared IRQ 1\n"); |
278 | 597 | ||
279 | /* shirq 2 */ | 598 | /* shirq 2 */ |
280 | shirq_ras2.regs.base = base; | 599 | shirq_ras2.regs.base = base; |
281 | ret = spear_shirq_register(&shirq_ras2); | 600 | ret = spear_shirq_register(&shirq_ras2); |
282 | if (ret) | 601 | if (ret) |
283 | printk(KERN_ERR "Error registering Shared IRQ 2\n"); | 602 | pr_err("Error registering Shared IRQ 2\n"); |
284 | 603 | ||
285 | /* shirq 3 */ | 604 | /* shirq 3 */ |
286 | shirq_ras3.regs.base = base; | 605 | shirq_ras3.regs.base = base; |
287 | ret = spear_shirq_register(&shirq_ras3); | 606 | ret = spear_shirq_register(&shirq_ras3); |
288 | if (ret) | 607 | if (ret) |
289 | printk(KERN_ERR "Error registering Shared IRQ 3\n"); | 608 | pr_err("Error registering Shared IRQ 3\n"); |
290 | 609 | ||
291 | /* shirq 4 */ | 610 | /* shirq 4 */ |
292 | shirq_intrcomm_ras.regs.base = base; | 611 | shirq_intrcomm_ras.regs.base = base; |
293 | ret = spear_shirq_register(&shirq_intrcomm_ras); | 612 | ret = spear_shirq_register(&shirq_intrcomm_ras); |
294 | if (ret) | 613 | if (ret) |
295 | printk(KERN_ERR "Error registering Shared IRQ 4\n"); | 614 | pr_err("Error registering Shared IRQ 4\n"); |
615 | } | ||
616 | |||
617 | if (of_machine_is_compatible("st,spear310-evb")) { | ||
618 | /* pmx initialization */ | ||
619 | pmx_driver.base = base; | ||
620 | pmx_driver.mode = NULL; | ||
621 | pmx_driver.devs = spear310_evb_pmx_devs; | ||
622 | pmx_driver.devs_count = ARRAY_SIZE(spear310_evb_pmx_devs); | ||
623 | |||
624 | ret = pmx_register(&pmx_driver); | ||
625 | if (ret) | ||
626 | pr_err("padmux: registration failed. err no: %d\n", | ||
627 | ret); | ||
296 | } | 628 | } |
629 | } | ||
297 | 630 | ||
298 | /* pmx initialization */ | 631 | static const char * const spear310_dt_board_compat[] = { |
299 | pmx_driver.base = base; | 632 | "st,spear310", |
300 | pmx_driver.mode = pmx_mode; | 633 | "st,spear310-evb", |
301 | pmx_driver.devs = pmx_devs; | 634 | NULL, |
302 | pmx_driver.devs_count = pmx_dev_count; | 635 | }; |
303 | 636 | ||
304 | ret = pmx_register(&pmx_driver); | 637 | static void __init spear310_map_io(void) |
305 | if (ret) | 638 | { |
306 | printk(KERN_ERR "padmux: registration failed. err no: %d\n", | 639 | spear3xx_map_io(); |
307 | ret); | 640 | spear310_clk_init(); |
308 | } | 641 | } |
642 | |||
643 | DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree") | ||
644 | .map_io = spear310_map_io, | ||
645 | .init_irq = spear3xx_dt_init_irq, | ||
646 | .handle_irq = vic_handle_irq, | ||
647 | .timer = &spear3xx_timer, | ||
648 | .init_machine = spear310_dt_init, | ||
649 | .restart = spear_restart, | ||
650 | .dt_compat = spear310_dt_board_compat, | ||
651 | MACHINE_END | ||