diff options
Diffstat (limited to 'arch/arm/mach-spear3xx/spear300.c')
-rw-r--r-- | arch/arm/mach-spear3xx/spear300.c | 103 |
1 files changed, 0 insertions, 103 deletions
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index 6ec300549960..a69cbfdb07ee 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -17,102 +17,9 @@ | |||
17 | #include <linux/of_platform.h> | 17 | #include <linux/of_platform.h> |
18 | #include <asm/hardware/vic.h> | 18 | #include <asm/hardware/vic.h> |
19 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
20 | #include <plat/shirq.h> | ||
21 | #include <mach/generic.h> | 20 | #include <mach/generic.h> |
22 | #include <mach/spear.h> | 21 | #include <mach/spear.h> |
23 | 22 | ||
24 | /* Base address of various IPs */ | ||
25 | #define SPEAR300_TELECOM_BASE UL(0x50000000) | ||
26 | |||
27 | /* Interrupt registers offsets and masks */ | ||
28 | #define SPEAR300_INT_ENB_MASK_REG 0x54 | ||
29 | #define SPEAR300_INT_STS_MASK_REG 0x58 | ||
30 | #define SPEAR300_IT_PERS_S_IRQ_MASK (1 << 0) | ||
31 | #define SPEAR300_IT_CHANGE_S_IRQ_MASK (1 << 1) | ||
32 | #define SPEAR300_I2S_IRQ_MASK (1 << 2) | ||
33 | #define SPEAR300_TDM_IRQ_MASK (1 << 3) | ||
34 | #define SPEAR300_CAMERA_L_IRQ_MASK (1 << 4) | ||
35 | #define SPEAR300_CAMERA_F_IRQ_MASK (1 << 5) | ||
36 | #define SPEAR300_CAMERA_V_IRQ_MASK (1 << 6) | ||
37 | #define SPEAR300_KEYBOARD_IRQ_MASK (1 << 7) | ||
38 | #define SPEAR300_GPIO1_IRQ_MASK (1 << 8) | ||
39 | |||
40 | #define SPEAR300_SHIRQ_RAS1_MASK 0x1FF | ||
41 | |||
42 | #define SPEAR300_SOC_CONFIG_BASE UL(0x99000000) | ||
43 | |||
44 | |||
45 | /* SPEAr300 Virtual irq definitions */ | ||
46 | /* IRQs sharing IRQ_GEN_RAS_1 */ | ||
47 | #define SPEAR300_VIRQ_IT_PERS_S (SPEAR3XX_VIRQ_START + 0) | ||
48 | #define SPEAR300_VIRQ_IT_CHANGE_S (SPEAR3XX_VIRQ_START + 1) | ||
49 | #define SPEAR300_VIRQ_I2S (SPEAR3XX_VIRQ_START + 2) | ||
50 | #define SPEAR300_VIRQ_TDM (SPEAR3XX_VIRQ_START + 3) | ||
51 | #define SPEAR300_VIRQ_CAMERA_L (SPEAR3XX_VIRQ_START + 4) | ||
52 | #define SPEAR300_VIRQ_CAMERA_F (SPEAR3XX_VIRQ_START + 5) | ||
53 | #define SPEAR300_VIRQ_CAMERA_V (SPEAR3XX_VIRQ_START + 6) | ||
54 | #define SPEAR300_VIRQ_KEYBOARD (SPEAR3XX_VIRQ_START + 7) | ||
55 | #define SPEAR300_VIRQ_GPIO1 (SPEAR3XX_VIRQ_START + 8) | ||
56 | |||
57 | /* IRQs sharing IRQ_GEN_RAS_3 */ | ||
58 | #define SPEAR300_IRQ_CLCD SPEAR3XX_IRQ_GEN_RAS_3 | ||
59 | |||
60 | /* IRQs sharing IRQ_INTRCOMM_RAS_ARM */ | ||
61 | #define SPEAR300_IRQ_SDHCI SPEAR3XX_IRQ_INTRCOMM_RAS_ARM | ||
62 | |||
63 | /* spear3xx shared irq */ | ||
64 | static struct shirq_dev_config shirq_ras1_config[] = { | ||
65 | { | ||
66 | .virq = SPEAR300_VIRQ_IT_PERS_S, | ||
67 | .enb_mask = SPEAR300_IT_PERS_S_IRQ_MASK, | ||
68 | .status_mask = SPEAR300_IT_PERS_S_IRQ_MASK, | ||
69 | }, { | ||
70 | .virq = SPEAR300_VIRQ_IT_CHANGE_S, | ||
71 | .enb_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK, | ||
72 | .status_mask = SPEAR300_IT_CHANGE_S_IRQ_MASK, | ||
73 | }, { | ||
74 | .virq = SPEAR300_VIRQ_I2S, | ||
75 | .enb_mask = SPEAR300_I2S_IRQ_MASK, | ||
76 | .status_mask = SPEAR300_I2S_IRQ_MASK, | ||
77 | }, { | ||
78 | .virq = SPEAR300_VIRQ_TDM, | ||
79 | .enb_mask = SPEAR300_TDM_IRQ_MASK, | ||
80 | .status_mask = SPEAR300_TDM_IRQ_MASK, | ||
81 | }, { | ||
82 | .virq = SPEAR300_VIRQ_CAMERA_L, | ||
83 | .enb_mask = SPEAR300_CAMERA_L_IRQ_MASK, | ||
84 | .status_mask = SPEAR300_CAMERA_L_IRQ_MASK, | ||
85 | }, { | ||
86 | .virq = SPEAR300_VIRQ_CAMERA_F, | ||
87 | .enb_mask = SPEAR300_CAMERA_F_IRQ_MASK, | ||
88 | .status_mask = SPEAR300_CAMERA_F_IRQ_MASK, | ||
89 | }, { | ||
90 | .virq = SPEAR300_VIRQ_CAMERA_V, | ||
91 | .enb_mask = SPEAR300_CAMERA_V_IRQ_MASK, | ||
92 | .status_mask = SPEAR300_CAMERA_V_IRQ_MASK, | ||
93 | }, { | ||
94 | .virq = SPEAR300_VIRQ_KEYBOARD, | ||
95 | .enb_mask = SPEAR300_KEYBOARD_IRQ_MASK, | ||
96 | .status_mask = SPEAR300_KEYBOARD_IRQ_MASK, | ||
97 | }, { | ||
98 | .virq = SPEAR300_VIRQ_GPIO1, | ||
99 | .enb_mask = SPEAR300_GPIO1_IRQ_MASK, | ||
100 | .status_mask = SPEAR300_GPIO1_IRQ_MASK, | ||
101 | }, | ||
102 | }; | ||
103 | |||
104 | static struct spear_shirq shirq_ras1 = { | ||
105 | .irq = SPEAR3XX_IRQ_GEN_RAS_1, | ||
106 | .dev_config = shirq_ras1_config, | ||
107 | .dev_count = ARRAY_SIZE(shirq_ras1_config), | ||
108 | .regs = { | ||
109 | .enb_reg = SPEAR300_INT_ENB_MASK_REG, | ||
110 | .status_reg = SPEAR300_INT_STS_MASK_REG, | ||
111 | .status_reg_mask = SPEAR300_SHIRQ_RAS1_MASK, | ||
112 | .clear_reg = -1, | ||
113 | }, | ||
114 | }; | ||
115 | |||
116 | /* DMAC platform data's slave info */ | 23 | /* DMAC platform data's slave info */ |
117 | struct pl08x_channel_data spear300_dma_info[] = { | 24 | struct pl08x_channel_data spear300_dma_info[] = { |
118 | { | 25 | { |
@@ -285,21 +192,11 @@ static struct of_dev_auxdata spear300_auxdata_lookup[] __initdata = { | |||
285 | 192 | ||
286 | static void __init spear300_dt_init(void) | 193 | static void __init spear300_dt_init(void) |
287 | { | 194 | { |
288 | int ret; | ||
289 | |||
290 | pl080_plat_data.slave_channels = spear300_dma_info; | 195 | pl080_plat_data.slave_channels = spear300_dma_info; |
291 | pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info); | 196 | pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear300_dma_info); |
292 | 197 | ||
293 | of_platform_populate(NULL, of_default_bus_match_table, | 198 | of_platform_populate(NULL, of_default_bus_match_table, |
294 | spear300_auxdata_lookup, NULL); | 199 | spear300_auxdata_lookup, NULL); |
295 | |||
296 | /* shared irq registration */ | ||
297 | shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K); | ||
298 | if (shirq_ras1.regs.base) { | ||
299 | ret = spear_shirq_register(&shirq_ras1); | ||
300 | if (ret) | ||
301 | pr_err("Error registering Shared IRQ\n"); | ||
302 | } | ||
303 | } | 200 | } |
304 | 201 | ||
305 | static const char * const spear300_dt_board_compat[] = { | 202 | static const char * const spear300_dt_board_compat[] = { |