1 files changed, 36 insertions, 99 deletions
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index dcca8568a486..63fd98356919 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -14,124 +14,61 @@
 #ifndef __MACH_SPEAR3XX_H
 #define __MACH_SPEAR3XX_H
-#include <mach/hardware.h>
+#include <asm/memory.h>
 #include <mach/spear300.h>
 #include <mach/spear310.h>
 #include <mach/spear320.h>
-#define SPEAR3XX_ML_SDRAM_BASE          0x00000000
+#define SPEAR3XX_ML_SDRAM_BASE          UL(0x00000000)
-#define SPEAR3XX_ML_SDRAM_SIZE          0x40000000
-#define SPEAR3XX_ICM9_BASE              0xC0000000
+#define SPEAR3XX_ICM9_BASE              UL(0xC0000000)
-#define SPEAR3XX_ICM9_SIZE              0x10000000
 /* ICM1 - Low speed connection */
-#define SPEAR3XX_ICM1_2_BASE            0xD0000000
+#define SPEAR3XX_ICM1_2_BASE            UL(0xD0000000)
-#define SPEAR3XX_ICM1_2_SIZE            0x10000000
+#define SPEAR3XX_ICM1_UART_BASE         UL(0xD0000000)
-#define SPEAR3XX_ICM1_UART_BASE         0xD0000000
 #define VA_SPEAR3XX_ICM1_UART_BASE      IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)
-#define SPEAR3XX_ICM1_UART_SIZE         0x00080000
+#define SPEAR3XX_ICM1_ADC_BASE          UL(0xD0080000)
+#define SPEAR3XX_ICM1_SSP_BASE          UL(0xD0100000)
-#define SPEAR3XX_ICM1_ADC_BASE          0xD0080000
+#define SPEAR3XX_ICM1_I2C_BASE          UL(0xD0180000)
-#define SPEAR3XX_ICM1_ADC_SIZE          0x00080000
+#define SPEAR3XX_ICM1_JPEG_BASE         UL(0xD0800000)
+#define SPEAR3XX_ICM1_IRDA_BASE         UL(0xD1000000)
-#define SPEAR3XX_ICM1_SSP_BASE          0xD0100000
+#define SPEAR3XX_ICM1_SRAM_BASE         UL(0xD2800000)
-#define SPEAR3XX_ICM1_SSP_SIZE          0x00080000
-#define SPEAR3XX_ICM1_I2C_BASE          0xD0180000
-#define SPEAR3XX_ICM1_I2C_SIZE          0x00080000
-#define SPEAR3XX_ICM1_JPEG_BASE         0xD0800000
-#define SPEAR3XX_ICM1_JPEG_SIZE         0x00800000
-#define SPEAR3XX_ICM1_IRDA_BASE         0xD1000000
-#define SPEAR3XX_ICM1_IRDA_SIZE         0x00080000
-#define SPEAR3XX_ICM1_SRAM_BASE         0xD2800000
-#define SPEAR3XX_ICM1_SRAM_SIZE         0x05800000
 /* ICM2 - Application Subsystem */
-#define SPEAR3XX_ICM2_HWACCEL0_BASE     0xD8800000
+#define SPEAR3XX_ICM2_HWACCEL0_BASE     UL(0xD8800000)
-#define SPEAR3XX_ICM2_HWACCEL0_SIZE     0x00800000
+#define SPEAR3XX_ICM2_HWACCEL1_BASE     UL(0xD9000000)
-#define SPEAR3XX_ICM2_HWACCEL1_BASE     0xD9000000
-#define SPEAR3XX_ICM2_HWACCEL1_SIZE     0x00800000
 /* ICM4 - High Speed Connection */
-#define SPEAR3XX_ICM4_BASE              0xE0000000
+#define SPEAR3XX_ICM4_BASE              UL(0xE0000000)
-#define SPEAR3XX_ICM4_SIZE              0x08000000
+#define SPEAR3XX_ICM4_MII_BASE          UL(0xE0800000)
+#define SPEAR3XX_ICM4_USBD_FIFO_BASE    UL(0xE1000000)
-#define SPEAR3XX_ICM4_MII_BASE          0xE0800000
+#define SPEAR3XX_ICM4_USBD_CSR_BASE     UL(0xE1100000)
-#define SPEAR3XX_ICM4_MII_SIZE          0x00800000
+#define SPEAR3XX_ICM4_USBD_PLDT_BASE    UL(0xE1200000)
+#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE  UL(0xE1800000)
-#define SPEAR3XX_ICM4_USBD_FIFO_BASE    0xE1000000
+#define SPEAR3XX_ICM4_USB_OHCI0_BASE    UL(0xE1900000)
-#define SPEAR3XX_ICM4_USBD_FIFO_SIZE    0x00100000
+#define SPEAR3XX_ICM4_USB_OHCI1_BASE    UL(0xE2100000)
+#define SPEAR3XX_ICM4_USB_ARB_BASE      UL(0xE2800000)
-#define SPEAR3XX_ICM4_USBD_CSR_BASE     0xE1100000
-#define SPEAR3XX_ICM4_USBD_CSR_SIZE     0x00100000
-#define SPEAR3XX_ICM4_USBD_PLDT_BASE    0xE1200000
-#define SPEAR3XX_ICM4_USBD_PLDT_SIZE    0x00100000
-#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE  0xE1800000
-#define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE  0x00100000
-#define SPEAR3XX_ICM4_USB_OHCI0_BASE    0xE1900000
-#define SPEAR3XX_ICM4_USB_OHCI0_SIZE    0x00100000
-#define SPEAR3XX_ICM4_USB_OHCI1_BASE    0xE2100000
-#define SPEAR3XX_ICM4_USB_OHCI1_SIZE    0x00100000
-#define SPEAR3XX_ICM4_USB_ARB_BASE      0xE2800000
-#define SPEAR3XX_ICM4_USB_ARB_SIZE      0x00010000
 /* ML1 - Multi Layer CPU Subsystem */
-#define SPEAR3XX_ICM3_ML1_2_BASE        0xF0000000
+#define SPEAR3XX_ICM3_ML1_2_BASE        UL(0xF0000000)
-#define SPEAR3XX_ICM3_ML1_2_SIZE        0x0F000000
+#define SPEAR3XX_ML1_TMR_BASE           UL(0xF0000000)
+#define SPEAR3XX_ML1_VIC_BASE           UL(0xF1100000)
-#define SPEAR3XX_ML1_TMR_BASE           0xF0000000
-#define SPEAR3XX_ML1_TMR_SIZE           0x00100000
-#define SPEAR3XX_ML1_VIC_BASE           0xF1100000
 #define VA_SPEAR3XX_ML1_VIC_BASE        IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)
-#define SPEAR3XX_ML1_VIC_SIZE           0x00100000
 /* ICM3 - Basic Subsystem */
-#define SPEAR3XX_ICM3_SMEM_BASE         0xF8000000
+#define SPEAR3XX_ICM3_SMEM_BASE         UL(0xF8000000)
-#define SPEAR3XX_ICM3_SMEM_SIZE         0x04000000
+#define SPEAR3XX_ICM3_SMI_CTRL_BASE     UL(0xFC000000)
+#define SPEAR3XX_ICM3_DMA_BASE          UL(0xFC400000)
-#define SPEAR3XX_ICM3_SMI_CTRL_BASE     0xFC000000
+#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE   UL(0xFC600000)
-#define SPEAR3XX_ICM3_SMI_CTRL_SIZE     0x00200000
+#define SPEAR3XX_ICM3_TMR0_BASE         UL(0xFC800000)
+#define SPEAR3XX_ICM3_WDT_BASE          UL(0xFC880000)
-#define SPEAR3XX_ICM3_DMA_BASE          0xFC400000
+#define SPEAR3XX_ICM3_RTC_BASE          UL(0xFC900000)
-#define SPEAR3XX_ICM3_DMA_SIZE          0x00200000
+#define SPEAR3XX_ICM3_GPIO_BASE         UL(0xFC980000)
+#define SPEAR3XX_ICM3_SYS_CTRL_BASE     UL(0xFCA00000)
-#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE   0xFC600000
-#define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE   0x00200000
-#define SPEAR3XX_ICM3_TMR0_BASE         0xFC800000
-#define SPEAR3XX_ICM3_TMR0_SIZE         0x00080000
-#define SPEAR3XX_ICM3_WDT_BASE          0xFC880000
-#define SPEAR3XX_ICM3_WDT_SIZE          0x00080000
-#define SPEAR3XX_ICM3_RTC_BASE          0xFC900000
-#define SPEAR3XX_ICM3_RTC_SIZE          0x00080000
-#define SPEAR3XX_ICM3_GPIO_BASE         0xFC980000
-#define SPEAR3XX_ICM3_GPIO_SIZE         0x00080000
-#define SPEAR3XX_ICM3_SYS_CTRL_BASE     0xFCA00000
 #define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE  IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)
-#define SPEAR3XX_ICM3_SYS_CTRL_SIZE     0x00080000
+#define SPEAR3XX_ICM3_MISC_REG_BASE     UL(0xFCA80000)
-#define SPEAR3XX_ICM3_MISC_REG_BASE     0xFCA80000
 #define VA_SPEAR3XX_ICM3_MISC_REG_BASE  IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)
-#define SPEAR3XX_ICM3_MISC_REG_SIZE     0x00080000
+#define SPEAR3XX_ICM3_TMR1_BASE         UL(0xFCB00000)
-#define SPEAR3XX_ICM3_TMR1_BASE         0xFCB00000
-#define SPEAR3XX_ICM3_TMR1_SIZE         0x00080000
 /* Debug uart for linux, will be used for debug and uncompress messages */
 #define SPEAR_DBG_UART_BASE             SPEAR3XX_ICM1_UART_BASE

diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h index dcca8568a486..63fd98356919 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear.h +++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -14,124 +14,61 @@
14	#ifndef __MACH_SPEAR3XX_H	14	#ifndef __MACH_SPEAR3XX_H
15	#define __MACH_SPEAR3XX_H	15	#define __MACH_SPEAR3XX_H
16		16
17	#include <mach/hardware.h>	17	#include <asm/memory.h>
18	#include <mach/spear300.h>	18	#include <mach/spear300.h>
19	#include <mach/spear310.h>	19	#include <mach/spear310.h>
20	#include <mach/spear320.h>	20	#include <mach/spear320.h>
21		21
22	#define SPEAR3XX_ML_SDRAM_BASE 0x00000000	22	#define SPEAR3XX_ML_SDRAM_BASE UL(0x00000000)
23	#define SPEAR3XX_ML_SDRAM_SIZE 0x40000000
24		23
25	#define SPEAR3XX_ICM9_BASE 0xC0000000	24	#define SPEAR3XX_ICM9_BASE UL(0xC0000000)
26	#define SPEAR3XX_ICM9_SIZE 0x10000000
27		25
28	/* ICM1 - Low speed connection */	26	/* ICM1 - Low speed connection */
29	#define SPEAR3XX_ICM1_2_BASE 0xD0000000	27	#define SPEAR3XX_ICM1_2_BASE UL(0xD0000000)
30	#define SPEAR3XX_ICM1_2_SIZE 0x10000000	28	#define SPEAR3XX_ICM1_UART_BASE UL(0xD0000000)
31
32	#define SPEAR3XX_ICM1_UART_BASE 0xD0000000
33	#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)	29	#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE)
34	#define SPEAR3XX_ICM1_UART_SIZE 0x00080000	30	#define SPEAR3XX_ICM1_ADC_BASE UL(0xD0080000)
35		31	#define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
36	#define SPEAR3XX_ICM1_ADC_BASE 0xD0080000	32	#define SPEAR3XX_ICM1_I2C_BASE UL(0xD0180000)
37	#define SPEAR3XX_ICM1_ADC_SIZE 0x00080000	33	#define SPEAR3XX_ICM1_JPEG_BASE UL(0xD0800000)
38		34	#define SPEAR3XX_ICM1_IRDA_BASE UL(0xD1000000)
39	#define SPEAR3XX_ICM1_SSP_BASE 0xD0100000	35	#define SPEAR3XX_ICM1_SRAM_BASE UL(0xD2800000)
40	#define SPEAR3XX_ICM1_SSP_SIZE 0x00080000
41
42	#define SPEAR3XX_ICM1_I2C_BASE 0xD0180000
43	#define SPEAR3XX_ICM1_I2C_SIZE 0x00080000
44
45	#define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000
46	#define SPEAR3XX_ICM1_JPEG_SIZE 0x00800000
47
48	#define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000
49	#define SPEAR3XX_ICM1_IRDA_SIZE 0x00080000
50
51	#define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000
52	#define SPEAR3XX_ICM1_SRAM_SIZE 0x05800000
53		36
54	/* ICM2 - Application Subsystem */	37	/* ICM2 - Application Subsystem */
55	#define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000	38	#define SPEAR3XX_ICM2_HWACCEL0_BASE UL(0xD8800000)
56	#define SPEAR3XX_ICM2_HWACCEL0_SIZE 0x00800000	39	#define SPEAR3XX_ICM2_HWACCEL1_BASE UL(0xD9000000)
57
58	#define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000
59	#define SPEAR3XX_ICM2_HWACCEL1_SIZE 0x00800000
60		40
61	/* ICM4 - High Speed Connection */	41	/* ICM4 - High Speed Connection */
62	#define SPEAR3XX_ICM4_BASE 0xE0000000	42	#define SPEAR3XX_ICM4_BASE UL(0xE0000000)
63	#define SPEAR3XX_ICM4_SIZE 0x08000000	43	#define SPEAR3XX_ICM4_MII_BASE UL(0xE0800000)
64		44	#define SPEAR3XX_ICM4_USBD_FIFO_BASE UL(0xE1000000)
65	#define SPEAR3XX_ICM4_MII_BASE 0xE0800000	45	#define SPEAR3XX_ICM4_USBD_CSR_BASE UL(0xE1100000)
66	#define SPEAR3XX_ICM4_MII_SIZE 0x00800000	46	#define SPEAR3XX_ICM4_USBD_PLDT_BASE UL(0xE1200000)
67		47	#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE UL(0xE1800000)
68	#define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000	48	#define SPEAR3XX_ICM4_USB_OHCI0_BASE UL(0xE1900000)
69	#define SPEAR3XX_ICM4_USBD_FIFO_SIZE 0x00100000	49	#define SPEAR3XX_ICM4_USB_OHCI1_BASE UL(0xE2100000)
70		50	#define SPEAR3XX_ICM4_USB_ARB_BASE UL(0xE2800000)
71	#define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000
72	#define SPEAR3XX_ICM4_USBD_CSR_SIZE 0x00100000
73
74	#define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000
75	#define SPEAR3XX_ICM4_USBD_PLDT_SIZE 0x00100000
76
77	#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000
78	#define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE 0x00100000
79
80	#define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000
81	#define SPEAR3XX_ICM4_USB_OHCI0_SIZE 0x00100000
82
83	#define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000
84	#define SPEAR3XX_ICM4_USB_OHCI1_SIZE 0x00100000
85
86	#define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000
87	#define SPEAR3XX_ICM4_USB_ARB_SIZE 0x00010000
88		51
89	/* ML1 - Multi Layer CPU Subsystem */	52	/* ML1 - Multi Layer CPU Subsystem */
90	#define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000	53	#define SPEAR3XX_ICM3_ML1_2_BASE UL(0xF0000000)
91	#define SPEAR3XX_ICM3_ML1_2_SIZE 0x0F000000	54	#define SPEAR3XX_ML1_TMR_BASE UL(0xF0000000)
92		55	#define SPEAR3XX_ML1_VIC_BASE UL(0xF1100000)
93	#define SPEAR3XX_ML1_TMR_BASE 0xF0000000
94	#define SPEAR3XX_ML1_TMR_SIZE 0x00100000
95
96	#define SPEAR3XX_ML1_VIC_BASE 0xF1100000
97	#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)	56	#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE)
98	#define SPEAR3XX_ML1_VIC_SIZE 0x00100000
99		57
100	/* ICM3 - Basic Subsystem */	58	/* ICM3 - Basic Subsystem */
101	#define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000	59	#define SPEAR3XX_ICM3_SMEM_BASE UL(0xF8000000)
102	#define SPEAR3XX_ICM3_SMEM_SIZE 0x04000000	60	#define SPEAR3XX_ICM3_SMI_CTRL_BASE UL(0xFC000000)
103		61	#define SPEAR3XX_ICM3_DMA_BASE UL(0xFC400000)
104	#define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000	62	#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE UL(0xFC600000)
105	#define SPEAR3XX_ICM3_SMI_CTRL_SIZE 0x00200000	63	#define SPEAR3XX_ICM3_TMR0_BASE UL(0xFC800000)
106		64	#define SPEAR3XX_ICM3_WDT_BASE UL(0xFC880000)
107	#define SPEAR3XX_ICM3_DMA_BASE 0xFC400000	65	#define SPEAR3XX_ICM3_RTC_BASE UL(0xFC900000)
108	#define SPEAR3XX_ICM3_DMA_SIZE 0x00200000	66	#define SPEAR3XX_ICM3_GPIO_BASE UL(0xFC980000)
109		67	#define SPEAR3XX_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
110	#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000
111	#define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE 0x00200000
112
113	#define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000
114	#define SPEAR3XX_ICM3_TMR0_SIZE 0x00080000
115
116	#define SPEAR3XX_ICM3_WDT_BASE 0xFC880000
117	#define SPEAR3XX_ICM3_WDT_SIZE 0x00080000
118
119	#define SPEAR3XX_ICM3_RTC_BASE 0xFC900000
120	#define SPEAR3XX_ICM3_RTC_SIZE 0x00080000
121
122	#define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000
123	#define SPEAR3XX_ICM3_GPIO_SIZE 0x00080000
124
125	#define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000
126	#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)	68	#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE)
127	#define SPEAR3XX_ICM3_SYS_CTRL_SIZE 0x00080000	69	#define SPEAR3XX_ICM3_MISC_REG_BASE UL(0xFCA80000)
128
129	#define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000
130	#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)	70	#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE)
131	#define SPEAR3XX_ICM3_MISC_REG_SIZE 0x00080000	71	#define SPEAR3XX_ICM3_TMR1_BASE UL(0xFCB00000)
132
133	#define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000
134	#define SPEAR3XX_ICM3_TMR1_SIZE 0x00080000
135		72
136	/* Debug uart for linux, will be used for debug and uncompress messages */	73	/* Debug uart for linux, will be used for debug and uncompress messages */
137	#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE	74	#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE