10 files changed, 392 insertions, 158 deletions

diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c
index 22a2b44ddb7b..46ca4d4abf91 100644
--- a/arch/arm/mach-shmobile/board-ap4evb.c
+++ b/arch/arm/mach-shmobile/board-ap4evb.c
@@ -30,7 +30,6 @@
 #include <linux/mtd/mtd.h>
 #include <linux/mtd/partitions.h>
 #include <linux/mtd/physmap.h>
-#include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
 #include <linux/i2c.h>
 #include <linux/i2c/tsc2007.h>
@@ -44,6 +43,10 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/usb/r8a66597.h>
 
+#include <media/sh_mobile_ceu.h>
+#include <media/sh_mobile_csi2.h>
+#include <media/soc_camera.h>
+
 #include <sound/sh_fsi.h>
 
 #include <video/sh_mobile_hdmi.h>
@@ -250,7 +253,7 @@ static int slot_cn7_get_cd(struct platform_device *pdev)
 /* SH_MMCIF */
 static struct resource sh_mmcif_resources[] = {
         [0] = {
-                .name   = "SH_MMCIF",
+                .name   = "MMCIF",
                 .start  = 0xE6BD0000,
                 .end    = 0xE6BD00FF,
                 .flags  = IORESOURCE_MEM,
@@ -390,10 +393,40 @@ static struct platform_device usb1_host_device = {
         .resource       = usb1_host_resources,
 };
 
+const static struct fb_videomode ap4evb_lcdc_modes[] = {
+        {
+#ifdef CONFIG_AP4EVB_QHD
+                .name           = "R63302(QHD)",
+                .xres           = 544,
+                .yres           = 961,
+                .left_margin    = 72,
+                .right_margin   = 600,
+                .hsync_len      = 16,
+                .upper_margin   = 8,
+                .lower_margin   = 8,
+                .vsync_len      = 2,
+                .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+#else
+                .name           = "WVGA Panel",
+                .xres           = 800,
+                .yres           = 480,
+                .left_margin    = 220,
+                .right_margin   = 110,
+                .hsync_len      = 70,
+                .upper_margin   = 20,
+                .lower_margin   = 5,
+                .vsync_len      = 5,
+                .sync           = 0,
+#endif
+        },
+};
+
 static struct sh_mobile_lcdc_info lcdc_info = {
         .ch[0] = {
                 .chan = LCDC_CHAN_MAINLCD,
                 .bpp = 16,
+                .lcd_cfg = ap4evb_lcdc_modes,
+                .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
         }
 };
 
@@ -532,27 +565,6 @@ static struct platform_device *qhd_devices[] __initdata = {
 
 /* FSI */
 #define IRQ_FSI         evt2irq(0x1840)
-#define FSIACKCR        0xE6150018
-static void fsiackcr_init(struct clk *clk)
-{
-        u32 status = __raw_readl(clk->enable_reg);
-
-        /* use external clock */
-        status &= ~0x000000ff;
-        status |= 0x00000080;
-        __raw_writel(status, clk->enable_reg);
-}
-
-static struct clk_ops fsiackcr_clk_ops = {
-        .init = fsiackcr_init,
-};
-
-static struct clk fsiackcr_clk = {
-        .ops            = &fsiackcr_clk_ops,
-        .enable_reg     = (void __iomem *)FSIACKCR,
-        .rate           = 0, /* unknown */
-};
-
 static struct sh_fsi_platform_info fsi_info = {
         .porta_flags = SH_FSI_BRS_INV |
                        SH_FSI_OUT_SLAVE_MODE |
@@ -592,26 +604,6 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
                 .interface_type = RGB24,
                 .clock_divider = 1,
                 .flags = LCDC_FLAGS_DWPOL,
-                .lcd_cfg = {
-                        .name = "HDMI",
-                        /* So far only 720p is supported */
-                        .xres = 1280,
-                        .yres = 720,
-                        /*
-                         * If left and right margins are not multiples of 8,
-                         * LDHAJR will be adjusted accordingly by the LCDC
-                         * driver. Until we start using EDID, these values
-                         * might have to be adjusted for different monitors.
-                         */
-                        .left_margin = 200,
-                        .right_margin = 88,
-                        .hsync_len = 48,
-                        .upper_margin = 20,
-                        .lower_margin = 5,
-                        .vsync_len = 5,
-                        .pixclock = 13468,
-                        .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
-                },
         }
 };
 
@@ -623,7 +615,7 @@ static struct resource lcdc1_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         [1] = {
-                .start  = intcs_evt2irq(0x17a0),
+                .start  = intcs_evt2irq(0x1780),
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -704,6 +696,95 @@ static struct platform_device leds_device = {
         },
 };
 
+static struct i2c_board_info imx074_info = {
+        I2C_BOARD_INFO("imx074", 0x1a),
+};
+
+struct soc_camera_link imx074_link = {
+        .bus_id         = 0,
+        .board_info     = &imx074_info,
+        .i2c_adapter_id = 0,
+        .module_name    = "imx074",
+};
+
+static struct platform_device ap4evb_camera = {
+        .name   = "soc-camera-pdrv",
+        .id     = 0,
+        .dev    = {
+                .platform_data = &imx074_link,
+        },
+};
+
+static struct sh_csi2_client_config csi2_clients[] = {
+        {
+                .phy            = SH_CSI2_PHY_MAIN,
+                .lanes          = 3,
+                .channel        = 0,
+                .pdev           = &ap4evb_camera,
+        },
+};
+
+static struct sh_csi2_pdata csi2_info = {
+        .type           = SH_CSI2C,
+        .clients        = csi2_clients,
+        .num_clients    = ARRAY_SIZE(csi2_clients),
+        .flags          = SH_CSI2_ECC | SH_CSI2_CRC,
+};
+
+static struct resource csi2_resources[] = {
+        [0] = {
+                .name   = "CSI2",
+                .start  = 0xffc90000,
+                .end    = 0xffc90fff,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0x17a0),
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device csi2_device = {
+        .name   = "sh-mobile-csi2",
+        .id     = 0,
+        .num_resources  = ARRAY_SIZE(csi2_resources),
+        .resource       = csi2_resources,
+        .dev    = {
+                .platform_data = &csi2_info,
+        },
+};
+
+static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
+        .flags = SH_CEU_FLAG_USE_8BIT_BUS,
+        .csi2_dev = &csi2_device.dev,
+};
+
+static struct resource ceu_resources[] = {
+        [0] = {
+                .name   = "CEU",
+                .start  = 0xfe910000,
+                .end    = 0xfe91009f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0x880),
+                .flags  = IORESOURCE_IRQ,
+        },
+        [2] = {
+                /* place holder for contiguous memory */
+        },
+};
+
+static struct platform_device ceu_device = {
+        .name           = "sh_mobile_ceu",
+        .id             = 0, /* "ceu0" clock */
+        .num_resources  = ARRAY_SIZE(ceu_resources),
+        .resource       = ceu_resources,
+        .dev    = {
+                .platform_data  = &sh_mobile_ceu_info,
+        },
+};
+
 static struct platform_device *ap4evb_devices[] __initdata = {
         &leds_device,
         &nor_flash_device,
@@ -716,6 +797,9 @@ static struct platform_device *ap4evb_devices[] __initdata = {
         &lcdc1_device,
         &lcdc_device,
         &hdmi_device,
+        &csi2_device,
+        &ceu_device,
+        &ap4evb_camera,
 };
 
 static int __init hdmi_init_pm_clock(void)
@@ -730,22 +814,22 @@ static int __init hdmi_init_pm_clock(void)
                 goto out;
         }
 
-        ret = clk_set_parent(&pllc2_clk, &dv_clki_div2_clk);
+        ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
         if (ret < 0) {
-                pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, pllc2_clk.usecount);
+                pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
                 goto out;
         }
 
-        pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&pllc2_clk));
+        pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
 
-        rate = clk_round_rate(&pllc2_clk, 594000000);
+        rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
         if (rate < 0) {
                 pr_err("Cannot get suitable rate: %ld\n", rate);
                 ret = rate;
                 goto out;
         }
 
-        ret = clk_set_rate(&pllc2_clk, rate);
+        ret = clk_set_rate(&sh7372_pllc2_clk, rate);
         if (ret < 0) {
                 pr_err("Cannot set rate %ld: %d\n", rate, ret);
                 goto out;
@@ -753,7 +837,7 @@ static int __init hdmi_init_pm_clock(void)
 
         pr_debug("PLLC2 set frequency %lu\n", rate);
 
-        ret = clk_set_parent(hdmi_ick, &pllc2_clk);
+        ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
         if (ret < 0) {
                 pr_err("Cannot set HDMI parent: %d\n", ret);
                 goto out;
@@ -767,11 +851,51 @@ out:
 
 device_initcall(hdmi_init_pm_clock);
 
+#define FSIACK_DUMMY_RATE 48000
+static int __init fsi_init_pm_clock(void)
+{
+        struct clk *fsia_ick;
+        int ret;
+
+        /*
+         * FSIACK is connected to AK4642,
+         * and the rate is depend on playing sound rate.
+         * So, set dummy rate (= 48k) here
+         */
+        ret = clk_set_rate(&sh7372_fsiack_clk, FSIACK_DUMMY_RATE);
+        if (ret < 0) {
+                pr_err("Cannot set FSIACK dummy rate: %d\n", ret);
+                return ret;
+        }
+
+        fsia_ick = clk_get(&fsi_device.dev, "icka");
+        if (IS_ERR(fsia_ick)) {
+                ret = PTR_ERR(fsia_ick);
+                pr_err("Cannot get FSI ICK: %d\n", ret);
+                return ret;
+        }
+
+        ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
+        if (ret < 0) {
+                pr_err("Cannot set FSI-A parent: %d\n", ret);
+                goto out;
+        }
+
+        ret = clk_set_rate(fsia_ick, FSIACK_DUMMY_RATE);
+        if (ret < 0)
+                pr_err("Cannot set FSI-A rate: %d\n", ret);
+
+out:
+        clk_put(fsia_ick);
+
+        return ret;
+}
+device_initcall(fsi_init_pm_clock);
+
 /*
  * FIXME !!
  *
  * gpio_no_direction
- * gpio_pull_up
  * are quick_hack.
  *
  * current gpio frame work doesn't have
@@ -783,49 +907,37 @@ static void __init gpio_no_direction(u32 addr)
         __raw_writeb(0x00, addr);
 }
 
-static void __init gpio_pull_up(u32 addr)
-{
-        u8 data = __raw_readb(addr);
-
-        data &= 0x0F;
-        data |= 0xC0;
-        __raw_writeb(data, addr);
-}
-
 /* TouchScreen */
+#ifdef CONFIG_AP4EVB_QHD
+# define GPIO_TSC_IRQ   GPIO_FN_IRQ28_123
+# define GPIO_TSC_PORT  GPIO_PORT123
+#else /* WVGA */
+# define GPIO_TSC_IRQ   GPIO_FN_IRQ7_40
+# define GPIO_TSC_PORT  GPIO_PORT40
+#endif
+
 #define IRQ28   evt2irq(0x3380) /* IRQ28A */
 #define IRQ7    evt2irq(0x02e0) /* IRQ7A */
 static int ts_get_pendown_state(void)
 {
-        int val1, val2;
+        int val;
 
-        gpio_free(GPIO_FN_IRQ28_123);
-        gpio_free(GPIO_FN_IRQ7_40);
+        gpio_free(GPIO_TSC_IRQ);
 
-        gpio_request(GPIO_PORT123, NULL);
-        gpio_request(GPIO_PORT40, NULL);
+        gpio_request(GPIO_TSC_PORT, NULL);
 
-        gpio_direction_input(GPIO_PORT123);
-        gpio_direction_input(GPIO_PORT40);
+        gpio_direction_input(GPIO_TSC_PORT);
 
-        val1 = gpio_get_value(GPIO_PORT123);
-        val2 = gpio_get_value(GPIO_PORT40);
+        val = gpio_get_value(GPIO_TSC_PORT);
 
-        gpio_request(GPIO_FN_IRQ28_123, NULL);  /* for QHD */
-        gpio_request(GPIO_FN_IRQ7_40, NULL);    /* for WVGA */
+        gpio_request(GPIO_TSC_IRQ, NULL);
 
-        return val1 ^ val2;
+        return !val;
 }
 
-#define PORT40CR        0xE6051028
-#define PORT123CR       0xE605007B
 static int ts_init(void)
 {
-        gpio_request(GPIO_FN_IRQ28_123, NULL);  /* for QHD */
-        gpio_request(GPIO_FN_IRQ7_40, NULL);    /* for WVGA */
-
-        gpio_pull_up(PORT40CR);
-        gpio_pull_up(PORT123CR);
+        gpio_request(GPIO_TSC_IRQ, NULL);
 
         return 0;
 }
@@ -974,14 +1086,6 @@ static void __init ap4evb_init(void)
                 clk_put(clk);
         }
 
-        /* change parent of FSI A */
-        clk = clk_get(NULL, "fsia_clk");
-        if (!IS_ERR(clk)) {
-                clk_register(&fsiackcr_clk);
-                clk_set_parent(clk, &fsiackcr_clk);
-                clk_put(clk);
-        }
-
         /*
          * set irq priority, to avoid sound chopping
          * when NFS rootfs is used
@@ -996,8 +1100,10 @@ static void __init ap4evb_init(void)
                                 ARRAY_SIZE(i2c1_devices));
 
 #ifdef CONFIG_AP4EVB_QHD
+
         /*
-         * QHD
+         * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
+         * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
          */
 
         /* enable KEYSC */
@@ -1023,17 +1129,6 @@ static void __init ap4evb_init(void)
         lcdc_info.ch[0].interface_type          = RGB24;
         lcdc_info.ch[0].clock_divider           = 1;
         lcdc_info.ch[0].flags                   = LCDC_FLAGS_DWPOL;
-        lcdc_info.ch[0].lcd_cfg.name            = "R63302(QHD)";
-        lcdc_info.ch[0].lcd_cfg.xres            = 544;
-        lcdc_info.ch[0].lcd_cfg.yres            = 961;
-        lcdc_info.ch[0].lcd_cfg.left_margin     = 72;
-        lcdc_info.ch[0].lcd_cfg.right_margin    = 600;
-        lcdc_info.ch[0].lcd_cfg.hsync_len       = 16;
-        lcdc_info.ch[0].lcd_cfg.upper_margin    = 8;
-        lcdc_info.ch[0].lcd_cfg.lower_margin    = 8;
-        lcdc_info.ch[0].lcd_cfg.vsync_len       = 2;
-        lcdc_info.ch[0].lcd_cfg.sync            = FB_SYNC_VERT_HIGH_ACT |
-                                                  FB_SYNC_HOR_HIGH_ACT;
         lcdc_info.ch[0].lcd_size_cfg.width      = 44;
         lcdc_info.ch[0].lcd_size_cfg.height     = 79;
 
@@ -1041,8 +1136,10 @@ static void __init ap4evb_init(void)
 
 #else
         /*
-         * WVGA
+         * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
+         * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
          */
+
         gpio_request(GPIO_FN_LCDD17,   NULL);
         gpio_request(GPIO_FN_LCDD16,   NULL);
         gpio_request(GPIO_FN_LCDD15,   NULL);
@@ -1074,16 +1171,6 @@ static void __init ap4evb_init(void)
         lcdc_info.ch[0].interface_type          = RGB18;
         lcdc_info.ch[0].clock_divider           = 2;
         lcdc_info.ch[0].flags                   = 0;
-        lcdc_info.ch[0].lcd_cfg.name            = "WVGA Panel";
-        lcdc_info.ch[0].lcd_cfg.xres            = 800;
-        lcdc_info.ch[0].lcd_cfg.yres            = 480;
-        lcdc_info.ch[0].lcd_cfg.left_margin     = 220;
-        lcdc_info.ch[0].lcd_cfg.right_margin    = 110;
-        lcdc_info.ch[0].lcd_cfg.hsync_len       = 70;
-        lcdc_info.ch[0].lcd_cfg.upper_margin    = 20;
-        lcdc_info.ch[0].lcd_cfg.lower_margin    = 5;
-        lcdc_info.ch[0].lcd_cfg.vsync_len       = 5;
-        lcdc_info.ch[0].lcd_cfg.sync            = 0;
         lcdc_info.ch[0].lcd_size_cfg.width      = 152;
         lcdc_info.ch[0].lcd_size_cfg.height     = 91;
 
@@ -1094,6 +1181,23 @@ static void __init ap4evb_init(void)
         i2c_register_board_info(0, &tsc_device, 1);
 #endif /* CONFIG_AP4EVB_QHD */
 
+        /* CEU */
+
+        /*
+         * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
+         * becomes available
+         */
+
+        /* MIPI-CSI stuff */
+        gpio_request(GPIO_FN_VIO_CKO, NULL);
+
+        clk = clk_get(NULL, "vck1_clk");
+        if (!IS_ERR(clk)) {
+                clk_set_rate(clk, clk_round_rate(clk, 13000000));
+                clk_enable(clk);
+                clk_put(clk);
+        }
+
         sh7372_add_standard_devices();
 
         /* HDMI */
@@ -1116,7 +1220,7 @@ static void __init ap4evb_timer_init(void)
         shmobile_timer.init();
 
         /* External clock source */
-        clk_set_rate(&dv_clki_clk, 27000000);
+        clk_set_rate(&sh7372_dv_clki_clk, 27000000);
 }
 
 static struct sys_timer ap4evb_timer = {
diff --git a/arch/arm/mach-shmobile/clock-sh7367.c b/arch/arm/mach-shmobile/clock-sh7367.c
index b6454c9f2abb..9f78729098f2 100644
--- a/arch/arm/mach-shmobile/clock-sh7367.c
+++ b/arch/arm/mach-shmobile/clock-sh7367.c
@@ -321,7 +321,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[SYMSTP001]), /* SCIFA3 */
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[SYMSTP000]), /* SCIFA4 */
         CLKDEV_DEV_ID("sh_siu", &mstp_clks[SYMSTP231]), /* SIU */
-        CLKDEV_CON_ID("cmt1", &mstp_clks[SYMSTP229]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[SYMSTP229]), /* CMT10 */
         CLKDEV_DEV_ID("sh_irda", &mstp_clks[SYMSTP225]), /* IRDA */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[SYMSTP223]), /* IIC1 */
         CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[SYMSTP222]), /* USBHS */
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 759468992ad2..8565aefa21fd 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -51,7 +51,7 @@
 #define SMSTPCR4        0xe6150140
 
 /* Platforms must set frequency on their DV_CLKI pin */
-struct clk dv_clki_clk = {
+struct clk sh7372_dv_clki_clk = {
 };
 
 /* Fixed 32 KHz root clock from EXTALR pin */
@@ -86,9 +86,9 @@ static struct clk_ops div2_clk_ops = {
 };
 
 /* Divide dv_clki by two */
-struct clk dv_clki_div2_clk = {
+struct clk sh7372_dv_clki_div2_clk = {
         .ops            = &div2_clk_ops,
-        .parent         = &dv_clki_clk,
+        .parent         = &sh7372_dv_clki_clk,
 };
 
 /* Divide extal1 by two */
@@ -150,7 +150,7 @@ static struct clk pllc1_div2_clk = {
 static struct clk *pllc2_parent[] = {
         [0] = &extal1_div2_clk,
         [1] = &extal2_div2_clk,
-        [2] = &dv_clki_div2_clk,
+        [2] = &sh7372_dv_clki_div2_clk,
 };
 
 /* Only multipliers 20 * 2 to 46 * 2 are valid, last entry for CPUFREQ_TABLE_END */
@@ -284,7 +284,7 @@ static struct clk_ops pllc2_clk_ops = {
         .set_parent     = pllc2_set_parent,
 };
 
-struct clk pllc2_clk = {
+struct clk sh7372_pllc2_clk = {
         .ops            = &pllc2_clk_ops,
         .parent         = &extal1_div2_clk,
         .freq_table     = pllc2_freq_table,
@@ -292,19 +292,28 @@ struct clk pllc2_clk = {
         .parent_num     = ARRAY_SIZE(pllc2_parent),
 };
 
+/* External input clock (pin name: FSIACK/FSIBCK ) */
+struct clk sh7372_fsiack_clk = {
+};
+
+struct clk sh7372_fsibck_clk = {
+};
+
 static struct clk *main_clks[] = {
-        &dv_clki_clk,
+        &sh7372_dv_clki_clk,
         &r_clk,
         &sh7372_extal1_clk,
         &sh7372_extal2_clk,
-        &dv_clki_div2_clk,
+        &sh7372_dv_clki_div2_clk,
         &extal1_div2_clk,
         &extal2_div2_clk,
         &extal2_div4_clk,
         &pllc0_clk,
         &pllc1_clk,
         &pllc1_div2_clk,
-        &pllc2_clk,
+        &sh7372_pllc2_clk,
+        &sh7372_fsiack_clk,
+        &sh7372_fsibck_clk,
 };
 
 static void div4_kick(struct clk *clk)
@@ -357,7 +366,7 @@ static struct clk div4_clks[DIV4_NR] = {
 };
 
 enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_FMSI, DIV6_FMSO,
-       DIV6_FSIA, DIV6_FSIB, DIV6_SUB, DIV6_SPU,
+       DIV6_SUB, DIV6_SPU,
        DIV6_VOU, DIV6_DSIT, DIV6_DSI0P, DIV6_DSI1P,
        DIV6_NR };
 
@@ -367,8 +376,6 @@ static struct clk div6_clks[DIV6_NR] = {
         [DIV6_VCK3] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR3, 0),
         [DIV6_FMSI] = SH_CLK_DIV6(&pllc1_div2_clk, FMSICKCR, 0),
         [DIV6_FMSO] = SH_CLK_DIV6(&pllc1_div2_clk, FMSOCKCR, 0),
-        [DIV6_FSIA] = SH_CLK_DIV6(&pllc1_div2_clk, FSIACKCR, 0),
-        [DIV6_FSIB] = SH_CLK_DIV6(&pllc1_div2_clk, FSIBCKCR, 0),
         [DIV6_SUB] = SH_CLK_DIV6(&sh7372_extal2_clk, SUBCKCR, 0),
         [DIV6_SPU] = SH_CLK_DIV6(&pllc1_div2_clk, SPUCKCR, 0),
         [DIV6_VOU] = SH_CLK_DIV6(&pllc1_div2_clk, VOUCKCR, 0),
@@ -377,24 +384,42 @@ static struct clk div6_clks[DIV6_NR] = {
         [DIV6_DSI1P] = SH_CLK_DIV6(&pllc1_div2_clk, DSI1PCKCR, 0),
 };
 
-enum { DIV6_HDMI, DIV6_REPARENT_NR };
+enum { DIV6_HDMI, DIV6_FSIA, DIV6_FSIB, DIV6_REPARENT_NR };
 
 /* Indices are important - they are the actual src selecting values */
 static struct clk *hdmi_parent[] = {
         [0] = &pllc1_div2_clk,
-        [1] = &pllc2_clk,
-        [2] = &dv_clki_clk,
+        [1] = &sh7372_pllc2_clk,
+        [2] = &sh7372_dv_clki_clk,
         [3] = NULL,     /* pllc2_div4 not implemented yet */
 };
 
+static struct clk *fsiackcr_parent[] = {
+        [0] = &pllc1_div2_clk,
+        [1] = &sh7372_pllc2_clk,
+        [2] = &sh7372_fsiack_clk, /* external input for FSI A */
+        [3] = NULL,     /* setting prohibited */
+};
+
+static struct clk *fsibckcr_parent[] = {
+        [0] = &pllc1_div2_clk,
+        [1] = &sh7372_pllc2_clk,
+        [2] = &sh7372_fsibck_clk, /* external input for FSI B */
+        [3] = NULL,     /* setting prohibited */
+};
+
 static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
         [DIV6_HDMI] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, HDMICKCR, 0,
                                       hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
+        [DIV6_FSIA] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIACKCR, 0,
+                                      fsiackcr_parent, ARRAY_SIZE(fsiackcr_parent), 6, 2),
+        [DIV6_FSIB] = SH_CLK_DIV6_EXT(&pllc1_div2_clk, FSIBCKCR, 0,
+                                      fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
 };
 
 enum { MSTP001,
        MSTP131, MSTP130,
-       MSTP129, MSTP128, MSTP127, MSTP126,
+       MSTP129, MSTP128, MSTP127, MSTP126, MSTP125,
        MSTP118, MSTP117, MSTP116,
        MSTP106, MSTP101, MSTP100,
        MSTP223,
@@ -414,6 +439,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* VEU0 */
         [MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU */
         [MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2 */
+        [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
         [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX */
         [MSTP117] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 17, 0), /* LCDC1 */
         [MSTP116] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 16, 0), /* IIC0 */
@@ -429,7 +455,7 @@ static struct clk mstp_clks[MSTP_NR] = {
         [MSTP201] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 1, 0), /* SCIFA3 */
         [MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
         [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
-        [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSIA */
+        [MSTP328] = MSTP(&div6_clks[DIV6_SPU], SMSTPCR3, 28, 0), /* FSI2 */
         [MSTP323] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
         [MSTP322] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 22, 0), /* USB0 */
         [MSTP314] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 14, 0), /* SDHI0 */
@@ -445,10 +471,11 @@ static struct clk mstp_clks[MSTP_NR] = {
 
 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
+#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
 
 static struct clk_lookup lookups[] = {
         /* main clocks */
-        CLKDEV_CON_ID("dv_clki_div2_clk", &dv_clki_div2_clk),
+        CLKDEV_CON_ID("dv_clki_div2_clk", &sh7372_dv_clki_div2_clk),
         CLKDEV_CON_ID("r_clk", &r_clk),
         CLKDEV_CON_ID("extal1", &sh7372_extal1_clk),
         CLKDEV_CON_ID("extal2", &sh7372_extal2_clk),
@@ -458,7 +485,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("pllc0_clk", &pllc0_clk),
         CLKDEV_CON_ID("pllc1_clk", &pllc1_clk),
         CLKDEV_CON_ID("pllc1_div2_clk", &pllc1_div2_clk),
-        CLKDEV_CON_ID("pllc2_clk", &pllc2_clk),
+        CLKDEV_CON_ID("pllc2_clk", &sh7372_pllc2_clk),
 
         /* DIV4 clocks */
         CLKDEV_CON_ID("i_clk", &div4_clks[DIV4_I]),
@@ -483,8 +510,8 @@ static struct clk_lookup lookups[] = {
         CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
         CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
         CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
-        CLKDEV_CON_ID("fsia_clk", &div6_clks[DIV6_FSIA]),
-        CLKDEV_CON_ID("fsib_clk", &div6_clks[DIV6_FSIB]),
+        CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FSIA]),
+        CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FSIB]),
         CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
         CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
         CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
@@ -501,6 +528,8 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
         CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
         CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
+        CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
+        CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
         CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
         CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP117]), /* LCDC1 */
         CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
@@ -516,7 +545,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP202]), /* SCIFA2 */
         CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
-        CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
         CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
         CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */
@@ -531,7 +560,10 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("r8a66597_hcd.1", &mstp_clks[MSTP406]), /* USB1 */
         CLKDEV_DEV_ID("r8a66597_udc.1", &mstp_clks[MSTP406]), /* USB1 */
         CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[MSTP403]), /* KEYSC */
-        {.con_id = "ick", .dev_id = "sh-mobile-hdmi", .clk = &div6_reparent_clks[DIV6_HDMI]},
+
+        CLKDEV_ICK_ID("ick", "sh-mobile-hdmi", &div6_reparent_clks[DIV6_HDMI]),
+        CLKDEV_ICK_ID("icka", "sh_fsi2", &div6_reparent_clks[DIV6_FSIA]),
+        CLKDEV_ICK_ID("ickb", "sh_fsi2", &div6_reparent_clks[DIV6_FSIB]),
 };
 
 void __init sh7372_clock_init(void)
@@ -548,7 +580,7 @@ void __init sh7372_clock_init(void)
                 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
 
         if (!ret)
-                ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_NR);
+                ret = sh_clk_div6_reparent_register(div6_reparent_clks, DIV6_REPARENT_NR);
 
         if (!ret)
                 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
diff --git a/arch/arm/mach-shmobile/clock-sh7377.c b/arch/arm/mach-shmobile/clock-sh7377.c
index e007c28cf0a8..f91395aeb9ab 100644
--- a/arch/arm/mach-shmobile/clock-sh7377.c
+++ b/arch/arm/mach-shmobile/clock-sh7377.c
@@ -333,7 +333,7 @@ static struct clk_lookup lookups[] = {
         CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP201]), /* SCIFA3 */
         CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
         CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
-        CLKDEV_CON_ID("cmt1", &mstp_clks[MSTP329]), /* CMT10 */
+        CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
         CLKDEV_DEV_ID("sh_irda", &mstp_clks[MSTP325]), /* IRDA */
         CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
         CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USBHS */
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 33e9700ded7e..147775a94bce 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -457,8 +457,12 @@ enum {
         SHDMA_SLAVE_SDHI2_TX,
 };
 
-extern struct clk dv_clki_clk;
-extern struct clk dv_clki_div2_clk;
-extern struct clk pllc2_clk;
+extern struct clk sh7372_extal1_clk;
+extern struct clk sh7372_extal2_clk;
+extern struct clk sh7372_dv_clki_clk;
+extern struct clk sh7372_dv_clki_div2_clk;
+extern struct clk sh7372_pllc2_clk;
+extern struct clk sh7372_fsiack_clk;
+extern struct clk sh7372_fsibck_clk;
 
 #endif /* __ASM_SH7372_H__ */
diff --git a/arch/arm/mach-shmobile/intc-sh7372.c b/arch/arm/mach-shmobile/intc-sh7372.c
index e3551b56cd03..4cd3cae38e72 100644
--- a/arch/arm/mach-shmobile/intc-sh7372.c
+++ b/arch/arm/mach-shmobile/intc-sh7372.c
@@ -369,9 +369,13 @@ enum {
         INTCS,
 
         /* interrupt sources INTCS */
+
+        /* IRQ0S - IRQ31S */
         VEU_VEU0, VEU_VEU1, VEU_VEU2, VEU_VEU3,
         RTDMAC_1_DEI0, RTDMAC_1_DEI1, RTDMAC_1_DEI2, RTDMAC_1_DEI3,
         CEU, BEU_BEU0, BEU_BEU1, BEU_BEU2,
+        /* MFI */
+        /* BBIF2 */
         VPU,
         TSIF1,
         _3DG_SGX530,
@@ -379,13 +383,17 @@ enum {
         IIC2_ALI2, IIC2_TACKI2, IIC2_WAITI2, IIC2_DTEI2,
         IPMMU_IPMMUR, IPMMU_IPMMUR2,
         RTDMAC_2_DEI4, RTDMAC_2_DEI5, RTDMAC_2_DADERR,
+        /* KEYSC */
+        /* TTI20 */
         MSIOF,
         IIC0_ALI0, IIC0_TACKI0, IIC0_WAITI0, IIC0_DTEI0,
         TMU_TUNI0, TMU_TUNI1, TMU_TUNI2,
         CMT0,
         TSIF0,
+        /* CMT2 */
         LMB,
         CTI,
+        /* RWDT0 */
         ICB,
         JPU_JPEG,
         LCDC,
@@ -397,11 +405,17 @@ enum {
         CSIRX,
         DSITX_DSITX0,
         DSITX_DSITX1,
+        /* SPU2 */
+        /* FSI */
+        /* FMSI */
+        /* HDMI */
         TMU1_TUNI0, TMU1_TUNI1, TMU1_TUNI2,
         CMT4,
         DSITX1_DSITX1_0,
         DSITX1_DSITX1_1,
+        /* MFIS2 */
         CPORTS2R,
+        /* CEC */
         JPU6E,
 
         /* interrupt groups INTCS */
@@ -410,12 +424,15 @@ enum {
 };
 
 static struct intc_vect intcs_vectors[] = {
+        /* IRQ0S - IRQ31S */
         INTCS_VECT(VEU_VEU0, 0x700), INTCS_VECT(VEU_VEU1, 0x720),
         INTCS_VECT(VEU_VEU2, 0x740), INTCS_VECT(VEU_VEU3, 0x760),
         INTCS_VECT(RTDMAC_1_DEI0, 0x800), INTCS_VECT(RTDMAC_1_DEI1, 0x820),
         INTCS_VECT(RTDMAC_1_DEI2, 0x840), INTCS_VECT(RTDMAC_1_DEI3, 0x860),
         INTCS_VECT(CEU, 0x880), INTCS_VECT(BEU_BEU0, 0x8a0),
         INTCS_VECT(BEU_BEU1, 0x8c0), INTCS_VECT(BEU_BEU2, 0x8e0),
+        /* MFI */
+        /* BBIF2 */
         INTCS_VECT(VPU, 0x980),
         INTCS_VECT(TSIF1, 0x9a0),
         INTCS_VECT(_3DG_SGX530, 0x9e0),
@@ -425,14 +442,19 @@ static struct intc_vect intcs_vectors[] = {
         INTCS_VECT(IPMMU_IPMMUR, 0xb00), INTCS_VECT(IPMMU_IPMMUR2, 0xb20),
         INTCS_VECT(RTDMAC_2_DEI4, 0xb80), INTCS_VECT(RTDMAC_2_DEI5, 0xba0),
         INTCS_VECT(RTDMAC_2_DADERR, 0xbc0),
+        /* KEYSC */
+        /* TTI20 */
+        INTCS_VECT(MSIOF, 0x0d20),
         INTCS_VECT(IIC0_ALI0, 0xe00), INTCS_VECT(IIC0_TACKI0, 0xe20),
         INTCS_VECT(IIC0_WAITI0, 0xe40), INTCS_VECT(IIC0_DTEI0, 0xe60),
         INTCS_VECT(TMU_TUNI0, 0xe80), INTCS_VECT(TMU_TUNI1, 0xea0),
         INTCS_VECT(TMU_TUNI2, 0xec0),
         INTCS_VECT(CMT0, 0xf00),
         INTCS_VECT(TSIF0, 0xf20),
+        /* CMT2 */
         INTCS_VECT(LMB, 0xf60),
         INTCS_VECT(CTI, 0x400),
+        /* RWDT0 */
         INTCS_VECT(ICB, 0x480),
         INTCS_VECT(JPU_JPEG, 0x560),
         INTCS_VECT(LCDC, 0x580),
@@ -446,12 +468,18 @@ static struct intc_vect intcs_vectors[] = {
         INTCS_VECT(CSIRX, 0x17a0),
         INTCS_VECT(DSITX_DSITX0, 0x17c0),
         INTCS_VECT(DSITX_DSITX1, 0x17e0),
+        /* SPU2 */
+        /* FSI */
+        /* FMSI */
+        /* HDMI */
         INTCS_VECT(TMU1_TUNI0, 0x1900), INTCS_VECT(TMU1_TUNI1, 0x1920),
         INTCS_VECT(TMU1_TUNI2, 0x1940),
         INTCS_VECT(CMT4, 0x1980),
         INTCS_VECT(DSITX1_DSITX1_0, 0x19a0),
         INTCS_VECT(DSITX1_DSITX1_1, 0x19c0),
+        /* MFIS2 */
         INTCS_VECT(CPORTS2R, 0x1a20),
+        /* CEC */
         INTCS_VECT(JPU6E, 0x1a80),
 
         INTC_VECT(INTCS, 0xf80),
diff --git a/arch/arm/mach-shmobile/pfc-sh7372.c b/arch/arm/mach-shmobile/pfc-sh7372.c
index ec420353f8e3..9c265dae138a 100644
--- a/arch/arm/mach-shmobile/pfc-sh7372.c
+++ b/arch/arm/mach-shmobile/pfc-sh7372.c
@@ -166,12 +166,12 @@ enum {
         MSIOF2_TSYNC_MARK,      MSIOF2_TSCK_MARK,       MSIOF2_RXD_MARK,
         MSIOF2_TXD_MARK,
 
-        /* MSIOF3 */
+        /* BBIF1 */
         BBIF1_RXD_MARK,         BBIF1_TSYNC_MARK,       BBIF1_TSCK_MARK,
         BBIF1_TXD_MARK,         BBIF1_RSCK_MARK,        BBIF1_RSYNC_MARK,
         BBIF1_FLOW_MARK,        BB_RX_FLOW_N_MARK,
 
-        /* MSIOF4 */
+        /* BBIF2 */
         BBIF2_TSCK1_MARK,       BBIF2_TSYNC1_MARK,
         BBIF2_TXD1_MARK,        BBIF2_RXD_MARK,
 
@@ -976,12 +976,12 @@ static struct pinmux_gpio pinmux_gpios[] = {
         GPIO_FN(MSIOF2_TSYNC),  GPIO_FN(MSIOF2_TSCK),   GPIO_FN(MSIOF2_RXD),
         GPIO_FN(MSIOF2_TXD),
 
-        /* MSIOF3 */
+        /* BBIF1 */
         GPIO_FN(BBIF1_RXD),     GPIO_FN(BBIF1_TSYNC),   GPIO_FN(BBIF1_TSCK),
         GPIO_FN(BBIF1_TXD),     GPIO_FN(BBIF1_RSCK),    GPIO_FN(BBIF1_RSYNC),
         GPIO_FN(BBIF1_FLOW),    GPIO_FN(BB_RX_FLOW_N),
 
-        /* MSIOF4 */
+        /* BBIF2 */
         GPIO_FN(BBIF2_TSCK1),   GPIO_FN(BBIF2_TSYNC1),
         GPIO_FN(BBIF2_TXD1),    GPIO_FN(BBIF2_RXD),
 
diff --git a/arch/arm/mach-shmobile/setup-sh7367.c b/arch/arm/mach-shmobile/setup-sh7367.c
index 3148c11a550e..003008c18360 100644
--- a/arch/arm/mach-shmobile/setup-sh7367.c
+++ b/arch/arm/mach-shmobile/setup-sh7367.c
@@ -154,7 +154,6 @@ static struct sh_timer_config cmt10_platform_data = {
         .name = "CMT10",
         .channel_offset = 0x10,
         .timer_bit = 0,
-        .clk = "r_clk",
         .clockevent_rating = 125,
         .clocksource_rating = 125,
 };
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index e26686c9d0b6..564a6d0be473 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -158,7 +158,6 @@ static struct sh_timer_config cmt10_platform_data = {
         .name = "CMT10",
         .channel_offset = 0x10,
         .timer_bit = 0,
-        .clk = "cmt1",
         .clockevent_rating = 125,
         .clocksource_rating = 125,
 };
@@ -186,6 +185,67 @@ static struct platform_device cmt10_device = {
         .num_resources  = ARRAY_SIZE(cmt10_resources),
 };
 
+/* TMU */
+static struct sh_timer_config tmu00_platform_data = {
+        .name = "TMU00",
+        .channel_offset = 0x4,
+        .timer_bit = 0,
+        .clockevent_rating = 200,
+};
+
+static struct resource tmu00_resources[] = {
+        [0] = {
+                .name   = "TMU00",
+                .start  = 0xfff60008,
+                .end    = 0xfff60013,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0xe80), /* TMU_TUNI0 */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu00_device = {
+        .name           = "sh_tmu",
+        .id             = 0,
+        .dev = {
+                .platform_data  = &tmu00_platform_data,
+        },
+        .resource       = tmu00_resources,
+        .num_resources  = ARRAY_SIZE(tmu00_resources),
+};
+
+static struct sh_timer_config tmu01_platform_data = {
+        .name = "TMU01",
+        .channel_offset = 0x10,
+        .timer_bit = 1,
+        .clocksource_rating = 200,
+};
+
+static struct resource tmu01_resources[] = {
+        [0] = {
+                .name   = "TMU01",
+                .start  = 0xfff60014,
+                .end    = 0xfff6001f,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = intcs_evt2irq(0xea0), /* TMU_TUNI1 */
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+static struct platform_device tmu01_device = {
+        .name           = "sh_tmu",
+        .id             = 1,
+        .dev = {
+                .platform_data  = &tmu01_platform_data,
+        },
+        .resource       = tmu01_resources,
+        .num_resources  = ARRAY_SIZE(tmu01_resources),
+};
+
 /* I2C */
 static struct resource iic0_resources[] = {
         [0] = {
@@ -419,14 +479,14 @@ static struct resource sh7372_dmae0_resources[] = {
         },
         {
                 /* DMA error IRQ */
-                .start  = 246,
-                .end    = 246,
+                .start  = evt2irq(0x20c0),
+                .end    = evt2irq(0x20c0),
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 0-5 */
-                .start  = 240,
-                .end    = 245,
+                .start  = evt2irq(0x2000),
+                .end    = evt2irq(0x20a0),
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -447,14 +507,14 @@ static struct resource sh7372_dmae1_resources[] = {
         },
         {
                 /* DMA error IRQ */
-                .start  = 254,
-                .end    = 254,
+                .start  = evt2irq(0x21c0),
+                .end    = evt2irq(0x21c0),
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 0-5 */
-                .start  = 248,
-                .end    = 253,
+                .start  = evt2irq(0x2100),
+                .end    = evt2irq(0x21a0),
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -475,14 +535,14 @@ static struct resource sh7372_dmae2_resources[] = {
         },
         {
                 /* DMA error IRQ */
-                .start  = 262,
-                .end    = 262,
+                .start  = evt2irq(0x22c0),
+                .end    = evt2irq(0x22c0),
                 .flags  = IORESOURCE_IRQ,
         },
         {
                 /* IRQ for channels 0-5 */
-                .start  = 256,
-                .end    = 261,
+                .start  = evt2irq(0x2200),
+                .end    = evt2irq(0x22a0),
                 .flags  = IORESOURCE_IRQ,
         },
 };
@@ -526,6 +586,11 @@ static struct platform_device *sh7372_early_devices[] __initdata = {
         &scif5_device,
         &scif6_device,
         &cmt10_device,
+        &tmu00_device,
+        &tmu01_device,
+};
+
+static struct platform_device *sh7372_late_devices[] __initdata = {
         &iic0_device,
         &iic1_device,
         &dma0_device,
@@ -537,6 +602,9 @@ void __init sh7372_add_standard_devices(void)
 {
         platform_add_devices(sh7372_early_devices,
                             ARRAY_SIZE(sh7372_early_devices));
+
+        platform_add_devices(sh7372_late_devices,
+                            ARRAY_SIZE(sh7372_late_devices));
 }
 
 void __init sh7372_add_early_devices(void)
diff --git a/arch/arm/mach-shmobile/setup-sh7377.c b/arch/arm/mach-shmobile/setup-sh7377.c
index bb4adf17dbf4..575dbd6c2f1d 100644
--- a/arch/arm/mach-shmobile/setup-sh7377.c
+++ b/arch/arm/mach-shmobile/setup-sh7377.c
@@ -172,7 +172,6 @@ static struct sh_timer_config cmt10_platform_data = {
         .name = "CMT10",
         .channel_offset = 0x10,
         .timer_bit = 0,
-        .clk = "r_clk",
         .clockevent_rating = 125,
         .clocksource_rating = 125,
 };