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Diffstat (limited to 'arch/arm/mach-shmobile/smp-sh73a0.c')
-rw-r--r--arch/arm/mach-shmobile/smp-sh73a0.c36
1 files changed, 16 insertions, 20 deletions
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c
index d0f9aca22477..bf79626ee5a4 100644
--- a/arch/arm/mach-shmobile/smp-sh73a0.c
+++ b/arch/arm/mach-shmobile/smp-sh73a0.c
@@ -38,26 +38,16 @@
38 38
39#define PSTR_SHUTDOWN_MODE 3 39#define PSTR_SHUTDOWN_MODE 3
40 40
41static void __iomem *scu_base_addr(void) 41#define SH73A0_SCU_BASE 0xf0000000
42{
43 return (void __iomem *)0xf0000000;
44}
45 42
46#ifdef CONFIG_HAVE_ARM_TWD 43#ifdef CONFIG_HAVE_ARM_TWD
47static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29); 44static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, SH73A0_SCU_BASE + 0x600, 29);
48void __init sh73a0_register_twd(void) 45void __init sh73a0_register_twd(void)
49{ 46{
50 twd_local_timer_register(&twd_local_timer); 47 twd_local_timer_register(&twd_local_timer);
51} 48}
52#endif 49#endif
53 50
54static unsigned int __init sh73a0_get_core_count(void)
55{
56 void __iomem *scu_base = scu_base_addr();
57
58 return scu_get_core_count(scu_base);
59}
60
61static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) 51static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
62{ 52{
63 cpu = cpu_logical_map(cpu); 53 cpu = cpu_logical_map(cpu);
@@ -72,21 +62,22 @@ static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct
72 62
73static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) 63static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
74{ 64{
75 scu_enable(scu_base_addr()); 65 scu_enable(shmobile_scu_base);
76 66
77 /* Map the reset vector (in headsmp-sh73a0.S) */ 67 /* Map the reset vector (in headsmp-scu.S) */
78 __raw_writel(0, APARMBAREA); /* 4k */ 68 __raw_writel(0, APARMBAREA); /* 4k */
79 __raw_writel(__pa(sh73a0_secondary_vector), SBAR); 69 __raw_writel(__pa(shmobile_secondary_vector_scu), SBAR);
80 70
81 /* enable cache coherency on booting CPU */ 71 /* enable cache coherency on booting CPU */
82 scu_power_mode(scu_base_addr(), SCU_PM_NORMAL); 72 scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
83} 73}
84 74
85static void __init sh73a0_smp_init_cpus(void) 75static void __init sh73a0_smp_init_cpus(void)
86{ 76{
87 unsigned int ncores = sh73a0_get_core_count(); 77 /* setup sh73a0 specific SCU base */
78 shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
88 79
89 shmobile_smp_init_cpus(ncores); 80 shmobile_smp_init_cpus(scu_get_core_count(shmobile_scu_base));
90} 81}
91 82
92#ifdef CONFIG_HOTPLUG_CPU 83#ifdef CONFIG_HOTPLUG_CPU
@@ -122,11 +113,16 @@ static void sh73a0_cpu_die(unsigned int cpu)
122 flush_cache_all(); 113 flush_cache_all();
123 114
124 /* Set power off mode. This takes the CPU out of the MP cluster */ 115 /* Set power off mode. This takes the CPU out of the MP cluster */
125 scu_power_mode(scu_base_addr(), SCU_PM_POWEROFF); 116 scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
126 117
127 /* Enter shutdown mode */ 118 /* Enter shutdown mode */
128 cpu_do_idle(); 119 cpu_do_idle();
129} 120}
121
122static int sh73a0_cpu_disable(unsigned int cpu)
123{
124 return 0; /* CPU0 and CPU1 supported */
125}
130#endif /* CONFIG_HOTPLUG_CPU */ 126#endif /* CONFIG_HOTPLUG_CPU */
131 127
132struct smp_operations sh73a0_smp_ops __initdata = { 128struct smp_operations sh73a0_smp_ops __initdata = {
@@ -136,6 +132,6 @@ struct smp_operations sh73a0_smp_ops __initdata = {
136#ifdef CONFIG_HOTPLUG_CPU 132#ifdef CONFIG_HOTPLUG_CPU
137 .cpu_kill = sh73a0_cpu_kill, 133 .cpu_kill = sh73a0_cpu_kill,
138 .cpu_die = sh73a0_cpu_die, 134 .cpu_die = sh73a0_cpu_die,
139 .cpu_disable = shmobile_cpu_disable_any, 135 .cpu_disable = sh73a0_cpu_disable,
140#endif 136#endif
141}; 137};