diff options
Diffstat (limited to 'arch/arm/mach-shmobile/setup-sh73a0.c')
-rw-r--r-- | arch/arm/mach-shmobile/setup-sh73a0.c | 126 |
1 files changed, 126 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 2257a915746d..638735f78e36 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c | |||
@@ -33,6 +33,7 @@ | |||
33 | #include <linux/sh_intc.h> | 33 | #include <linux/sh_intc.h> |
34 | #include <linux/sh_timer.h> | 34 | #include <linux/sh_timer.h> |
35 | #include <linux/platform_data/sh_ipmmu.h> | 35 | #include <linux/platform_data/sh_ipmmu.h> |
36 | #include <linux/platform_data/irq-renesas-intc-irqpin.h> | ||
36 | #include <mach/dma-register.h> | 37 | #include <mach/dma-register.h> |
37 | #include <mach/hardware.h> | 38 | #include <mach/hardware.h> |
38 | #include <mach/irqs.h> | 39 | #include <mach/irqs.h> |
@@ -811,6 +812,127 @@ static struct platform_device ipmmu_device = { | |||
811 | .num_resources = ARRAY_SIZE(ipmmu_resources), | 812 | .num_resources = ARRAY_SIZE(ipmmu_resources), |
812 | }; | 813 | }; |
813 | 814 | ||
815 | struct renesas_intc_irqpin_config irqpin0_platform_data = { | ||
816 | .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ | ||
817 | }; | ||
818 | |||
819 | static struct resource irqpin0_resources[] = { | ||
820 | DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ | ||
821 | DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ | ||
822 | DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ | ||
823 | DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ | ||
824 | DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ | ||
825 | DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ | ||
826 | DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ | ||
827 | DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ | ||
828 | DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ | ||
829 | DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ | ||
830 | DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ | ||
831 | DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ | ||
832 | DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ | ||
833 | }; | ||
834 | |||
835 | static struct platform_device irqpin0_device = { | ||
836 | .name = "renesas_intc_irqpin", | ||
837 | .id = 0, | ||
838 | .resource = irqpin0_resources, | ||
839 | .num_resources = ARRAY_SIZE(irqpin0_resources), | ||
840 | .dev = { | ||
841 | .platform_data = &irqpin0_platform_data, | ||
842 | }, | ||
843 | }; | ||
844 | |||
845 | struct renesas_intc_irqpin_config irqpin1_platform_data = { | ||
846 | .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ | ||
847 | .control_parent = true, /* Disable spurious IRQ10 */ | ||
848 | }; | ||
849 | |||
850 | static struct resource irqpin1_resources[] = { | ||
851 | DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ | ||
852 | DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ | ||
853 | DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ | ||
854 | DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ | ||
855 | DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ | ||
856 | DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ | ||
857 | DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ | ||
858 | DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ | ||
859 | DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ | ||
860 | DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ | ||
861 | DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ | ||
862 | DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ | ||
863 | DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ | ||
864 | }; | ||
865 | |||
866 | static struct platform_device irqpin1_device = { | ||
867 | .name = "renesas_intc_irqpin", | ||
868 | .id = 1, | ||
869 | .resource = irqpin1_resources, | ||
870 | .num_resources = ARRAY_SIZE(irqpin1_resources), | ||
871 | .dev = { | ||
872 | .platform_data = &irqpin1_platform_data, | ||
873 | }, | ||
874 | }; | ||
875 | |||
876 | struct renesas_intc_irqpin_config irqpin2_platform_data = { | ||
877 | .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ | ||
878 | }; | ||
879 | |||
880 | static struct resource irqpin2_resources[] = { | ||
881 | DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ | ||
882 | DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ | ||
883 | DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ | ||
884 | DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ | ||
885 | DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ | ||
886 | DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ | ||
887 | DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ | ||
888 | DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ | ||
889 | DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ | ||
890 | DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ | ||
891 | DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ | ||
892 | DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ | ||
893 | DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ | ||
894 | }; | ||
895 | |||
896 | static struct platform_device irqpin2_device = { | ||
897 | .name = "renesas_intc_irqpin", | ||
898 | .id = 2, | ||
899 | .resource = irqpin2_resources, | ||
900 | .num_resources = ARRAY_SIZE(irqpin2_resources), | ||
901 | .dev = { | ||
902 | .platform_data = &irqpin2_platform_data, | ||
903 | }, | ||
904 | }; | ||
905 | |||
906 | struct renesas_intc_irqpin_config irqpin3_platform_data = { | ||
907 | .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ | ||
908 | }; | ||
909 | |||
910 | static struct resource irqpin3_resources[] = { | ||
911 | DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ | ||
912 | DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ | ||
913 | DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ | ||
914 | DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ | ||
915 | DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ | ||
916 | DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ | ||
917 | DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ | ||
918 | DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ | ||
919 | DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ | ||
920 | DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ | ||
921 | DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ | ||
922 | DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ | ||
923 | DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ | ||
924 | }; | ||
925 | |||
926 | static struct platform_device irqpin3_device = { | ||
927 | .name = "renesas_intc_irqpin", | ||
928 | .id = 3, | ||
929 | .resource = irqpin3_resources, | ||
930 | .num_resources = ARRAY_SIZE(irqpin3_resources), | ||
931 | .dev = { | ||
932 | .platform_data = &irqpin3_platform_data, | ||
933 | }, | ||
934 | }; | ||
935 | |||
814 | static struct platform_device *sh73a0_devices_dt[] __initdata = { | 936 | static struct platform_device *sh73a0_devices_dt[] __initdata = { |
815 | &scif0_device, | 937 | &scif0_device, |
816 | &scif1_device, | 938 | &scif1_device, |
@@ -839,6 +961,10 @@ static struct platform_device *sh73a0_late_devices[] __initdata = { | |||
839 | &dma0_device, | 961 | &dma0_device, |
840 | &mpdma0_device, | 962 | &mpdma0_device, |
841 | &pmu_device, | 963 | &pmu_device, |
964 | &irqpin0_device, | ||
965 | &irqpin1_device, | ||
966 | &irqpin2_device, | ||
967 | &irqpin3_device, | ||
842 | }; | 968 | }; |
843 | 969 | ||
844 | #define SRCR2 IOMEM(0xe61580b0) | 970 | #define SRCR2 IOMEM(0xe61580b0) |