diff options
Diffstat (limited to 'arch/arm/mach-shmobile/setup-sh7372.c')
| -rw-r--r-- | arch/arm/mach-shmobile/setup-sh7372.c | 160 |
1 files changed, 29 insertions, 131 deletions
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index 311878391e18..27301278c208 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c | |||
| @@ -86,138 +86,36 @@ void __init sh7372_pinmux_init(void) | |||
| 86 | platform_device_register(&sh7372_pfc_device); | 86 | platform_device_register(&sh7372_pfc_device); |
| 87 | } | 87 | } |
| 88 | 88 | ||
| 89 | /* SCIFA0 */ | 89 | /* SCIF */ |
| 90 | static struct plat_sci_port scif0_platform_data = { | 90 | #define SH7372_SCIF(scif_type, index, baseaddr, irq) \ |
| 91 | .mapbase = 0xe6c40000, | 91 | static struct plat_sci_port scif##index##_platform_data = { \ |
| 92 | .flags = UPF_BOOT_AUTOCONF, | 92 | .type = scif_type, \ |
| 93 | .scscr = SCSCR_RE | SCSCR_TE, | 93 | .flags = UPF_BOOT_AUTOCONF, \ |
| 94 | .scbrr_algo_id = SCBRR_ALGO_4, | 94 | .scscr = SCSCR_RE | SCSCR_TE, \ |
| 95 | .type = PORT_SCIFA, | 95 | }; \ |
| 96 | .irqs = { evt2irq(0x0c00), evt2irq(0x0c00), | 96 | \ |
| 97 | evt2irq(0x0c00), evt2irq(0x0c00) }, | 97 | static struct resource scif##index##_resources[] = { \ |
| 98 | }; | 98 | DEFINE_RES_MEM(baseaddr, 0x100), \ |
| 99 | 99 | DEFINE_RES_IRQ(irq), \ | |
| 100 | static struct platform_device scif0_device = { | 100 | }; \ |
| 101 | .name = "sh-sci", | 101 | \ |
| 102 | .id = 0, | 102 | static struct platform_device scif##index##_device = { \ |
| 103 | .dev = { | 103 | .name = "sh-sci", \ |
| 104 | .platform_data = &scif0_platform_data, | 104 | .id = index, \ |
| 105 | }, | 105 | .resource = scif##index##_resources, \ |
| 106 | }; | 106 | .num_resources = ARRAY_SIZE(scif##index##_resources), \ |
| 107 | 107 | .dev = { \ | |
| 108 | /* SCIFA1 */ | 108 | .platform_data = &scif##index##_platform_data, \ |
| 109 | static struct plat_sci_port scif1_platform_data = { | 109 | }, \ |
| 110 | .mapbase = 0xe6c50000, | 110 | } |
| 111 | .flags = UPF_BOOT_AUTOCONF, | ||
| 112 | .scscr = SCSCR_RE | SCSCR_TE, | ||
| 113 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
| 114 | .type = PORT_SCIFA, | ||
| 115 | .irqs = { evt2irq(0x0c20), evt2irq(0x0c20), | ||
| 116 | evt2irq(0x0c20), evt2irq(0x0c20) }, | ||
| 117 | }; | ||
| 118 | |||
| 119 | static struct platform_device scif1_device = { | ||
| 120 | .name = "sh-sci", | ||
| 121 | .id = 1, | ||
| 122 | .dev = { | ||
| 123 | .platform_data = &scif1_platform_data, | ||
| 124 | }, | ||
| 125 | }; | ||
| 126 | |||
| 127 | /* SCIFA2 */ | ||
| 128 | static struct plat_sci_port scif2_platform_data = { | ||
| 129 | .mapbase = 0xe6c60000, | ||
| 130 | .flags = UPF_BOOT_AUTOCONF, | ||
| 131 | .scscr = SCSCR_RE | SCSCR_TE, | ||
| 132 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
| 133 | .type = PORT_SCIFA, | ||
| 134 | .irqs = { evt2irq(0x0c40), evt2irq(0x0c40), | ||
| 135 | evt2irq(0x0c40), evt2irq(0x0c40) }, | ||
| 136 | }; | ||
| 137 | |||
| 138 | static struct platform_device scif2_device = { | ||
| 139 | .name = "sh-sci", | ||
| 140 | .id = 2, | ||
| 141 | .dev = { | ||
| 142 | .platform_data = &scif2_platform_data, | ||
| 143 | }, | ||
| 144 | }; | ||
| 145 | |||
| 146 | /* SCIFA3 */ | ||
| 147 | static struct plat_sci_port scif3_platform_data = { | ||
| 148 | .mapbase = 0xe6c70000, | ||
| 149 | .flags = UPF_BOOT_AUTOCONF, | ||
| 150 | .scscr = SCSCR_RE | SCSCR_TE, | ||
| 151 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
| 152 | .type = PORT_SCIFA, | ||
| 153 | .irqs = { evt2irq(0x0c60), evt2irq(0x0c60), | ||
| 154 | evt2irq(0x0c60), evt2irq(0x0c60) }, | ||
| 155 | }; | ||
| 156 | |||
| 157 | static struct platform_device scif3_device = { | ||
| 158 | .name = "sh-sci", | ||
| 159 | .id = 3, | ||
| 160 | .dev = { | ||
| 161 | .platform_data = &scif3_platform_data, | ||
| 162 | }, | ||
| 163 | }; | ||
| 164 | |||
| 165 | /* SCIFA4 */ | ||
| 166 | static struct plat_sci_port scif4_platform_data = { | ||
| 167 | .mapbase = 0xe6c80000, | ||
| 168 | .flags = UPF_BOOT_AUTOCONF, | ||
| 169 | .scscr = SCSCR_RE | SCSCR_TE, | ||
| 170 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
| 171 | .type = PORT_SCIFA, | ||
| 172 | .irqs = { evt2irq(0x0d20), evt2irq(0x0d20), | ||
| 173 | evt2irq(0x0d20), evt2irq(0x0d20) }, | ||
| 174 | }; | ||
| 175 | |||
| 176 | static struct platform_device scif4_device = { | ||
| 177 | .name = "sh-sci", | ||
| 178 | .id = 4, | ||
| 179 | .dev = { | ||
| 180 | .platform_data = &scif4_platform_data, | ||
| 181 | }, | ||
| 182 | }; | ||
| 183 | |||
| 184 | /* SCIFA5 */ | ||
| 185 | static struct plat_sci_port scif5_platform_data = { | ||
| 186 | .mapbase = 0xe6cb0000, | ||
| 187 | .flags = UPF_BOOT_AUTOCONF, | ||
| 188 | .scscr = SCSCR_RE | SCSCR_TE, | ||
| 189 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
| 190 | .type = PORT_SCIFA, | ||
| 191 | .irqs = { evt2irq(0x0d40), evt2irq(0x0d40), | ||
| 192 | evt2irq(0x0d40), evt2irq(0x0d40) }, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct platform_device scif5_device = { | ||
| 196 | .name = "sh-sci", | ||
| 197 | .id = 5, | ||
| 198 | .dev = { | ||
| 199 | .platform_data = &scif5_platform_data, | ||
| 200 | }, | ||
| 201 | }; | ||
| 202 | |||
| 203 | /* SCIFB */ | ||
| 204 | static struct plat_sci_port scif6_platform_data = { | ||
| 205 | .mapbase = 0xe6c30000, | ||
| 206 | .flags = UPF_BOOT_AUTOCONF, | ||
| 207 | .scscr = SCSCR_RE | SCSCR_TE, | ||
| 208 | .scbrr_algo_id = SCBRR_ALGO_4, | ||
| 209 | .type = PORT_SCIFB, | ||
| 210 | .irqs = { evt2irq(0x0d60), evt2irq(0x0d60), | ||
| 211 | evt2irq(0x0d60), evt2irq(0x0d60) }, | ||
| 212 | }; | ||
| 213 | 111 | ||
| 214 | static struct platform_device scif6_device = { | 112 | SH7372_SCIF(PORT_SCIFA, 0, 0xe6c40000, evt2irq(0x0c00)); |
| 215 | .name = "sh-sci", | 113 | SH7372_SCIF(PORT_SCIFA, 1, 0xe6c50000, evt2irq(0x0c20)); |
| 216 | .id = 6, | 114 | SH7372_SCIF(PORT_SCIFA, 2, 0xe6c60000, evt2irq(0x0c40)); |
| 217 | .dev = { | 115 | SH7372_SCIF(PORT_SCIFA, 3, 0xe6c70000, evt2irq(0x0c60)); |
| 218 | .platform_data = &scif6_platform_data, | 116 | SH7372_SCIF(PORT_SCIFA, 4, 0xe6c80000, evt2irq(0x0d20)); |
| 219 | }, | 117 | SH7372_SCIF(PORT_SCIFA, 5, 0xe6cb0000, evt2irq(0x0d40)); |
| 220 | }; | 118 | SH7372_SCIF(PORT_SCIFB, 6, 0xe6c30000, evt2irq(0x0d60)); |
| 221 | 119 | ||
| 222 | /* CMT */ | 120 | /* CMT */ |
| 223 | static struct sh_timer_config cmt2_platform_data = { | 121 | static struct sh_timer_config cmt2_platform_data = { |
