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-rw-r--r--arch/arm/mach-shmobile/setup-rcar-gen2.c72
1 files changed, 49 insertions, 23 deletions
diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c
index a669377aea57..3dd6edd9bd1d 100644
--- a/arch/arm/mach-shmobile/setup-rcar-gen2.c
+++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c
@@ -3,6 +3,7 @@
3 * 3 *
4 * Copyright (C) 2013 Renesas Solutions Corp. 4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm 5 * Copyright (C) 2013 Magnus Damm
6 * Copyright (C) 2014 Ulrich Hecht
6 * 7 *
7 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 9 * it under the terms of the GNU General Public License as published by
@@ -20,6 +21,7 @@
20#include <linux/dma-contiguous.h> 21#include <linux/dma-contiguous.h>
21#include <linux/io.h> 22#include <linux/io.h>
22#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/of.h>
23#include <linux/of_fdt.h> 25#include <linux/of_fdt.h>
24#include <asm/mach/arch.h> 26#include <asm/mach/arch.h>
25#include "common.h" 27#include "common.h"
@@ -50,37 +52,61 @@ void __init rcar_gen2_timer_init(void)
50{ 52{
51#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK) 53#if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK)
52 u32 mode = rcar_gen2_read_mode_pins(); 54 u32 mode = rcar_gen2_read_mode_pins();
55 bool is_e2 = (bool)of_find_compatible_node(NULL, NULL,
56 "renesas,r8a7794");
53#endif 57#endif
54#ifdef CONFIG_ARM_ARCH_TIMER 58#ifdef CONFIG_ARM_ARCH_TIMER
55 void __iomem *base; 59 void __iomem *base;
56 int extal_mhz = 0; 60 int extal_mhz = 0;
57 u32 freq; 61 u32 freq;
58 62
59 /* At Linux boot time the r8a7790 arch timer comes up 63 if (is_e2) {
60 * with the counter disabled. Moreover, it may also report 64 freq = 260000000 / 8; /* ZS / 8 */
61 * a potentially incorrect fixed 13 MHz frequency. To be 65 /* CNTVOFF has to be initialized either from non-secure
62 * correct these registers need to be updated to use the 66 * Hypervisor mode or secure Monitor mode with SCR.NS==1.
63 * frequency EXTAL / 2 which can be determined by the MD pins. 67 * If TrustZone is enabled then it should be handled by the
64 */ 68 * secure code.
65 69 */
66 switch (mode & (MD(14) | MD(13))) { 70 asm volatile(
67 case 0: 71 " cps 0x16\n"
68 extal_mhz = 15; 72 " mrc p15, 0, r1, c1, c1, 0\n"
69 break; 73 " orr r0, r1, #1\n"
70 case MD(13): 74 " mcr p15, 0, r0, c1, c1, 0\n"
71 extal_mhz = 20; 75 " isb\n"
72 break; 76 " mov r0, #0\n"
73 case MD(14): 77 " mcrr p15, 4, r0, r0, c14\n"
74 extal_mhz = 26; 78 " isb\n"
75 break; 79 " mcr p15, 0, r1, c1, c1, 0\n"
76 case MD(13) | MD(14): 80 " isb\n"
77 extal_mhz = 30; 81 " cps 0x13\n"
78 break; 82 : : : "r0", "r1");
83 } else {
84 /* At Linux boot time the r8a7790 arch timer comes up
85 * with the counter disabled. Moreover, it may also report
86 * a potentially incorrect fixed 13 MHz frequency. To be
87 * correct these registers need to be updated to use the
88 * frequency EXTAL / 2 which can be determined by the MD pins.
89 */
90
91 switch (mode & (MD(14) | MD(13))) {
92 case 0:
93 extal_mhz = 15;
94 break;
95 case MD(13):
96 extal_mhz = 20;
97 break;
98 case MD(14):
99 extal_mhz = 26;
100 break;
101 case MD(13) | MD(14):
102 extal_mhz = 30;
103 break;
104 }
105
106 /* The arch timer frequency equals EXTAL / 2 */
107 freq = extal_mhz * (1000000 / 2);
79 } 108 }
80 109
81 /* The arch timer frequency equals EXTAL / 2 */
82 freq = extal_mhz * (1000000 / 2);
83
84 /* Remap "armgcnt address map" space */ 110 /* Remap "armgcnt address map" space */
85 base = ioremap(0xe6080000, PAGE_SIZE); 111 base = ioremap(0xe6080000, PAGE_SIZE);
86 112