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-rw-r--r--arch/arm/mach-shmobile/setup-r8a7791.c185
1 files changed, 1 insertions, 184 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index 35d78639244f..ef8eb3af586d 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -13,198 +13,16 @@
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */ 16 */
21 17
22#include <linux/irq.h> 18#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/of_platform.h>
25#include <linux/platform_data/gpio-rcar.h>
26#include <linux/platform_data/irq-renesas-irqc.h>
27#include <linux/serial_sci.h>
28#include <linux/sh_timer.h>
29 19
30#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
31 21
32#include "common.h" 22#include "common.h"
33#include "irqs.h"
34#include "r8a7791.h" 23#include "r8a7791.h"
35#include "rcar-gen2.h" 24#include "rcar-gen2.h"
36 25
37static const struct resource pfc_resources[] __initconst = {
38 DEFINE_RES_MEM(0xe6060000, 0x250),
39};
40
41#define r8a7791_register_pfc() \
42 platform_device_register_simple("pfc-r8a7791", -1, pfc_resources, \
43 ARRAY_SIZE(pfc_resources))
44
45#define R8A7791_GPIO(idx, base, nr) \
46static const struct resource r8a7791_gpio##idx##_resources[] __initconst = { \
47 DEFINE_RES_MEM((base), 0x50), \
48 DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
49}; \
50 \
51static const struct gpio_rcar_config \
52r8a7791_gpio##idx##_platform_data __initconst = { \
53 .gpio_base = 32 * (idx), \
54 .irq_base = 0, \
55 .number_of_pins = (nr), \
56 .pctl_name = "pfc-r8a7791", \
57 .has_both_edge_trigger = 1, \
58}; \
59
60R8A7791_GPIO(0, 0xe6050000, 32);
61R8A7791_GPIO(1, 0xe6051000, 32);
62R8A7791_GPIO(2, 0xe6052000, 32);
63R8A7791_GPIO(3, 0xe6053000, 32);
64R8A7791_GPIO(4, 0xe6054000, 32);
65R8A7791_GPIO(5, 0xe6055000, 32);
66R8A7791_GPIO(6, 0xe6055400, 32);
67R8A7791_GPIO(7, 0xe6055800, 26);
68
69#define r8a7791_register_gpio(idx) \
70 platform_device_register_resndata(NULL, "gpio_rcar", idx, \
71 r8a7791_gpio##idx##_resources, \
72 ARRAY_SIZE(r8a7791_gpio##idx##_resources), \
73 &r8a7791_gpio##idx##_platform_data, \
74 sizeof(r8a7791_gpio##idx##_platform_data))
75
76void __init r8a7791_pinmux_init(void)
77{
78 r8a7791_register_pfc();
79 r8a7791_register_gpio(0);
80 r8a7791_register_gpio(1);
81 r8a7791_register_gpio(2);
82 r8a7791_register_gpio(3);
83 r8a7791_register_gpio(4);
84 r8a7791_register_gpio(5);
85 r8a7791_register_gpio(6);
86 r8a7791_register_gpio(7);
87}
88
89#define __R8A7791_SCIF(scif_type, index, baseaddr, irq) \
90static struct plat_sci_port scif##index##_platform_data = { \
91 .type = scif_type, \
92 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
93 .scscr = SCSCR_RE | SCSCR_TE, \
94}; \
95 \
96static struct resource scif##index##_resources[] = { \
97 DEFINE_RES_MEM(baseaddr, 0x100), \
98 DEFINE_RES_IRQ(irq), \
99}
100
101#define R8A7791_SCIF(index, baseaddr, irq) \
102 __R8A7791_SCIF(PORT_SCIF, index, baseaddr, irq)
103
104#define R8A7791_SCIFA(index, baseaddr, irq) \
105 __R8A7791_SCIF(PORT_SCIFA, index, baseaddr, irq)
106
107#define R8A7791_SCIFB(index, baseaddr, irq) \
108 __R8A7791_SCIF(PORT_SCIFB, index, baseaddr, irq)
109
110R8A7791_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
111R8A7791_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
112R8A7791_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */
113R8A7791_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */
114R8A7791_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */
115R8A7791_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */
116R8A7791_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */
117R8A7791_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */
118R8A7791_SCIF(8, 0xe6e58000, gic_spi(22)); /* SCIF2 */
119R8A7791_SCIF(9, 0xe6ea8000, gic_spi(23)); /* SCIF3 */
120R8A7791_SCIF(10, 0xe6ee0000, gic_spi(24)); /* SCIF4 */
121R8A7791_SCIF(11, 0xe6ee8000, gic_spi(25)); /* SCIF5 */
122R8A7791_SCIFA(12, 0xe6c70000, gic_spi(29)); /* SCIFA3 */
123R8A7791_SCIFA(13, 0xe6c78000, gic_spi(30)); /* SCIFA4 */
124R8A7791_SCIFA(14, 0xe6c80000, gic_spi(31)); /* SCIFA5 */
125
126#define r8a7791_register_scif(index) \
127 platform_device_register_resndata(NULL, "sh-sci", index, \
128 scif##index##_resources, \
129 ARRAY_SIZE(scif##index##_resources), \
130 &scif##index##_platform_data, \
131 sizeof(scif##index##_platform_data))
132
133static struct sh_timer_config cmt0_platform_data = {
134 .channels_mask = 0x60,
135};
136
137static struct resource cmt0_resources[] = {
138 DEFINE_RES_MEM(0xffca0000, 0x1004),
139 DEFINE_RES_IRQ(gic_spi(142)),
140};
141
142#define r8a7791_register_cmt(idx) \
143 platform_device_register_resndata(NULL, "sh-cmt-48-gen2", \
144 idx, cmt##idx##_resources, \
145 ARRAY_SIZE(cmt##idx##_resources), \
146 &cmt##idx##_platform_data, \
147 sizeof(struct sh_timer_config))
148
149static struct renesas_irqc_config irqc0_data = {
150 .irq_base = irq_pin(0), /* IRQ0 -> IRQ9 */
151};
152
153static struct resource irqc0_resources[] = {
154 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
155 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
156 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
157 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
158 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
159 DEFINE_RES_IRQ(gic_spi(12)), /* IRQ4 */
160 DEFINE_RES_IRQ(gic_spi(13)), /* IRQ5 */
161 DEFINE_RES_IRQ(gic_spi(14)), /* IRQ6 */
162 DEFINE_RES_IRQ(gic_spi(15)), /* IRQ7 */
163 DEFINE_RES_IRQ(gic_spi(16)), /* IRQ8 */
164 DEFINE_RES_IRQ(gic_spi(17)), /* IRQ9 */
165};
166
167#define r8a7791_register_irqc(idx) \
168 platform_device_register_resndata(NULL, "renesas_irqc", \
169 idx, irqc##idx##_resources, \
170 ARRAY_SIZE(irqc##idx##_resources), \
171 &irqc##idx##_data, \
172 sizeof(struct renesas_irqc_config))
173
174static const struct resource thermal_resources[] __initconst = {
175 DEFINE_RES_MEM(0xe61f0000, 0x14),
176 DEFINE_RES_MEM(0xe61f0100, 0x38),
177 DEFINE_RES_IRQ(gic_spi(69)),
178};
179
180#define r8a7791_register_thermal() \
181 platform_device_register_simple("rcar_thermal", -1, \
182 thermal_resources, \
183 ARRAY_SIZE(thermal_resources))
184
185void __init r8a7791_add_standard_devices(void)
186{
187 r8a7791_register_scif(0);
188 r8a7791_register_scif(1);
189 r8a7791_register_scif(2);
190 r8a7791_register_scif(3);
191 r8a7791_register_scif(4);
192 r8a7791_register_scif(5);
193 r8a7791_register_scif(6);
194 r8a7791_register_scif(7);
195 r8a7791_register_scif(8);
196 r8a7791_register_scif(9);
197 r8a7791_register_scif(10);
198 r8a7791_register_scif(11);
199 r8a7791_register_scif(12);
200 r8a7791_register_scif(13);
201 r8a7791_register_scif(14);
202 r8a7791_register_cmt(0);
203 r8a7791_register_irqc(0);
204 r8a7791_register_thermal();
205}
206
207#ifdef CONFIG_USE_OF
208static const char *r8a7791_boards_compat_dt[] __initdata = { 26static const char *r8a7791_boards_compat_dt[] __initdata = {
209 "renesas,r8a7791", 27 "renesas,r8a7791",
210 NULL, 28 NULL,
@@ -218,4 +36,3 @@ DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
218 .reserve = rcar_gen2_reserve, 36 .reserve = rcar_gen2_reserve,
219 .dt_compat = r8a7791_boards_compat_dt, 37 .dt_compat = r8a7791_boards_compat_dt,
220MACHINE_END 38MACHINE_END
221#endif /* CONFIG_USE_OF */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-11 03:41:06 -0500