diff options
Diffstat (limited to 'arch/arm/mach-shmobile/setup-r7s72100.c')
| -rw-r--r-- | arch/arm/mach-shmobile/setup-r7s72100.c | 82 |
1 files changed, 53 insertions, 29 deletions
diff --git a/arch/arm/mach-shmobile/setup-r7s72100.c b/arch/arm/mach-shmobile/setup-r7s72100.c index d4eb509a1c87..9c0b3a9d5f7a 100644 --- a/arch/arm/mach-shmobile/setup-r7s72100.c +++ b/arch/arm/mach-shmobile/setup-r7s72100.c | |||
| @@ -22,52 +22,76 @@ | |||
| 22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
| 23 | #include <linux/of_platform.h> | 23 | #include <linux/of_platform.h> |
| 24 | #include <linux/serial_sci.h> | 24 | #include <linux/serial_sci.h> |
| 25 | #include <linux/sh_timer.h> | ||
| 25 | #include <mach/common.h> | 26 | #include <mach/common.h> |
| 26 | #include <mach/irqs.h> | 27 | #include <mach/irqs.h> |
| 27 | #include <mach/r7s72100.h> | 28 | #include <mach/r7s72100.h> |
| 28 | #include <asm/mach/arch.h> | 29 | #include <asm/mach/arch.h> |
| 29 | 30 | ||
| 30 | #define SCIF_DATA(index, baseaddr, irq) \ | 31 | #define R7S72100_SCIF(index, baseaddr, irq) \ |
| 31 | [index] = { \ | 32 | static const struct plat_sci_port scif##index##_platform_data = { \ |
| 32 | .type = PORT_SCIF, \ | 33 | .type = PORT_SCIF, \ |
| 33 | .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \ | 34 | .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \ |
| 34 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ | 35 | .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ |
| 35 | .scbrr_algo_id = SCBRR_ALGO_2, \ | ||
| 36 | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \ | 36 | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \ |
| 37 | SCSCR_REIE, \ | 37 | SCSCR_REIE, \ |
| 38 | .mapbase = baseaddr, \ | 38 | }; \ |
| 39 | .irqs = { irq + 1, irq + 2, irq + 3, irq }, \ | 39 | \ |
| 40 | } | 40 | static struct resource scif##index##_resources[] = { \ |
| 41 | DEFINE_RES_MEM(baseaddr, 0x100), \ | ||
| 42 | DEFINE_RES_IRQ(irq + 1), \ | ||
| 43 | DEFINE_RES_IRQ(irq + 2), \ | ||
| 44 | DEFINE_RES_IRQ(irq + 3), \ | ||
| 45 | DEFINE_RES_IRQ(irq), \ | ||
| 46 | } \ | ||
| 47 | |||
| 48 | R7S72100_SCIF(0, 0xe8007000, gic_iid(221)); | ||
| 49 | R7S72100_SCIF(1, 0xe8007800, gic_iid(225)); | ||
| 50 | R7S72100_SCIF(2, 0xe8008000, gic_iid(229)); | ||
| 51 | R7S72100_SCIF(3, 0xe8008800, gic_iid(233)); | ||
| 52 | R7S72100_SCIF(4, 0xe8009000, gic_iid(237)); | ||
| 53 | R7S72100_SCIF(5, 0xe8009800, gic_iid(241)); | ||
| 54 | R7S72100_SCIF(6, 0xe800a000, gic_iid(245)); | ||
| 55 | R7S72100_SCIF(7, 0xe800a800, gic_iid(249)); | ||
| 41 | 56 | ||
| 42 | enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 }; | 57 | #define r7s72100_register_scif(index) \ |
| 58 | platform_device_register_resndata(&platform_bus, "sh-sci", index, \ | ||
| 59 | scif##index##_resources, \ | ||
| 60 | ARRAY_SIZE(scif##index##_resources), \ | ||
| 61 | &scif##index##_platform_data, \ | ||
| 62 | sizeof(scif##index##_platform_data)) | ||
| 43 | 63 | ||
| 44 | static const struct plat_sci_port scif[] __initconst = { | 64 | |
| 45 | SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */ | 65 | static struct sh_timer_config mtu2_0_platform_data __initdata = { |
| 46 | SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */ | 66 | .name = "MTU2_0", |
| 47 | SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */ | 67 | .timer_bit = 0, |
| 48 | SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */ | 68 | .channel_offset = -0x80, |
| 49 | SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */ | 69 | .clockevent_rating = 200, |
| 50 | SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */ | ||
| 51 | SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */ | ||
| 52 | SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */ | ||
| 53 | }; | 70 | }; |
| 54 | 71 | ||
| 55 | static inline void r7s72100_register_scif(int idx) | 72 | static struct resource mtu2_0_resources[] __initdata = { |
| 56 | { | 73 | DEFINE_RES_MEM(0xfcff0300, 0x27), |
| 57 | platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx], | 74 | DEFINE_RES_IRQ(gic_iid(139)), /* MTU2 TGI0A */ |
| 58 | sizeof(struct plat_sci_port)); | 75 | }; |
| 59 | } | 76 | |
| 77 | #define r7s72100_register_mtu2(idx) \ | ||
| 78 | platform_device_register_resndata(&platform_bus, "sh_mtu2", \ | ||
| 79 | idx, mtu2_##idx##_resources, \ | ||
| 80 | ARRAY_SIZE(mtu2_##idx##_resources), \ | ||
| 81 | &mtu2_##idx##_platform_data, \ | ||
| 82 | sizeof(struct sh_timer_config)) | ||
| 60 | 83 | ||
| 61 | void __init r7s72100_add_dt_devices(void) | 84 | void __init r7s72100_add_dt_devices(void) |
| 62 | { | 85 | { |
| 63 | r7s72100_register_scif(SCIF0); | 86 | r7s72100_register_scif(0); |
| 64 | r7s72100_register_scif(SCIF1); | 87 | r7s72100_register_scif(1); |
| 65 | r7s72100_register_scif(SCIF2); | 88 | r7s72100_register_scif(2); |
| 66 | r7s72100_register_scif(SCIF3); | 89 | r7s72100_register_scif(3); |
| 67 | r7s72100_register_scif(SCIF4); | 90 | r7s72100_register_scif(4); |
| 68 | r7s72100_register_scif(SCIF5); | 91 | r7s72100_register_scif(5); |
| 69 | r7s72100_register_scif(SCIF6); | 92 | r7s72100_register_scif(6); |
| 70 | r7s72100_register_scif(SCIF7); | 93 | r7s72100_register_scif(7); |
| 94 | r7s72100_register_mtu2(0); | ||
| 71 | } | 95 | } |
| 72 | 96 | ||
| 73 | void __init r7s72100_init_early(void) | 97 | void __init r7s72100_init_early(void) |
