diff options
Diffstat (limited to 'arch/arm/mach-shmobile/pm-rcar.c')
-rw-r--r-- | arch/arm/mach-shmobile/pm-rcar.c | 141 |
1 files changed, 141 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/pm-rcar.c b/arch/arm/mach-shmobile/pm-rcar.c new file mode 100644 index 000000000000..1f465a12d1b1 --- /dev/null +++ b/arch/arm/mach-shmobile/pm-rcar.c | |||
@@ -0,0 +1,141 @@ | |||
1 | /* | ||
2 | * R-Car SYSC Power management support | ||
3 | * | ||
4 | * Copyright (C) 2014 Magnus Damm | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | #include <linux/delay.h> | ||
12 | #include <linux/err.h> | ||
13 | #include <linux/mm.h> | ||
14 | #include <linux/spinlock.h> | ||
15 | #include <asm/io.h> | ||
16 | #include <mach/pm-rcar.h> | ||
17 | |||
18 | /* SYSC */ | ||
19 | #define SYSCSR 0x00 | ||
20 | #define SYSCISR 0x04 | ||
21 | #define SYSCISCR 0x08 | ||
22 | |||
23 | #define PWRSR_OFFS 0x00 | ||
24 | #define PWROFFCR_OFFS 0x04 | ||
25 | #define PWRONCR_OFFS 0x0c | ||
26 | #define PWRER_OFFS 0x14 | ||
27 | |||
28 | #define SYSCSR_RETRIES 100 | ||
29 | #define SYSCSR_DELAY_US 1 | ||
30 | |||
31 | #define SYSCISR_RETRIES 1000 | ||
32 | #define SYSCISR_DELAY_US 1 | ||
33 | |||
34 | #if defined(CONFIG_PM) || defined(CONFIG_SMP) | ||
35 | |||
36 | static void __iomem *rcar_sysc_base; | ||
37 | static DEFINE_SPINLOCK(rcar_sysc_lock); /* SMP CPUs + I/O devices */ | ||
38 | |||
39 | static int rcar_sysc_pwr_on_off(struct rcar_sysc_ch *sysc_ch, | ||
40 | int sr_bit, int reg_offs) | ||
41 | { | ||
42 | int k; | ||
43 | |||
44 | for (k = 0; k < SYSCSR_RETRIES; k++) { | ||
45 | if (ioread32(rcar_sysc_base + SYSCSR) & (1 << sr_bit)) | ||
46 | break; | ||
47 | udelay(SYSCSR_DELAY_US); | ||
48 | } | ||
49 | |||
50 | if (k == SYSCSR_RETRIES) | ||
51 | return -EAGAIN; | ||
52 | |||
53 | iowrite32(1 << sysc_ch->chan_bit, | ||
54 | rcar_sysc_base + sysc_ch->chan_offs + reg_offs); | ||
55 | |||
56 | return 0; | ||
57 | } | ||
58 | |||
59 | static int rcar_sysc_pwr_off(struct rcar_sysc_ch *sysc_ch) | ||
60 | { | ||
61 | return rcar_sysc_pwr_on_off(sysc_ch, 0, PWROFFCR_OFFS); | ||
62 | } | ||
63 | |||
64 | static int rcar_sysc_pwr_on(struct rcar_sysc_ch *sysc_ch) | ||
65 | { | ||
66 | return rcar_sysc_pwr_on_off(sysc_ch, 1, PWRONCR_OFFS); | ||
67 | } | ||
68 | |||
69 | static int rcar_sysc_update(struct rcar_sysc_ch *sysc_ch, | ||
70 | int (*on_off_fn)(struct rcar_sysc_ch *)) | ||
71 | { | ||
72 | unsigned int isr_mask = 1 << sysc_ch->isr_bit; | ||
73 | unsigned int chan_mask = 1 << sysc_ch->chan_bit; | ||
74 | unsigned int status; | ||
75 | unsigned long flags; | ||
76 | int ret = 0; | ||
77 | int k; | ||
78 | |||
79 | spin_lock_irqsave(&rcar_sysc_lock, flags); | ||
80 | |||
81 | iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); | ||
82 | |||
83 | do { | ||
84 | ret = on_off_fn(sysc_ch); | ||
85 | if (ret) | ||
86 | goto out; | ||
87 | |||
88 | status = ioread32(rcar_sysc_base + | ||
89 | sysc_ch->chan_offs + PWRER_OFFS); | ||
90 | } while (status & chan_mask); | ||
91 | |||
92 | for (k = 0; k < SYSCISR_RETRIES; k++) { | ||
93 | if (ioread32(rcar_sysc_base + SYSCISR) & isr_mask) | ||
94 | break; | ||
95 | udelay(SYSCISR_DELAY_US); | ||
96 | } | ||
97 | |||
98 | if (k == SYSCISR_RETRIES) | ||
99 | ret = -EIO; | ||
100 | |||
101 | iowrite32(isr_mask, rcar_sysc_base + SYSCISCR); | ||
102 | |||
103 | out: | ||
104 | spin_unlock_irqrestore(&rcar_sysc_lock, flags); | ||
105 | |||
106 | pr_debug("sysc power domain %d: %08x -> %d\n", | ||
107 | sysc_ch->isr_bit, ioread32(rcar_sysc_base + SYSCISR), ret); | ||
108 | return ret; | ||
109 | } | ||
110 | |||
111 | int rcar_sysc_power_down(struct rcar_sysc_ch *sysc_ch) | ||
112 | { | ||
113 | return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_off); | ||
114 | } | ||
115 | |||
116 | int rcar_sysc_power_up(struct rcar_sysc_ch *sysc_ch) | ||
117 | { | ||
118 | return rcar_sysc_update(sysc_ch, rcar_sysc_pwr_on); | ||
119 | } | ||
120 | |||
121 | bool rcar_sysc_power_is_off(struct rcar_sysc_ch *sysc_ch) | ||
122 | { | ||
123 | unsigned int st; | ||
124 | |||
125 | st = ioread32(rcar_sysc_base + sysc_ch->chan_offs + PWRSR_OFFS); | ||
126 | if (st & (1 << sysc_ch->chan_bit)) | ||
127 | return true; | ||
128 | |||
129 | return false; | ||
130 | } | ||
131 | |||
132 | void __iomem *rcar_sysc_init(phys_addr_t base) | ||
133 | { | ||
134 | rcar_sysc_base = ioremap_nocache(base, PAGE_SIZE); | ||
135 | if (!rcar_sysc_base) | ||
136 | panic("unable to ioremap R-Car SYSC hardware block\n"); | ||
137 | |||
138 | return rcar_sysc_base; | ||
139 | } | ||
140 | |||
141 | #endif /* CONFIG_PM || CONFIG_SMP */ | ||