aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-shmobile/clock-sh7372.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/mach-shmobile/clock-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c33
1 files changed, 8 insertions, 25 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index b25ce90a346e..3aa026069435 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -229,21 +229,13 @@ static int pllc2_set_rate(struct clk *clk, unsigned long rate)
229 if (idx < 0) 229 if (idx < 0)
230 return idx; 230 return idx;
231 231
232 if (rate == clk->parent->rate) { 232 if (rate == clk->parent->rate)
233 pllc2_disable(clk); 233 return -EINVAL;
234 return 0;
235 }
236 234
237 value = __raw_readl(PLLC2CR) & ~(0x3f << 24); 235 value = __raw_readl(PLLC2CR) & ~(0x3f << 24);
238 236
239 if (value & 0x80000000)
240 pllc2_disable(clk);
241
242 __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); 237 __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR);
243 238
244 if (value & 0x80000000)
245 return pllc2_enable(clk);
246
247 return 0; 239 return 0;
248} 240}
249 241
@@ -452,10 +444,8 @@ static int fsidiv_enable(struct clk *clk)
452 unsigned long value; 444 unsigned long value;
453 445
454 value = __raw_readl(clk->mapping->base) >> 16; 446 value = __raw_readl(clk->mapping->base) >> 16;
455 if (value < 2) { 447 if (value < 2)
456 fsidiv_disable(clk); 448 return -EIO;
457 return -ENOENT;
458 }
459 449
460 __raw_writel((value << 16) | 0x3, clk->mapping->base); 450 __raw_writel((value << 16) | 0x3, clk->mapping->base);
461 451
@@ -466,17 +456,12 @@ static int fsidiv_set_rate(struct clk *clk, unsigned long rate)
466{ 456{
467 int idx; 457 int idx;
468 458
469 if (clk->parent->rate == rate) {
470 fsidiv_disable(clk);
471 return 0;
472 }
473
474 idx = (clk->parent->rate / rate) & 0xffff; 459 idx = (clk->parent->rate / rate) & 0xffff;
475 if (idx < 2) 460 if (idx < 2)
476 return -ENOENT; 461 return -EINVAL;
477 462
478 __raw_writel(idx << 16, clk->mapping->base); 463 __raw_writel(idx << 16, clk->mapping->base);
479 return fsidiv_enable(clk); 464 return 0;
480} 465}
481 466
482static struct clk_ops fsidiv_clk_ops = { 467static struct clk_ops fsidiv_clk_ops = {
@@ -607,8 +592,6 @@ static struct clk_lookup lookups[] = {
607 CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]), 592 CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
608 CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]), 593 CLKDEV_CON_ID("fmsi_clk", &div6_clks[DIV6_FMSI]),
609 CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]), 594 CLKDEV_CON_ID("fmso_clk", &div6_clks[DIV6_FMSO]),
610 CLKDEV_CON_ID("fsia_clk", &div6_reparent_clks[DIV6_FSIA]),
611 CLKDEV_CON_ID("fsib_clk", &div6_reparent_clks[DIV6_FSIB]),
612 CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]), 595 CLKDEV_CON_ID("sub_clk", &div6_clks[DIV6_SUB]),
613 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]), 596 CLKDEV_CON_ID("spu_clk", &div6_clks[DIV6_SPU]),
614 CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]), 597 CLKDEV_CON_ID("vou_clk", &div6_clks[DIV6_VOU]),
@@ -645,8 +628,8 @@ static struct clk_lookup lookups[] = {
645 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ 628 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
646 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */ 629 CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI2 */
647 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */ 630 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* IIC1 */
648 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP323]), /* USB0 */ 631 CLKDEV_DEV_ID("r8a66597_hcd.0", &mstp_clks[MSTP322]), /* USB0 */
649 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP323]), /* USB0 */ 632 CLKDEV_DEV_ID("r8a66597_udc.0", &mstp_clks[MSTP322]), /* USB0 */
650 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 633 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
651 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 634 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
652 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */ 635 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMC */