1 files changed, 23 insertions, 23 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
index ad5fccc7b5e7..6729e0032180 100644
--- a/arch/arm/mach-shmobile/clock-r8a7740.c
+++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -41,29 +41,29 @@
 */
 /* CPG registers */
-#define FRQCRA          0xe6150000
+#define FRQCRA          IOMEM(0xe6150000)
-#define FRQCRB          0xe6150004
+#define FRQCRB          IOMEM(0xe6150004)
-#define VCLKCR1         0xE6150008
+#define VCLKCR1         IOMEM(0xE6150008)
-#define VCLKCR2         0xE615000c
+#define VCLKCR2         IOMEM(0xE615000c)
-#define FRQCRC          0xe61500e0
+#define FRQCRC          IOMEM(0xe61500e0)
-#define FSIACKCR        0xe6150018
+#define FSIACKCR        IOMEM(0xe6150018)
-#define PLLC01CR        0xe6150028
+#define PLLC01CR        IOMEM(0xe6150028)
-#define SUBCKCR         0xe6150080
+#define SUBCKCR         IOMEM(0xe6150080)
-#define USBCKCR         0xe615008c
+#define USBCKCR         IOMEM(0xe615008c)
-#define MSTPSR0         0xe6150030
+#define MSTPSR0         IOMEM(0xe6150030)
-#define MSTPSR1         0xe6150038
+#define MSTPSR1         IOMEM(0xe6150038)
-#define MSTPSR2         0xe6150040
+#define MSTPSR2         IOMEM(0xe6150040)
-#define MSTPSR3         0xe6150048
+#define MSTPSR3         IOMEM(0xe6150048)
-#define MSTPSR4         0xe615004c
+#define MSTPSR4         IOMEM(0xe615004c)
-#define FSIBCKCR        0xe6150090
+#define FSIBCKCR        IOMEM(0xe6150090)
-#define HDMICKCR        0xe6150094
+#define HDMICKCR        IOMEM(0xe6150094)
-#define SMSTPCR0        0xe6150130
+#define SMSTPCR0        IOMEM(0xe6150130)
-#define SMSTPCR1        0xe6150134
+#define SMSTPCR1        IOMEM(0xe6150134)
-#define SMSTPCR2        0xe6150138
+#define SMSTPCR2        IOMEM(0xe6150138)
-#define SMSTPCR3        0xe615013c
+#define SMSTPCR3        IOMEM(0xe615013c)
-#define SMSTPCR4        0xe6150140
+#define SMSTPCR4        IOMEM(0xe6150140)
 /* Fixed 32 KHz root clock from EXTALR pin */
 static struct clk extalr_clk = {

diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index ad5fccc7b5e7..6729e0032180 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c
@@ -41,29 +41,29 @@
41	*/	41	*/
42		42
43	/* CPG registers */	43	/* CPG registers */
44	#define FRQCRA 0xe6150000	44	#define FRQCRA IOMEM(0xe6150000)
45	#define FRQCRB 0xe6150004	45	#define FRQCRB IOMEM(0xe6150004)
46	#define VCLKCR1 0xE6150008	46	#define VCLKCR1 IOMEM(0xE6150008)
47	#define VCLKCR2 0xE615000c	47	#define VCLKCR2 IOMEM(0xE615000c)
48	#define FRQCRC 0xe61500e0	48	#define FRQCRC IOMEM(0xe61500e0)
49	#define FSIACKCR 0xe6150018	49	#define FSIACKCR IOMEM(0xe6150018)
50	#define PLLC01CR 0xe6150028	50	#define PLLC01CR IOMEM(0xe6150028)
51		51
52	#define SUBCKCR 0xe6150080	52	#define SUBCKCR IOMEM(0xe6150080)
53	#define USBCKCR 0xe615008c	53	#define USBCKCR IOMEM(0xe615008c)
54		54
55	#define MSTPSR0 0xe6150030	55	#define MSTPSR0 IOMEM(0xe6150030)
56	#define MSTPSR1 0xe6150038	56	#define MSTPSR1 IOMEM(0xe6150038)
57	#define MSTPSR2 0xe6150040	57	#define MSTPSR2 IOMEM(0xe6150040)
58	#define MSTPSR3 0xe6150048	58	#define MSTPSR3 IOMEM(0xe6150048)
59	#define MSTPSR4 0xe615004c	59	#define MSTPSR4 IOMEM(0xe615004c)
60	#define FSIBCKCR 0xe6150090	60	#define FSIBCKCR IOMEM(0xe6150090)
61	#define HDMICKCR 0xe6150094	61	#define HDMICKCR IOMEM(0xe6150094)
62	#define SMSTPCR0 0xe6150130	62	#define SMSTPCR0 IOMEM(0xe6150130)
63	#define SMSTPCR1 0xe6150134	63	#define SMSTPCR1 IOMEM(0xe6150134)
64	#define SMSTPCR2 0xe6150138	64	#define SMSTPCR2 IOMEM(0xe6150138)
65	#define SMSTPCR3 0xe615013c	65	#define SMSTPCR3 IOMEM(0xe615013c)
66	#define SMSTPCR4 0xe6150140	66	#define SMSTPCR4 IOMEM(0xe6150140)
67		67
68	/* Fixed 32 KHz root clock from EXTALR pin */	68	/* Fixed 32 KHz root clock from EXTALR pin */
69	static struct clk extalr_clk = {	69	static struct clk extalr_clk = {