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-rw-r--r--arch/arm/mach-shmobile/board-bockw-reference.c32
1 files changed, 18 insertions, 14 deletions
diff --git a/arch/arm/mach-shmobile/board-bockw-reference.c b/arch/arm/mach-shmobile/board-bockw-reference.c
index ae88fdad4b3a..027373f8de82 100644
--- a/arch/arm/mach-shmobile/board-bockw-reference.c
+++ b/arch/arm/mach-shmobile/board-bockw-reference.c
@@ -19,7 +19,6 @@
19 */ 19 */
20 20
21#include <linux/of_platform.h> 21#include <linux/of_platform.h>
22#include <linux/pinctrl/machine.h>
23#include <mach/common.h> 22#include <mach/common.h>
24#include <mach/r8a7778.h> 23#include <mach/r8a7778.h>
25#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -28,27 +27,19 @@
28 * see board-bock.c for checking detail of dip-switch 27 * see board-bock.c for checking detail of dip-switch
29 */ 28 */
30 29
31static const struct pinctrl_map bockw_pinctrl_map[] = {
32 /* SCIF0 */
33 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
34 "scif0_data_a", "scif0"),
35 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
36 "scif0_ctrl", "scif0"),
37};
38
39#define FPGA 0x18200000 30#define FPGA 0x18200000
40#define IRQ0MR 0x30 31#define IRQ0MR 0x30
41#define COMCTLR 0x101c 32#define COMCTLR 0x101c
33
34#define PFC 0xfffc0000
35#define PUPR4 0x110
42static void __init bockw_init(void) 36static void __init bockw_init(void)
43{ 37{
44 static void __iomem *fpga; 38 void __iomem *fpga;
39 void __iomem *pfc;
45 40
46 r8a7778_clock_init(); 41 r8a7778_clock_init();
47 r8a7778_init_irq_extpin_dt(1); 42 r8a7778_init_irq_extpin_dt(1);
48
49 pinctrl_register_mappings(bockw_pinctrl_map,
50 ARRAY_SIZE(bockw_pinctrl_map));
51 r8a7778_pinmux_init();
52 r8a7778_add_dt_devices(); 43 r8a7778_add_dt_devices();
53 44
54 fpga = ioremap_nocache(FPGA, SZ_1M); 45 fpga = ioremap_nocache(FPGA, SZ_1M);
@@ -63,6 +54,19 @@ static void __init bockw_init(void)
63 u16 val = ioread16(fpga + IRQ0MR); 54 u16 val = ioread16(fpga + IRQ0MR);
64 val &= ~(1 << 4); /* enable SMSC911x */ 55 val &= ~(1 << 4); /* enable SMSC911x */
65 iowrite16(val, fpga + IRQ0MR); 56 iowrite16(val, fpga + IRQ0MR);
57
58 iounmap(fpga);
59 }
60
61 pfc = ioremap_nocache(PFC, 0x200);
62 if (pfc) {
63 /*
64 * FIXME
65 *
66 * SDHI CD/WP pin needs pull-up
67 */
68 iowrite32(ioread32(pfc + PUPR4) | (3 << 26), pfc + PUPR4);
69 iounmap(pfc);
66 } 70 }
67 71
68 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 72 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);