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-rw-r--r--arch/arm/mach-sa1100/generic.c15
-rw-r--r--arch/arm/mach-sa1100/h3600.c6
-rw-r--r--arch/arm/mach-sa1100/irq.c8
-rw-r--r--arch/arm/mach-sa1100/neponset.c8
-rw-r--r--arch/arm/mach-sa1100/time.c7
5 files changed, 26 insertions, 18 deletions
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index 4575f316e141..e510295c2580 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -20,6 +20,7 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21 21
22#include <asm/div64.h> 22#include <asm/div64.h>
23#include <asm/cnt32_to_63.h>
23#include <asm/hardware.h> 24#include <asm/hardware.h>
24#include <asm/system.h> 25#include <asm/system.h>
25#include <asm/pgtable.h> 26#include <asm/pgtable.h>
@@ -118,15 +119,21 @@ EXPORT_SYMBOL(cpufreq_get);
118 119
119/* 120/*
120 * This is the SA11x0 sched_clock implementation. This has 121 * This is the SA11x0 sched_clock implementation. This has
121 * a resolution of 271ns, and a maximum value of 1165s. 122 * a resolution of 271ns, and a maximum value of 32025597s (370 days).
123 *
124 * The return value is guaranteed to be monotonic in that range as
125 * long as there is always less than 582 seconds between successive
126 * calls to this function.
127 *
122 * ( * 1E9 / 3686400 => * 78125 / 288) 128 * ( * 1E9 / 3686400 => * 78125 / 288)
123 */ 129 */
124unsigned long long sched_clock(void) 130unsigned long long sched_clock(void)
125{ 131{
126 unsigned long long v; 132 unsigned long long v = cnt32_to_63(OSCR);
127 133
128 v = (unsigned long long)OSCR * 78125; 134 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
129 do_div(v, 288); 135 v *= 78125<<1;
136 do_div(v, 288<<1);
130 137
131 return v; 138 return v;
132} 139}
diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c
index fa6dc71bd6ad..b034ad69a324 100644
--- a/arch/arm/mach-sa1100/h3600.c
+++ b/arch/arm/mach-sa1100/h3600.c
@@ -702,7 +702,7 @@ static u32 gpio_irq_mask[] = {
702 GPIO2_SD_CON_SLT, 702 GPIO2_SD_CON_SLT,
703}; 703};
704 704
705static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc) 705static void h3800_IRQ_demux(unsigned int irq, struct irq_desc *desc)
706{ 706{
707 int i; 707 int i;
708 708
@@ -719,14 +719,14 @@ static void h3800_IRQ_demux(unsigned int irq, struct irqdesc *desc)
719 if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq); 719 if (0) printk("%s KPIO 0x%08X\n", __FUNCTION__, irq);
720 for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++) 720 for (j = 0; j < H3800_KPIO_IRQ_COUNT; j++)
721 if (irq & kpio_irq_mask[j]) 721 if (irq & kpio_irq_mask[j])
722 do_edge_IRQ(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j); 722 handle_edge_irq(H3800_KPIO_IRQ_COUNT + j, irq_desc + H3800_KPIO_IRQ_COUNT + j);
723 723
724 /* GPIO2 */ 724 /* GPIO2 */
725 irq = H3800_ASIC2_GPIINTFLAG; 725 irq = H3800_ASIC2_GPIINTFLAG;
726 if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq); 726 if (0) printk("%s GPIO 0x%08X\n", __FUNCTION__, irq);
727 for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++) 727 for (j = 0; j < H3800_GPIO_IRQ_COUNT; j++)
728 if (irq & gpio_irq_mask[j]) 728 if (irq & gpio_irq_mask[j])
729 do_edge_IRQ(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j); 729 handle_edge_irq(H3800_GPIO_IRQ_COUNT + j, irq_desc + H3800_GPIO_IRQ_COUNT + j);
730 } 730 }
731 731
732 if (i >= MAX_ASIC_ISR_LOOPS) 732 if (i >= MAX_ASIC_ISR_LOOPS)
diff --git a/arch/arm/mach-sa1100/irq.c b/arch/arm/mach-sa1100/irq.c
index f4c6322ca33e..5642aeca079e 100644
--- a/arch/arm/mach-sa1100/irq.c
+++ b/arch/arm/mach-sa1100/irq.c
@@ -110,7 +110,7 @@ static struct irq_chip sa1100_low_gpio_chip = {
110 * and call the handler. 110 * and call the handler.
111 */ 111 */
112static void 112static void
113sa1100_high_gpio_handler(unsigned int irq, struct irqdesc *desc) 113sa1100_high_gpio_handler(unsigned int irq, struct irq_desc *desc)
114{ 114{
115 unsigned int mask; 115 unsigned int mask;
116 116
@@ -327,19 +327,19 @@ void __init sa1100_init_irq(void)
327 327
328 for (irq = 0; irq <= 10; irq++) { 328 for (irq = 0; irq <= 10; irq++) {
329 set_irq_chip(irq, &sa1100_low_gpio_chip); 329 set_irq_chip(irq, &sa1100_low_gpio_chip);
330 set_irq_handler(irq, do_edge_IRQ); 330 set_irq_handler(irq, handle_edge_irq);
331 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 331 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
332 } 332 }
333 333
334 for (irq = 12; irq <= 31; irq++) { 334 for (irq = 12; irq <= 31; irq++) {
335 set_irq_chip(irq, &sa1100_normal_chip); 335 set_irq_chip(irq, &sa1100_normal_chip);
336 set_irq_handler(irq, do_level_IRQ); 336 set_irq_handler(irq, handle_level_irq);
337 set_irq_flags(irq, IRQF_VALID); 337 set_irq_flags(irq, IRQF_VALID);
338 } 338 }
339 339
340 for (irq = 32; irq <= 48; irq++) { 340 for (irq = 32; irq <= 48; irq++) {
341 set_irq_chip(irq, &sa1100_high_gpio_chip); 341 set_irq_chip(irq, &sa1100_high_gpio_chip);
342 set_irq_handler(irq, do_edge_IRQ); 342 set_irq_handler(irq, handle_edge_irq);
343 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 343 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
344 } 344 }
345 345
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 354d5e91da59..075d4d1d63be 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -29,12 +29,12 @@
29 * is rather unfortunate. 29 * is rather unfortunate.
30 */ 30 */
31static void 31static void
32neponset_irq_handler(unsigned int irq, struct irqdesc *desc) 32neponset_irq_handler(unsigned int irq, struct irq_desc *desc)
33{ 33{
34 unsigned int irr; 34 unsigned int irr;
35 35
36 while (1) { 36 while (1) {
37 struct irqdesc *d; 37 struct irq_desc *d;
38 38
39 /* 39 /*
40 * Acknowledge the parent IRQ. 40 * Acknowledge the parent IRQ.
@@ -168,9 +168,9 @@ static int neponset_probe(struct platform_device *dev)
168 * Setup other Neponset IRQs. SA1111 will be done by the 168 * Setup other Neponset IRQs. SA1111 will be done by the
169 * generic SA1111 code. 169 * generic SA1111 code.
170 */ 170 */
171 set_irq_handler(IRQ_NEPONSET_SMC9196, do_simple_IRQ); 171 set_irq_handler(IRQ_NEPONSET_SMC9196, handle_simple_irq);
172 set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE); 172 set_irq_flags(IRQ_NEPONSET_SMC9196, IRQF_VALID | IRQF_PROBE);
173 set_irq_handler(IRQ_NEPONSET_USAR, do_simple_IRQ); 173 set_irq_handler(IRQ_NEPONSET_USAR, handle_simple_irq);
174 set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE); 174 set_irq_flags(IRQ_NEPONSET_USAR, IRQF_VALID | IRQF_PROBE);
175 175
176 /* 176 /*
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c
index 4284bd6f7a1f..29c89f9eb2ce 100644
--- a/arch/arm/mach-sa1100/time.c
+++ b/arch/arm/mach-sa1100/time.c
@@ -118,6 +118,7 @@ static struct irqaction sa1100_timer_irq = {
118static void __init sa1100_timer_init(void) 118static void __init sa1100_timer_init(void)
119{ 119{
120 struct timespec tv; 120 struct timespec tv;
121 unsigned long flags;
121 122
122 set_rtc = sa1100_set_rtc; 123 set_rtc = sa1100_set_rtc;
123 124
@@ -126,12 +127,12 @@ static void __init sa1100_timer_init(void)
126 do_settimeofday(&tv); 127 do_settimeofday(&tv);
127 128
128 OIER = 0; /* disable any timer interrupts */ 129 OIER = 0; /* disable any timer interrupts */
129 OSCR = LATCH*2; /* push OSCR out of the way */
130 OSMR0 = LATCH; /* set initial match */
131 OSSR = 0xf; /* clear status on all timers */ 130 OSSR = 0xf; /* clear status on all timers */
132 setup_irq(IRQ_OST0, &sa1100_timer_irq); 131 setup_irq(IRQ_OST0, &sa1100_timer_irq);
132 local_irq_save(flags);
133 OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ 133 OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */
134 OSCR = 0; /* initialize free-running timer */ 134 OSMR0 = OSCR + LATCH; /* set initial match */
135 local_irq_restore(flags);
135} 136}
136 137
137#ifdef CONFIG_NO_IDLE_HZ 138#ifdef CONFIG_NO_IDLE_HZ