diff options
Diffstat (limited to 'arch/arm/mach-sa1100/time.c')
-rw-r--r-- | arch/arm/mach-sa1100/time.c | 24 |
1 files changed, 5 insertions, 19 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index ae4f3d80416f..fa6602491d54 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -92,25 +92,11 @@ sa1100_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *c) | |||
92 | static struct clock_event_device ckevt_sa1100_osmr0 = { | 92 | static struct clock_event_device ckevt_sa1100_osmr0 = { |
93 | .name = "osmr0", | 93 | .name = "osmr0", |
94 | .features = CLOCK_EVT_FEAT_ONESHOT, | 94 | .features = CLOCK_EVT_FEAT_ONESHOT, |
95 | .shift = 32, | ||
96 | .rating = 200, | 95 | .rating = 200, |
97 | .set_next_event = sa1100_osmr0_set_next_event, | 96 | .set_next_event = sa1100_osmr0_set_next_event, |
98 | .set_mode = sa1100_osmr0_set_mode, | 97 | .set_mode = sa1100_osmr0_set_mode, |
99 | }; | 98 | }; |
100 | 99 | ||
101 | static cycle_t sa1100_read_oscr(struct clocksource *s) | ||
102 | { | ||
103 | return OSCR; | ||
104 | } | ||
105 | |||
106 | static struct clocksource cksrc_sa1100_oscr = { | ||
107 | .name = "oscr", | ||
108 | .rating = 200, | ||
109 | .read = sa1100_read_oscr, | ||
110 | .mask = CLOCKSOURCE_MASK(32), | ||
111 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
112 | }; | ||
113 | |||
114 | static struct irqaction sa1100_timer_irq = { | 100 | static struct irqaction sa1100_timer_irq = { |
115 | .name = "ost0", | 101 | .name = "ost0", |
116 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | 102 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
@@ -120,14 +106,13 @@ static struct irqaction sa1100_timer_irq = { | |||
120 | 106 | ||
121 | static void __init sa1100_timer_init(void) | 107 | static void __init sa1100_timer_init(void) |
122 | { | 108 | { |
123 | OIER = 0; /* disable any timer interrupts */ | 109 | OIER = 0; |
124 | OSSR = 0xf; /* clear status on all timers */ | 110 | OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3; |
125 | 111 | ||
126 | init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32, | 112 | init_fixed_sched_clock(&cd, sa1100_update_sched_clock, 32, |
127 | 3686400, SC_MULT, SC_SHIFT); | 113 | 3686400, SC_MULT, SC_SHIFT); |
128 | 114 | ||
129 | ckevt_sa1100_osmr0.mult = | 115 | clockevents_calc_mult_shift(&ckevt_sa1100_osmr0, 3686400, 4); |
130 | div_sc(3686400, NSEC_PER_SEC, ckevt_sa1100_osmr0.shift); | ||
131 | ckevt_sa1100_osmr0.max_delta_ns = | 116 | ckevt_sa1100_osmr0.max_delta_ns = |
132 | clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0); | 117 | clockevent_delta2ns(0x7fffffff, &ckevt_sa1100_osmr0); |
133 | ckevt_sa1100_osmr0.min_delta_ns = | 118 | ckevt_sa1100_osmr0.min_delta_ns = |
@@ -136,7 +121,8 @@ static void __init sa1100_timer_init(void) | |||
136 | 121 | ||
137 | setup_irq(IRQ_OST0, &sa1100_timer_irq); | 122 | setup_irq(IRQ_OST0, &sa1100_timer_irq); |
138 | 123 | ||
139 | clocksource_register_hz(&cksrc_sa1100_oscr, CLOCK_TICK_RATE); | 124 | clocksource_mmio_init(&OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, |
125 | clocksource_mmio_readl_up); | ||
140 | clockevents_register_device(&ckevt_sa1100_osmr0); | 126 | clockevents_register_device(&ckevt_sa1100_osmr0); |
141 | } | 127 | } |
142 | 128 | ||