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-rw-r--r--arch/arm/mach-s5pv310/include/mach/irqs.h18
-rw-r--r--arch/arm/mach-s5pv310/include/mach/map.h19
-rw-r--r--arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h24
-rw-r--r--arch/arm/mach-s5pv310/include/mach/sysmmu.h119
4 files changed, 180 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h
index 1dd130a34782..536b0b59fc83 100644
--- a/arch/arm/mach-s5pv310/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv310/include/mach/irqs.h
@@ -55,6 +55,24 @@
55#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64)) 55#define COMBINER_GROUP(x) ((x) * MAX_IRQ_IN_COMBINER + IRQ_SPI(64))
56#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y) 56#define COMBINER_IRQ(x, y) (COMBINER_GROUP(x) + y)
57 57
58#define IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
59#define IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
60#define IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
61#define IRQ_SYSMMU_FIMC1_0 COMBINER_IRQ(4, 3)
62#define IRQ_SYSMMU_FIMC2_0 COMBINER_IRQ(4, 4)
63#define IRQ_SYSMMU_FIMC3_0 COMBINER_IRQ(4, 5)
64#define IRQ_SYSMMU_JPEG_0 COMBINER_IRQ(4, 6)
65#define IRQ_SYSMMU_2D_0 COMBINER_IRQ(4, 7)
66
67#define IRQ_SYSMMU_ROTATOR_0 COMBINER_IRQ(5, 0)
68#define IRQ_SYSMMU_MDMA1_0 COMBINER_IRQ(5, 1)
69#define IRQ_SYSMMU_LCD0_M0_0 COMBINER_IRQ(5, 2)
70#define IRQ_SYSMMU_LCD1_M1_0 COMBINER_IRQ(5, 3)
71#define IRQ_SYSMMU_TV_M0_0 COMBINER_IRQ(5, 4)
72#define IRQ_SYSMMU_MFC_M0_0 COMBINER_IRQ(5, 5)
73#define IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6)
74#define IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7)
75
58#define IRQ_PDMA0 COMBINER_IRQ(21, 0) 76#define IRQ_PDMA0 COMBINER_IRQ(21, 0)
59#define IRQ_PDMA1 COMBINER_IRQ(21, 1) 77#define IRQ_PDMA1 COMBINER_IRQ(21, 1)
60 78
diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h
index 33bcff2a9568..74d400625a23 100644
--- a/arch/arm/mach-s5pv310/include/mach/map.h
+++ b/arch/arm/mach-s5pv310/include/mach/map.h
@@ -108,6 +108,25 @@
108#define S5PV310_PA_SDRAM (0x40000000) 108#define S5PV310_PA_SDRAM (0x40000000)
109#define S5P_PA_SDRAM S5PV310_PA_SDRAM 109#define S5P_PA_SDRAM S5PV310_PA_SDRAM
110 110
111#define S5PV310_PA_SYSMMU_MDMA 0x10A40000
112#define S5PV310_PA_SYSMMU_SSS 0x10A50000
113#define S5PV310_PA_SYSMMU_FIMC0 0x11A20000
114#define S5PV310_PA_SYSMMU_FIMC1 0x11A30000
115#define S5PV310_PA_SYSMMU_FIMC2 0x11A40000
116#define S5PV310_PA_SYSMMU_FIMC3 0x11A50000
117#define S5PV310_PA_SYSMMU_JPEG 0x11A60000
118#define S5PV310_PA_SYSMMU_FIMD0 0x11E20000
119#define S5PV310_PA_SYSMMU_FIMD1 0x12220000
120#define S5PV310_PA_SYSMMU_PCIe 0x12620000
121#define S5PV310_PA_SYSMMU_G2D 0x12A20000
122#define S5PV310_PA_SYSMMU_ROTATOR 0x12A30000
123#define S5PV310_PA_SYSMMU_MDMA2 0x12A40000
124#define S5PV310_PA_SYSMMU_TV 0x12E20000
125#define S5PV310_PA_SYSMMU_MFC_L 0x13620000
126#define S5PV310_PA_SYSMMU_MFC_R 0x13630000
127#define S5PV310_SYSMMU_TOTAL_IPNUM 16
128#define S5P_SYSMMU_TOTAL_IPNUM S5PV310_SYSMMU_TOTAL_IPNUM
129
111/* compatibiltiy defines. */ 130/* compatibiltiy defines. */
112#define S3C_PA_UART S5PV310_PA_UART 131#define S3C_PA_UART S5PV310_PA_UART
113#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) 132#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0)
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h b/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h
new file mode 100644
index 000000000000..0b28e81a16f7
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h
@@ -0,0 +1,24 @@
1/* linux/arch/arm/mach-s5pv310/include/mach/regs-sysmmu.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5PV310 - System MMU register
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_SYSMMU_H
14#define __ASM_ARCH_REGS_SYSMMU_H __FILE__
15
16#define S5P_MMU_CTRL 0x000
17#define S5P_MMU_CFG 0x004
18#define S5P_MMU_STATUS 0x008
19#define S5P_MMU_FLUSH 0x00C
20#define S5P_PT_BASE_ADDR 0x014
21#define S5P_INT_STATUS 0x018
22#define S5P_PAGE_FAULT_ADDR 0x024
23
24#endif /* __ASM_ARCH_REGS_SYSMMU_H */
diff --git a/arch/arm/mach-s5pv310/include/mach/sysmmu.h b/arch/arm/mach-s5pv310/include/mach/sysmmu.h
new file mode 100644
index 000000000000..662fe85ff4d5
--- /dev/null
+++ b/arch/arm/mach-s5pv310/include/mach/sysmmu.h
@@ -0,0 +1,119 @@
1/* linux/arch/arm/mach-s5pv310/include/mach/sysmmu.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Samsung sysmmu driver for S5PV310
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARM_ARCH_SYSMMU_H
14#define __ASM_ARM_ARCH_SYSMMU_H __FILE__
15
16enum s5pv310_sysmmu_ips {
17 SYSMMU_MDMA,
18 SYSMMU_SSS,
19 SYSMMU_FIMC0,
20 SYSMMU_FIMC1,
21 SYSMMU_FIMC2,
22 SYSMMU_FIMC3,
23 SYSMMU_JPEG,
24 SYSMMU_FIMD0,
25 SYSMMU_FIMD1,
26 SYSMMU_PCIe,
27 SYSMMU_G2D,
28 SYSMMU_ROTATOR,
29 SYSMMU_MDMA2,
30 SYSMMU_TV,
31 SYSMMU_MFC_L,
32 SYSMMU_MFC_R,
33};
34
35static char *sysmmu_ips_name[S5P_SYSMMU_TOTAL_IPNUM] = {
36 "SYSMMU_MDMA" ,
37 "SYSMMU_SSS" ,
38 "SYSMMU_FIMC0" ,
39 "SYSMMU_FIMC1" ,
40 "SYSMMU_FIMC2" ,
41 "SYSMMU_FIMC3" ,
42 "SYSMMU_JPEG" ,
43 "SYSMMU_FIMD0" ,
44 "SYSMMU_FIMD1" ,
45 "SYSMMU_PCIe" ,
46 "SYSMMU_G2D" ,
47 "SYSMMU_ROTATOR",
48 "SYSMMU_MDMA2" ,
49 "SYSMMU_TV" ,
50 "SYSMMU_MFC_L" ,
51 "SYSMMU_MFC_R" ,
52};
53
54typedef enum s5pv310_sysmmu_ips sysmmu_ips;
55
56struct sysmmu_tt_info {
57 unsigned long *pgd;
58 unsigned long pgd_paddr;
59 unsigned long *pte;
60};
61
62struct sysmmu_controller {
63 const char *name;
64
65 /* channels registers */
66 void __iomem *regs;
67
68 /* channel irq */
69 unsigned int irq;
70
71 sysmmu_ips ips;
72
73 /* Translation Table Info. */
74 struct sysmmu_tt_info *tt_info;
75
76 struct resource *mem;
77 struct device *dev;
78
79 /* SysMMU controller enable - true : enable */
80 bool enable;
81};
82
83/**
84 * s5p_sysmmu_enable() - enable system mmu of ip
85 * @ips: The ip connected system mmu.
86 *
87 * This function enable system mmu to transfer address
88 * from virtual address to physical address
89 */
90int s5p_sysmmu_enable(sysmmu_ips ips);
91
92/**
93 * s5p_sysmmu_disable() - disable sysmmu mmu of ip
94 * @ips: The ip connected system mmu.
95 *
96 * This function disable system mmu to transfer address
97 * from virtual address to physical address
98 */
99int s5p_sysmmu_disable(sysmmu_ips ips);
100
101/**
102 * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table
103 * @ips: The ip connected system mmu.
104 * @pgd: The page table base address.
105 *
106 * This function set page table base address
107 * When system mmu transfer address from virtaul address to physical address,
108 * system mmu refer address information from page table
109 */
110int s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd);
111
112/**
113 * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu
114 * @ips: The ip connected system mmu.
115 *
116 * This function flush all TLB entry in system mmu
117 */
118int s5p_sysmmu_tlb_invalidate(sysmmu_ips ips);
119#endif /* __ASM_ARM_ARCH_SYSMMU_H */