diff options
Diffstat (limited to 'arch/arm/mach-s5pv310/mach-smdkc210.c')
-rw-r--r-- | arch/arm/mach-s5pv310/mach-smdkc210.c | 202 |
1 files changed, 202 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv310/mach-smdkc210.c b/arch/arm/mach-s5pv310/mach-smdkc210.c new file mode 100644 index 000000000000..2b8d4fc52d7c --- /dev/null +++ b/arch/arm/mach-s5pv310/mach-smdkc210.c | |||
@@ -0,0 +1,202 @@ | |||
1 | /* linux/arch/arm/mach-s5pv310/mach-smdkc210.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/serial_core.h> | ||
12 | #include <linux/gpio.h> | ||
13 | #include <linux/mmc/host.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/smsc911x.h> | ||
16 | #include <linux/io.h> | ||
17 | |||
18 | #include <asm/mach/arch.h> | ||
19 | #include <asm/mach-types.h> | ||
20 | |||
21 | #include <plat/regs-serial.h> | ||
22 | #include <plat/s5pv310.h> | ||
23 | #include <plat/cpu.h> | ||
24 | #include <plat/devs.h> | ||
25 | #include <plat/sdhci.h> | ||
26 | |||
27 | #include <mach/map.h> | ||
28 | #include <mach/regs-srom.h> | ||
29 | |||
30 | /* Following are default values for UCON, ULCON and UFCON UART registers */ | ||
31 | #define SMDKC210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
32 | S3C2410_UCON_RXILEVEL | \ | ||
33 | S3C2410_UCON_TXIRQMODE | \ | ||
34 | S3C2410_UCON_RXIRQMODE | \ | ||
35 | S3C2410_UCON_RXFIFO_TOI | \ | ||
36 | S3C2443_UCON_RXERR_IRQEN) | ||
37 | |||
38 | #define SMDKC210_ULCON_DEFAULT S3C2410_LCON_CS8 | ||
39 | |||
40 | #define SMDKC210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ | ||
41 | S5PV210_UFCON_TXTRIG4 | \ | ||
42 | S5PV210_UFCON_RXTRIG4) | ||
43 | |||
44 | static struct s3c2410_uartcfg smdkc210_uartcfgs[] __initdata = { | ||
45 | [0] = { | ||
46 | .hwport = 0, | ||
47 | .flags = 0, | ||
48 | .ucon = SMDKC210_UCON_DEFAULT, | ||
49 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
50 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
51 | }, | ||
52 | [1] = { | ||
53 | .hwport = 1, | ||
54 | .flags = 0, | ||
55 | .ucon = SMDKC210_UCON_DEFAULT, | ||
56 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
57 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
58 | }, | ||
59 | [2] = { | ||
60 | .hwport = 2, | ||
61 | .flags = 0, | ||
62 | .ucon = SMDKC210_UCON_DEFAULT, | ||
63 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
64 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
65 | }, | ||
66 | [3] = { | ||
67 | .hwport = 3, | ||
68 | .flags = 0, | ||
69 | .ucon = SMDKC210_UCON_DEFAULT, | ||
70 | .ulcon = SMDKC210_ULCON_DEFAULT, | ||
71 | .ufcon = SMDKC210_UFCON_DEFAULT, | ||
72 | }, | ||
73 | }; | ||
74 | |||
75 | static struct s3c_sdhci_platdata smdkc210_hsmmc0_pdata __initdata = { | ||
76 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
77 | .ext_cd_gpio = S5PV310_GPK0(2), | ||
78 | .ext_cd_gpio_invert = 1, | ||
79 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
80 | #ifdef CONFIG_S5PV310_SDHCI_CH0_8BIT | ||
81 | .max_width = 8, | ||
82 | .host_caps = MMC_CAP_8_BIT_DATA, | ||
83 | #endif | ||
84 | }; | ||
85 | |||
86 | static struct s3c_sdhci_platdata smdkc210_hsmmc1_pdata __initdata = { | ||
87 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
88 | .ext_cd_gpio = S5PV310_GPK0(2), | ||
89 | .ext_cd_gpio_invert = 1, | ||
90 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
91 | }; | ||
92 | |||
93 | static struct s3c_sdhci_platdata smdkc210_hsmmc2_pdata __initdata = { | ||
94 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
95 | .ext_cd_gpio = S5PV310_GPK2(2), | ||
96 | .ext_cd_gpio_invert = 1, | ||
97 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
98 | #ifdef CONFIG_S5PV310_SDHCI_CH2_8BIT | ||
99 | .max_width = 8, | ||
100 | .host_caps = MMC_CAP_8_BIT_DATA, | ||
101 | #endif | ||
102 | }; | ||
103 | |||
104 | static struct s3c_sdhci_platdata smdkc210_hsmmc3_pdata __initdata = { | ||
105 | .cd_type = S3C_SDHCI_CD_GPIO, | ||
106 | .ext_cd_gpio = S5PV310_GPK2(2), | ||
107 | .ext_cd_gpio_invert = 1, | ||
108 | .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL, | ||
109 | }; | ||
110 | |||
111 | static struct resource smdkc210_smsc911x_resources[] = { | ||
112 | [0] = { | ||
113 | .start = S5PV310_PA_SROM_BANK(1), | ||
114 | .end = S5PV310_PA_SROM_BANK(1) + SZ_64K - 1, | ||
115 | .flags = IORESOURCE_MEM, | ||
116 | }, | ||
117 | [1] = { | ||
118 | .start = IRQ_EINT(5), | ||
119 | .end = IRQ_EINT(5), | ||
120 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | ||
121 | }, | ||
122 | }; | ||
123 | |||
124 | static struct smsc911x_platform_config smsc9215_config = { | ||
125 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH, | ||
126 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | ||
127 | .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY, | ||
128 | .phy_interface = PHY_INTERFACE_MODE_MII, | ||
129 | .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67}, | ||
130 | }; | ||
131 | |||
132 | static struct platform_device smdkc210_smsc911x = { | ||
133 | .name = "smsc911x", | ||
134 | .id = -1, | ||
135 | .num_resources = ARRAY_SIZE(smdkc210_smsc911x_resources), | ||
136 | .resource = smdkc210_smsc911x_resources, | ||
137 | .dev = { | ||
138 | .platform_data = &smsc9215_config, | ||
139 | }, | ||
140 | }; | ||
141 | |||
142 | static struct platform_device *smdkc210_devices[] __initdata = { | ||
143 | &s3c_device_hsmmc0, | ||
144 | &s3c_device_hsmmc1, | ||
145 | &s3c_device_hsmmc2, | ||
146 | &s3c_device_hsmmc3, | ||
147 | &s3c_device_rtc, | ||
148 | &s3c_device_wdt, | ||
149 | &smdkc210_smsc911x, | ||
150 | }; | ||
151 | |||
152 | static void __init smdkc210_smsc911x_init(void) | ||
153 | { | ||
154 | u32 cs1; | ||
155 | |||
156 | /* configure nCS1 width to 16 bits */ | ||
157 | cs1 = __raw_readl(S5PV310_SROM_BW) & | ||
158 | ~(S5PV310_SROM_BW__CS_MASK << | ||
159 | S5PV310_SROM_BW__NCS1__SHIFT); | ||
160 | cs1 |= ((1 << S5PV310_SROM_BW__DATAWIDTH__SHIFT) | | ||
161 | (1 << S5PV310_SROM_BW__WAITENABLE__SHIFT) | | ||
162 | (1 << S5PV310_SROM_BW__BYTEENABLE__SHIFT)) << | ||
163 | S5PV310_SROM_BW__NCS1__SHIFT; | ||
164 | __raw_writel(cs1, S5PV310_SROM_BW); | ||
165 | |||
166 | /* set timing for nCS1 suitable for ethernet chip */ | ||
167 | __raw_writel((0x1 << S5PV310_SROM_BCX__PMC__SHIFT) | | ||
168 | (0x9 << S5PV310_SROM_BCX__TACP__SHIFT) | | ||
169 | (0xc << S5PV310_SROM_BCX__TCAH__SHIFT) | | ||
170 | (0x1 << S5PV310_SROM_BCX__TCOH__SHIFT) | | ||
171 | (0x6 << S5PV310_SROM_BCX__TACC__SHIFT) | | ||
172 | (0x1 << S5PV310_SROM_BCX__TCOS__SHIFT) | | ||
173 | (0x1 << S5PV310_SROM_BCX__TACS__SHIFT), S5PV310_SROM_BC1); | ||
174 | } | ||
175 | |||
176 | static void __init smdkc210_map_io(void) | ||
177 | { | ||
178 | s5p_init_io(NULL, 0, S5P_VA_CHIPID); | ||
179 | s3c24xx_init_clocks(24000000); | ||
180 | s3c24xx_init_uarts(smdkc210_uartcfgs, ARRAY_SIZE(smdkc210_uartcfgs)); | ||
181 | } | ||
182 | |||
183 | static void __init smdkc210_machine_init(void) | ||
184 | { | ||
185 | smdkc210_smsc911x_init(); | ||
186 | |||
187 | s3c_sdhci0_set_platdata(&smdkc210_hsmmc0_pdata); | ||
188 | s3c_sdhci1_set_platdata(&smdkc210_hsmmc1_pdata); | ||
189 | s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata); | ||
190 | s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata); | ||
191 | |||
192 | platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices)); | ||
193 | } | ||
194 | |||
195 | MACHINE_START(SMDKC210, "SMDKC210") | ||
196 | /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ | ||
197 | .boot_params = S5P_PA_SDRAM + 0x100, | ||
198 | .init_irq = s5pv310_init_irq, | ||
199 | .map_io = smdkc210_map_io, | ||
200 | .init_machine = smdkc210_machine_init, | ||
201 | .timer = &s5pv310_timer, | ||
202 | MACHINE_END | ||