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-rw-r--r--arch/arm/mach-s5pv210/Kconfig2
-rw-r--r--arch/arm/mach-s5pv210/clock.c25
-rw-r--r--arch/arm/mach-s5pv210/cpu.c5
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h3
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h6
-rw-r--r--arch/arm/mach-s5pv210/include/mach/regs-clock.h5
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkc110.c1
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c139
8 files changed, 157 insertions, 29 deletions
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 862f239a0fdb..53aabef1e9ce 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -118,6 +118,7 @@ menu "S5PV210 Machines"
118config MACH_SMDKV210 118config MACH_SMDKV210
119 bool "SMDKV210" 119 bool "SMDKV210"
120 select CPU_S5PV210 120 select CPU_S5PV210
121 select S3C_DEV_FB
121 select S3C_DEV_HSMMC 122 select S3C_DEV_HSMMC
122 select S3C_DEV_HSMMC1 123 select S3C_DEV_HSMMC1
123 select S3C_DEV_HSMMC2 124 select S3C_DEV_HSMMC2
@@ -130,6 +131,7 @@ config MACH_SMDKV210
130 select SAMSUNG_DEV_IDE 131 select SAMSUNG_DEV_IDE
131 select SAMSUNG_DEV_KEYPAD 132 select SAMSUNG_DEV_KEYPAD
132 select SAMSUNG_DEV_TS 133 select SAMSUNG_DEV_TS
134 select S5PV210_SETUP_FB_24BPP
133 select S5PV210_SETUP_I2C1 135 select S5PV210_SETUP_I2C1
134 select S5PV210_SETUP_I2C2 136 select S5PV210_SETUP_I2C2
135 select S5PV210_SETUP_IDE 137 select S5PV210_SETUP_IDE
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index b774ff1805db..2d599499cefe 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -309,7 +309,7 @@ static struct clk_ops clk_fout_apll_ops = {
309 .get_rate = s5pv210_clk_fout_apll_get_rate, 309 .get_rate = s5pv210_clk_fout_apll_get_rate,
310}; 310};
311 311
312static struct clk init_clocks_disable[] = { 312static struct clk init_clocks_off[] = {
313 { 313 {
314 .name = "pdma", 314 .name = "pdma",
315 .id = 0, 315 .id = 0,
@@ -525,6 +525,12 @@ static struct clk init_clocks[] = {
525 .parent = &clk_pclk_psys.clk, 525 .parent = &clk_pclk_psys.clk,
526 .enable = s5pv210_clk_ip3_ctrl, 526 .enable = s5pv210_clk_ip3_ctrl,
527 .ctrlbit = (1 << 20), 527 .ctrlbit = (1 << 20),
528 }, {
529 .name = "sromc",
530 .id = -1,
531 .parent = &clk_hclk_psys.clk,
532 .enable = s5pv210_clk_ip1_ctrl,
533 .ctrlbit = (1 << 26),
528 }, 534 },
529}; 535};
530 536
@@ -1220,13 +1226,9 @@ static struct clk *clks[] __initdata = {
1220 1226
1221void __init s5pv210_register_clocks(void) 1227void __init s5pv210_register_clocks(void)
1222{ 1228{
1223 struct clk *clkp;
1224 int ret;
1225 int ptr; 1229 int ptr;
1226 1230
1227 ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); 1231 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
1228 if (ret > 0)
1229 printk(KERN_ERR "Failed to register %u clocks\n", ret);
1230 1232
1231 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) 1233 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
1232 s3c_register_clksrc(sysclks[ptr], 1); 1234 s3c_register_clksrc(sysclks[ptr], 1);
@@ -1234,15 +1236,8 @@ void __init s5pv210_register_clocks(void)
1234 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 1236 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
1235 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 1237 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
1236 1238
1237 clkp = init_clocks_disable; 1239 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1238 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { 1240 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
1239 ret = s3c24xx_register_clock(clkp);
1240 if (ret < 0) {
1241 printk(KERN_ERR "Failed to register clock %s (%d)\n",
1242 clkp->name, ret);
1243 }
1244 (clkp->enable)(clkp, 0);
1245 }
1246 1241
1247 s3c_pwmclk_init(); 1242 s3c_pwmclk_init();
1248} 1243}
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index 8eb480e201b0..61e6c24b90ac 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -81,11 +81,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
81 .length = SZ_512K, 81 .length = SZ_512K,
82 .type = MT_DEVICE, 82 .type = MT_DEVICE,
83 }, { 83 }, {
84 .virtual = (unsigned long)S5P_VA_SROMC,
85 .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
86 .length = SZ_4K,
87 .type = MT_DEVICE,
88 }, {
89 .virtual = (unsigned long)S5P_VA_DMC0, 84 .virtual = (unsigned long)S5P_VA_DMC0,
90 .pfn = __phys_to_pfn(S5PV210_PA_DMC0), 85 .pfn = __phys_to_pfn(S5PV210_PA_DMC0),
91 .length = SZ_4K, 86 .length = SZ_4K,
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 119b95fdc3ce..26710b35ef87 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -65,7 +65,7 @@
65#define IRQ_HSMMC0 S5P_IRQ_VIC1(26) 65#define IRQ_HSMMC0 S5P_IRQ_VIC1(26)
66#define IRQ_HSMMC1 S5P_IRQ_VIC1(27) 66#define IRQ_HSMMC1 S5P_IRQ_VIC1(27)
67#define IRQ_HSMMC2 S5P_IRQ_VIC1(28) 67#define IRQ_HSMMC2 S5P_IRQ_VIC1(28)
68#define IRQ_MIPICSI S5P_IRQ_VIC1(29) 68#define IRQ_MIPI_CSIS S5P_IRQ_VIC1(29)
69#define IRQ_MIPIDSI S5P_IRQ_VIC1(30) 69#define IRQ_MIPIDSI S5P_IRQ_VIC1(30)
70#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31) 70#define IRQ_ONENAND_AUDI S5P_IRQ_VIC1(31)
71 71
@@ -132,5 +132,6 @@
132#define IRQ_LCD_FIFO IRQ_LCD0 132#define IRQ_LCD_FIFO IRQ_LCD0
133#define IRQ_LCD_VSYNC IRQ_LCD1 133#define IRQ_LCD_VSYNC IRQ_LCD1
134#define IRQ_LCD_SYSTEM IRQ_LCD2 134#define IRQ_LCD_SYSTEM IRQ_LCD2
135#define IRQ_MIPI_CSIS0 IRQ_MIPI_CSIS
135 136
136#endif /* ASM_ARCH_IRQS_H */ 137#endif /* ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index 861d7fe11fc9..3611492ad681 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -16,6 +16,8 @@
16#include <plat/map-base.h> 16#include <plat/map-base.h>
17#include <plat/map-s5p.h> 17#include <plat/map-s5p.h>
18 18
19#define S5PV210_PA_SROM_BANK5 (0xA8000000)
20
19#define S5PC110_PA_ONENAND (0xB0000000) 21#define S5PC110_PA_ONENAND (0xB0000000)
20#define S5P_PA_ONENAND S5PC110_PA_ONENAND 22#define S5P_PA_ONENAND S5PC110_PA_ONENAND
21 23
@@ -60,6 +62,7 @@
60#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) 62#define S3C_VA_UARTx(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
61 63
62#define S5PV210_PA_SROMC (0xE8000000) 64#define S5PV210_PA_SROMC (0xE8000000)
65#define S5P_PA_SROMC S5PV210_PA_SROMC
63 66
64#define S5PV210_PA_CFCON (0xE8200000) 67#define S5PV210_PA_CFCON (0xE8200000)
65 68
@@ -107,6 +110,8 @@
107#define S5PV210_PA_DMC0 (0xF0000000) 110#define S5PV210_PA_DMC0 (0xF0000000)
108#define S5PV210_PA_DMC1 (0xF1400000) 111#define S5PV210_PA_DMC1 (0xF1400000)
109 112
113#define S5PV210_PA_MIPI_CSIS 0xFA600000
114
110/* compatibiltiy defines. */ 115/* compatibiltiy defines. */
111#define S3C_PA_UART S5PV210_PA_UART 116#define S3C_PA_UART S5PV210_PA_UART
112#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0) 117#define S3C_PA_HSMMC0 S5PV210_PA_HSMMC(0)
@@ -123,6 +128,7 @@
123#define S5P_PA_FIMC0 S5PV210_PA_FIMC0 128#define S5P_PA_FIMC0 S5PV210_PA_FIMC0
124#define S5P_PA_FIMC1 S5PV210_PA_FIMC1 129#define S5P_PA_FIMC1 S5PV210_PA_FIMC1
125#define S5P_PA_FIMC2 S5PV210_PA_FIMC2 130#define S5P_PA_FIMC2 S5PV210_PA_FIMC2
131#define S5P_PA_MIPI_CSIS0 S5PV210_PA_MIPI_CSIS
126 132
127#define SAMSUNG_PA_ADC S5PV210_PA_ADC 133#define SAMSUNG_PA_ADC S5PV210_PA_ADC
128#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON 134#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
diff --git a/arch/arm/mach-s5pv210/include/mach/regs-clock.h b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
index ebaabe021af9..4c45b74def5f 100644
--- a/arch/arm/mach-s5pv210/include/mach/regs-clock.h
+++ b/arch/arm/mach-s5pv210/include/mach/regs-clock.h
@@ -161,7 +161,7 @@
161#define S5P_MDNIE_SEL S5P_CLKREG(0x7008) 161#define S5P_MDNIE_SEL S5P_CLKREG(0x7008)
162#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200) 162#define S5P_MIPI_PHY_CON0 S5P_CLKREG(0x7200)
163#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204) 163#define S5P_MIPI_PHY_CON1 S5P_CLKREG(0x7204)
164#define S5P_MIPI_CONTROL S5P_CLKREG(0xE814) 164#define S5P_MIPI_DPHY_CONTROL S5P_CLKREG(0xE814)
165 165
166#define S5P_IDLE_CFG_TL_MASK (3 << 30) 166#define S5P_IDLE_CFG_TL_MASK (3 << 30)
167#define S5P_IDLE_CFG_TM_MASK (3 << 28) 167#define S5P_IDLE_CFG_TM_MASK (3 << 28)
@@ -195,9 +195,6 @@
195#define S5P_OTHERS_RET_UART (1 << 28) 195#define S5P_OTHERS_RET_UART (1 << 28)
196#define S5P_OTHERS_USB_SIG_MASK (1 << 16) 196#define S5P_OTHERS_USB_SIG_MASK (1 << 16)
197 197
198/* MIPI */
199#define S5P_MIPI_DPHY_EN (3)
200
201/* S5P_DAC_CONTROL */ 198/* S5P_DAC_CONTROL */
202#define S5P_DAC_ENABLE (1) 199#define S5P_DAC_ENABLE (1)
203#define S5P_DAC_DISABLE (0) 200#define S5P_DAC_DISABLE (0)
diff --git a/arch/arm/mach-s5pv210/mach-smdkc110.c b/arch/arm/mach-s5pv210/mach-smdkc110.c
index 5dd1681c069e..bb20a14da100 100644
--- a/arch/arm/mach-s5pv210/mach-smdkc110.c
+++ b/arch/arm/mach-s5pv210/mach-smdkc110.c
@@ -94,6 +94,7 @@ static struct platform_device *smdkc110_devices[] __initdata = {
94 94
95static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = { 95static struct i2c_board_info smdkc110_i2c_devs0[] __initdata = {
96 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ 96 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
97 { I2C_BOARD_INFO("wm8580", 0x1b), },
97}; 98};
98 99
99static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = { 100static struct i2c_board_info smdkc110_i2c_devs1[] __initdata = {
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index 1fbc45b2a432..88e45223c8af 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -14,16 +14,25 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/serial_core.h> 15#include <linux/serial_core.h>
16#include <linux/sysdev.h> 16#include <linux/sysdev.h>
17#include <linux/dm9000.h>
18#include <linux/fb.h>
19#include <linux/gpio.h>
20#include <linux/delay.h>
17 21
18#include <asm/mach/arch.h> 22#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 23#include <asm/mach/map.h>
20#include <asm/setup.h> 24#include <asm/setup.h>
21#include <asm/mach-types.h> 25#include <asm/mach-types.h>
22 26
27#include <video/platform_lcd.h>
28
23#include <mach/map.h> 29#include <mach/map.h>
24#include <mach/regs-clock.h> 30#include <mach/regs-clock.h>
31#include <mach/regs-fb.h>
25 32
26#include <plat/regs-serial.h> 33#include <plat/regs-serial.h>
34#include <plat/regs-srom.h>
35#include <plat/gpio-cfg.h>
27#include <plat/s5pv210.h> 36#include <plat/s5pv210.h>
28#include <plat/devs.h> 37#include <plat/devs.h>
29#include <plat/cpu.h> 38#include <plat/cpu.h>
@@ -33,6 +42,7 @@
33#include <plat/iic.h> 42#include <plat/iic.h>
34#include <plat/keypad.h> 43#include <plat/keypad.h>
35#include <plat/pm.h> 44#include <plat/pm.h>
45#include <plat/fb.h>
36 46
37/* Following are default values for UCON, ULCON and UFCON UART registers */ 47/* Following are default values for UCON, ULCON and UFCON UART registers */
38#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ 48#define SMDKV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
@@ -102,12 +112,106 @@ static struct samsung_keypad_platdata smdkv210_keypad_data __initdata = {
102 .cols = 8, 112 .cols = 8,
103}; 113};
104 114
115static struct resource smdkv210_dm9000_resources[] = {
116 [0] = {
117 .start = S5PV210_PA_SROM_BANK5,
118 .end = S5PV210_PA_SROM_BANK5,
119 .flags = IORESOURCE_MEM,
120 },
121 [1] = {
122 .start = S5PV210_PA_SROM_BANK5 + 2,
123 .end = S5PV210_PA_SROM_BANK5 + 2,
124 .flags = IORESOURCE_MEM,
125 },
126 [2] = {
127 .start = IRQ_EINT(9),
128 .end = IRQ_EINT(9),
129 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
130 },
131};
132
133static struct dm9000_plat_data smdkv210_dm9000_platdata = {
134 .flags = DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM,
135 .dev_addr = { 0x00, 0x09, 0xc0, 0xff, 0xec, 0x48 },
136};
137
138struct platform_device smdkv210_dm9000 = {
139 .name = "dm9000",
140 .id = -1,
141 .num_resources = ARRAY_SIZE(smdkv210_dm9000_resources),
142 .resource = smdkv210_dm9000_resources,
143 .dev = {
144 .platform_data = &smdkv210_dm9000_platdata,
145 },
146};
147
148static void smdkv210_lte480wv_set_power(struct plat_lcd_data *pd,
149 unsigned int power)
150{
151 if (power) {
152#if !defined(CONFIG_BACKLIGHT_PWM)
153 gpio_request(S5PV210_GPD0(3), "GPD0");
154 gpio_direction_output(S5PV210_GPD0(3), 1);
155 gpio_free(S5PV210_GPD0(3));
156#endif
157
158 /* fire nRESET on power up */
159 gpio_request(S5PV210_GPH0(6), "GPH0");
160
161 gpio_direction_output(S5PV210_GPH0(6), 1);
162
163 gpio_set_value(S5PV210_GPH0(6), 0);
164 mdelay(10);
165
166 gpio_set_value(S5PV210_GPH0(6), 1);
167 mdelay(10);
168
169 gpio_free(S5PV210_GPH0(6));
170 } else {
171#if !defined(CONFIG_BACKLIGHT_PWM)
172 gpio_request(S5PV210_GPD0(3), "GPD0");
173 gpio_direction_output(S5PV210_GPD0(3), 0);
174 gpio_free(S5PV210_GPD0(3));
175#endif
176 }
177}
178
179static struct plat_lcd_data smdkv210_lcd_lte480wv_data = {
180 .set_power = smdkv210_lte480wv_set_power,
181};
182
183static struct platform_device smdkv210_lcd_lte480wv = {
184 .name = "platform-lcd",
185 .dev.parent = &s3c_device_fb.dev,
186 .dev.platform_data = &smdkv210_lcd_lte480wv_data,
187};
188
189static struct s3c_fb_pd_win smdkv210_fb_win0 = {
190 .win_mode = {
191 .left_margin = 13,
192 .right_margin = 8,
193 .upper_margin = 7,
194 .lower_margin = 5,
195 .hsync_len = 3,
196 .vsync_len = 1,
197 .xres = 800,
198 .yres = 480,
199 },
200 .max_bpp = 32,
201 .default_bpp = 24,
202};
203
204static struct s3c_fb_platdata smdkv210_lcd0_pdata __initdata = {
205 .win[0] = &smdkv210_fb_win0,
206 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
207 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
208 .setup_gpio = s5pv210_fb_gpio_setup_24bpp,
209};
210
105static struct platform_device *smdkv210_devices[] __initdata = { 211static struct platform_device *smdkv210_devices[] __initdata = {
106 &s5pv210_device_iis0,
107 &s5pv210_device_ac97,
108 &s5pv210_device_spdif,
109 &s3c_device_adc, 212 &s3c_device_adc,
110 &s3c_device_cfcon, 213 &s3c_device_cfcon,
214 &s3c_device_fb,
111 &s3c_device_hsmmc0, 215 &s3c_device_hsmmc0,
112 &s3c_device_hsmmc1, 216 &s3c_device_hsmmc1,
113 &s3c_device_hsmmc2, 217 &s3c_device_hsmmc2,
@@ -115,14 +219,37 @@ static struct platform_device *smdkv210_devices[] __initdata = {
115 &s3c_device_i2c0, 219 &s3c_device_i2c0,
116 &s3c_device_i2c1, 220 &s3c_device_i2c1,
117 &s3c_device_i2c2, 221 &s3c_device_i2c2,
118 &samsung_device_keypad,
119 &s3c_device_rtc, 222 &s3c_device_rtc,
120 &s3c_device_ts, 223 &s3c_device_ts,
121 &s3c_device_wdt, 224 &s3c_device_wdt,
225 &s5pv210_device_ac97,
226 &s5pv210_device_iis0,
227 &s5pv210_device_spdif,
228 &samsung_device_keypad,
229 &smdkv210_dm9000,
230 &smdkv210_lcd_lte480wv,
122}; 231};
123 232
233static void __init smdkv210_dm9000_init(void)
234{
235 unsigned int tmp;
236
237 gpio_request(S5PV210_MP01(5), "nCS5");
238 s3c_gpio_cfgpin(S5PV210_MP01(5), S3C_GPIO_SFN(2));
239 gpio_free(S5PV210_MP01(5));
240
241 tmp = (5 << S5P_SROM_BCX__TACC__SHIFT);
242 __raw_writel(tmp, S5P_SROM_BC5);
243
244 tmp = __raw_readl(S5P_SROM_BW);
245 tmp &= (S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS5__SHIFT);
246 tmp |= (1 << S5P_SROM_BW__NCS5__SHIFT);
247 __raw_writel(tmp, S5P_SROM_BW);
248}
249
124static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = { 250static struct i2c_board_info smdkv210_i2c_devs0[] __initdata = {
125 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */ 251 { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung S524AD0XD1 */
252 { I2C_BOARD_INFO("wm8580", 0x1b), },
126}; 253};
127 254
128static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = { 255static struct i2c_board_info smdkv210_i2c_devs1[] __initdata = {
@@ -150,6 +277,8 @@ static void __init smdkv210_machine_init(void)
150{ 277{
151 s3c_pm_init(); 278 s3c_pm_init();
152 279
280 smdkv210_dm9000_init();
281
153 samsung_keypad_set_platdata(&smdkv210_keypad_data); 282 samsung_keypad_set_platdata(&smdkv210_keypad_data);
154 s3c24xx_ts_set_platdata(&s3c_ts_platform); 283 s3c24xx_ts_set_platdata(&s3c_ts_platform);
155 284
@@ -165,6 +294,8 @@ static void __init smdkv210_machine_init(void)
165 294
166 s3c_ide_set_platdata(&smdkv210_ide_pdata); 295 s3c_ide_set_platdata(&smdkv210_ide_pdata);
167 296
297 s3c_fb_set_platdata(&smdkv210_lcd0_pdata);
298
168 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); 299 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
169} 300}
170 301